1 /**
2 ******************************************************************************
3 * @file stm32f7xx_ll_usart.c
4 * @author MCD Application Team
5 * @brief USART LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18 #if defined(USE_FULL_LL_DRIVER)
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32f7xx_ll_usart.h"
22 #include "stm32f7xx_ll_rcc.h"
23 #include "stm32f7xx_ll_bus.h"
24 #ifdef USE_FULL_ASSERT
25 #include "stm32_assert.h"
26 #else
27 #define assert_param(expr) ((void)0U)
28 #endif /* USE_FULL_ASSERT */
29
30 /** @addtogroup STM32F7xx_LL_Driver
31 * @{
32 */
33
34 #if defined(USART1) || defined(USART2) || defined(USART3) || defined(USART6) \
35 || defined(UART4) || defined(UART5) || defined(UART7) || defined(UART8)
36
37 /** @addtogroup USART_LL
38 * @{
39 */
40
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /* Private constants ---------------------------------------------------------*/
44 /** @addtogroup USART_LL_Private_Constants
45 * @{
46 */
47
48 /* Definition of default baudrate value used for USART initialisation */
49 #define USART_DEFAULT_BAUDRATE (9600U)
50
51 /**
52 * @}
53 */
54
55 /* Private macros ------------------------------------------------------------*/
56 /** @addtogroup USART_LL_Private_Macros
57 * @{
58 */
59
60 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
61 * divided by the smallest oversampling used on the USART (i.e. 8) */
62 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 27000000U)
63
64 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
65 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
66
67 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
68 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
69 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
70 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
71
72 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
73 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
74 || ((__VALUE__) == LL_USART_PARITY_ODD))
75
76 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
77 || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
78 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
79
80 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
81 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
82
83 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
84 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
85
86 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
87 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
88
89 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
90 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
91
92 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
93 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
94
95 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
96 || ((__VALUE__) == LL_USART_STOPBITS_1) \
97 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
98 || ((__VALUE__) == LL_USART_STOPBITS_2))
99
100 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
101 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
102 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
103 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
104
105 /**
106 * @}
107 */
108
109 /* Private function prototypes -----------------------------------------------*/
110
111 /* Exported functions --------------------------------------------------------*/
112 /** @addtogroup USART_LL_Exported_Functions
113 * @{
114 */
115
116 /** @addtogroup USART_LL_EF_Init
117 * @{
118 */
119
120 /**
121 * @brief De-initialize USART registers (Registers restored to their default values).
122 * @param USARTx USART Instance
123 * @retval An ErrorStatus enumeration value:
124 * - SUCCESS: USART registers are de-initialized
125 * - ERROR: USART registers are not de-initialized
126 */
LL_USART_DeInit(const USART_TypeDef * USARTx)127 ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx)
128 {
129 ErrorStatus status = SUCCESS;
130
131 /* Check the parameters */
132 assert_param(IS_UART_INSTANCE(USARTx));
133
134 if (USARTx == USART1)
135 {
136 /* Force reset of USART clock */
137 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
138
139 /* Release reset of USART clock */
140 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
141 }
142 else if (USARTx == USART2)
143 {
144 /* Force reset of USART clock */
145 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
146
147 /* Release reset of USART clock */
148 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
149 }
150 else if (USARTx == USART3)
151 {
152 /* Force reset of USART clock */
153 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
154
155 /* Release reset of USART clock */
156 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
157 }
158 else if (USARTx == UART4)
159 {
160 /* Force reset of UART clock */
161 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
162
163 /* Release reset of UART clock */
164 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
165 }
166 else if (USARTx == UART5)
167 {
168 /* Force reset of UART clock */
169 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
170
171 /* Release reset of UART clock */
172 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
173 }
174 else if (USARTx == USART6)
175 {
176 /* Force reset of USART clock */
177 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART6);
178
179 /* Release reset of USART clock */
180 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART6);
181 }
182 else if (USARTx == UART7)
183 {
184 /* Force reset of UART clock */
185 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7);
186
187 /* Release reset of UART clock */
188 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7);
189 }
190 else if (USARTx == UART8)
191 {
192 /* Force reset of UART clock */
193 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8);
194
195 /* Release reset of UART clock */
196 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8);
197 }
198 else
199 {
200 status = ERROR;
201 }
202
203 return (status);
204 }
205
206 /**
207 * @brief Initialize USART registers according to the specified
208 * parameters in USART_InitStruct.
209 * @note As some bits in USART configuration registers can only be written when
210 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
211 * this function. Otherwise, ERROR result will be returned.
212 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
213 * @param USARTx USART Instance
214 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
215 * that contains the configuration information for the specified USART peripheral.
216 * @retval An ErrorStatus enumeration value:
217 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
218 * - ERROR: Problem occurred during USART Registers initialization
219 */
LL_USART_Init(USART_TypeDef * USARTx,const LL_USART_InitTypeDef * USART_InitStruct)220 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct)
221 {
222 ErrorStatus status = ERROR;
223 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
224
225 /* Check the parameters */
226 assert_param(IS_UART_INSTANCE(USARTx));
227 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
228 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
229 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
230 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
231 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
232 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
233 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
234
235 /* USART needs to be in disabled state, in order to be able to configure some bits in
236 CRx registers */
237 if (LL_USART_IsEnabled(USARTx) == 0U)
238 {
239 /*---------------------------- USART CR1 Configuration ---------------------
240 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
241 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
242 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
243 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
244 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
245 */
246 MODIFY_REG(USARTx->CR1,
247 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
248 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
249 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
250 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
251
252 /*---------------------------- USART CR2 Configuration ---------------------
253 * Configure USARTx CR2 (Stop bits) with parameters:
254 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
255 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
256 */
257 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
258
259 /*---------------------------- USART CR3 Configuration ---------------------
260 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
261 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
262 * USART_InitStruct->HardwareFlowControl value.
263 */
264 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
265
266 /*---------------------------- USART BRR Configuration ---------------------
267 * Retrieve Clock frequency used for USART Peripheral
268 */
269 if (USARTx == USART1)
270 {
271 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
272 }
273 else if (USARTx == USART2)
274 {
275 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
276 }
277 else if (USARTx == USART3)
278 {
279 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
280 }
281 else if (USARTx == UART4)
282 {
283 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
284 }
285 else if (USARTx == UART5)
286 {
287 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
288 }
289 else if (USARTx == USART6)
290 {
291 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART6_CLKSOURCE);
292 }
293 else if (USARTx == UART7)
294 {
295 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART7_CLKSOURCE);
296 }
297 else if (USARTx == UART8)
298 {
299 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART8_CLKSOURCE);
300 }
301 else
302 {
303 /* Nothing to do, as error code is already assigned to ERROR value */
304 }
305
306 /* Configure the USART Baud Rate :
307 - valid baud rate value (different from 0) is required
308 - Peripheral clock as returned by RCC service, should be valid (different from 0).
309 */
310 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
311 && (USART_InitStruct->BaudRate != 0U))
312 {
313 status = SUCCESS;
314 LL_USART_SetBaudRate(USARTx,
315 periphclk,
316 USART_InitStruct->OverSampling,
317 USART_InitStruct->BaudRate);
318
319 /* Check BRR is greater than or equal to 16d */
320 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
321 }
322 }
323 /* Endif (=> USART not in Disabled state => return ERROR) */
324
325 return (status);
326 }
327
328 /**
329 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
330 * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
331 * whose fields will be set to default values.
332 * @retval None
333 */
334
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)335 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
336 {
337 /* Set USART_InitStruct fields to default values */
338 USART_InitStruct->BaudRate = USART_DEFAULT_BAUDRATE;
339 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
340 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
341 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
342 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
343 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
344 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
345 }
346
347 /**
348 * @brief Initialize USART Clock related settings according to the
349 * specified parameters in the USART_ClockInitStruct.
350 * @note As some bits in USART configuration registers can only be written when
351 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
352 * this function. Otherwise, ERROR result will be returned.
353 * @param USARTx USART Instance
354 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
355 * that contains the Clock configuration information for the specified USART peripheral.
356 * @retval An ErrorStatus enumeration value:
357 * - SUCCESS: USART registers related to Clock settings are initialized according
358 * to USART_ClockInitStruct content
359 * - ERROR: Problem occurred during USART Registers initialization
360 */
LL_USART_ClockInit(USART_TypeDef * USARTx,const LL_USART_ClockInitTypeDef * USART_ClockInitStruct)361 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
362 {
363 ErrorStatus status = SUCCESS;
364
365 /* Check USART Instance and Clock signal output parameters */
366 assert_param(IS_UART_INSTANCE(USARTx));
367 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
368
369 /* USART needs to be in disabled state, in order to be able to configure some bits in
370 CRx registers */
371 if (LL_USART_IsEnabled(USARTx) == 0U)
372 {
373 /* If USART Clock signal is disabled */
374 if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
375 {
376 /* Deactivate Clock signal delivery :
377 * - Disable Clock Output: USART_CR2_CLKEN cleared
378 */
379 LL_USART_DisableSCLKOutput(USARTx);
380 }
381 else
382 {
383 /* Ensure USART instance is USART capable */
384 assert_param(IS_USART_INSTANCE(USARTx));
385
386 /* Check clock related parameters */
387 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
388 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
389 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
390
391 /*---------------------------- USART CR2 Configuration -----------------------
392 * Configure USARTx CR2 (Clock signal related bits) with parameters:
393 * - Enable Clock Output: USART_CR2_CLKEN set
394 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
395 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
396 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
397 */
398 MODIFY_REG(USARTx->CR2,
399 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
400 USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
401 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
402 }
403 }
404 /* Else (USART not in Disabled state => return ERROR */
405 else
406 {
407 status = ERROR;
408 }
409
410 return (status);
411 }
412
413 /**
414 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
415 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
416 * whose fields will be set to default values.
417 * @retval None
418 */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)419 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
420 {
421 /* Set LL_USART_ClockInitStruct fields with default values */
422 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
423 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput =
424 LL_USART_CLOCK_DISABLE */
425 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput =
426 LL_USART_CLOCK_DISABLE */
427 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput =
428 LL_USART_CLOCK_DISABLE */
429 }
430
431 /**
432 * @}
433 */
434
435 /**
436 * @}
437 */
438
439 /**
440 * @}
441 */
442
443 #endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 */
444
445 /**
446 * @}
447 */
448
449 #endif /* USE_FULL_LL_DRIVER */
450
451
452
