1 /**
2 ******************************************************************************
3 * @file stm32f7xx_hal_dfsdm.c
4 * @author MCD Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the Digital Filter for Sigma-Delta Modulators
7 * (DFSDM) peripherals:
8 * + Initialization and configuration of channels and filters
9 * + Regular channels configuration
10 * + Injected channels configuration
11 * + Regular/Injected Channels DMA Configuration
12 * + Interrupts and flags management
13 * + Analog watchdog feature
14 * + Short-circuit detector feature
15 * + Extremes detector feature
16 * + Clock absence detector feature
17 * + Break generation on analog watchdog or short-circuit event
18 *
19 ******************************************************************************
20 * @attention
21 *
22 * Copyright (c) 2017 STMicroelectronics.
23 * All rights reserved.
24 *
25 * This software is licensed under terms that can be found in the LICENSE file
26 * in the root directory of this software component.
27 * If no LICENSE file comes with this software, it is provided AS-IS.
28 *
29 ******************************************************************************
30 @verbatim
31 ==============================================================================
32 ##### How to use this driver #####
33 ==============================================================================
34 [..]
35 *** Channel initialization ***
36 ==============================
37 [..]
38 (#) User has first to initialize channels (before filters initialization).
39 (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
40 (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
41 (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
42 (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
43 (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
44 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
45 (#) Configure the output clock, input, serial interface, analog watchdog,
46 offset and data right bit shift parameters for this channel using the
47 HAL_DFSDM_ChannelInit() function.
48
49 *** Channel clock absence detector ***
50 ======================================
51 [..]
52 (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
53 HAL_DFSDM_ChannelCkabStart_IT().
54 (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
55 absence.
56 (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
57 clock absence is detected.
58 (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
59 HAL_DFSDM_ChannelCkabStop_IT().
60 (#) Please note that the same mode (polling or interrupt) has to be used
61 for all channels because the channels are sharing the same interrupt.
62 (#) Please note also that in interrupt mode, if clock absence detector is
63 stopped for one channel, interrupt will be disabled for all channels.
64
65 *** Channel short circuit detector ***
66 ======================================
67 [..]
68 (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
69 or HAL_DFSDM_ChannelScdStart_IT().
70 (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
71 circuit.
72 (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
73 short circuit is detected.
74 (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
75 or HAL_DFSDM_ChannelScdStop_IT().
76 (#) Please note that the same mode (polling or interrupt) has to be used
77 for all channels because the channels are sharing the same interrupt.
78 (#) Please note also that in interrupt mode, if short circuit detector is
79 stopped for one channel, interrupt will be disabled for all channels.
80
81 *** Channel analog watchdog value ***
82 =====================================
83 [..]
84 (#) Get analog watchdog filter value of a channel using
85 HAL_DFSDM_ChannelGetAwdValue().
86
87 *** Channel offset value ***
88 =====================================
89 [..]
90 (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
91
92 *** Filter initialization ***
93 =============================
94 [..]
95 (#) After channel initialization, user has to init filters.
96 (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
97 (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
98 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
99 Please note that DFSDMz_FLT0 global interrupt could be already
100 enabled if interrupt is used for channel.
101 (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
102 with DFSDMz filter handle using __HAL_LINKDMA().
103 (#) Configure the regular conversion, injected conversion and filter
104 parameters for this filter using the HAL_DFSDM_FilterInit() function.
105
106 *** Filter regular channel conversion ***
107 =========================================
108 [..]
109 (#) Select regular channel and enable/disable continuous mode using
110 HAL_DFSDM_FilterConfigRegChannel().
111 (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
112 HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
113 HAL_DFSDM_FilterRegularMsbStart_DMA().
114 (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
115 the end of regular conversion.
116 (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
117 at the end of regular conversion.
118 (#) Get value of regular conversion and corresponding channel using
119 HAL_DFSDM_FilterGetRegularValue().
120 (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
121 HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
122 half transfer and at the transfer complete. Please note that
123 HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
124 circular mode.
125 (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
126 HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
127
128 *** Filter injected channels conversion ***
129 ===========================================
130 [..]
131 (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
132 (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
133 HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
134 HAL_DFSDM_FilterInjectedMsbStart_DMA().
135 (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
136 the end of injected conversion.
137 (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
138 at the end of injected conversion.
139 (#) Get value of injected conversion and corresponding channel using
140 HAL_DFSDM_FilterGetInjectedValue().
141 (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
142 HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
143 half transfer and at the transfer complete. Please note that
144 HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
145 circular mode.
146 (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
147 HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
148
149 *** Filter analog watchdog ***
150 ==============================
151 [..]
152 (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
153 (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
154 (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
155
156 *** Filter extreme detector ***
157 ===============================
158 [..]
159 (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
160 (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
161 (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
162 (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
163
164 *** Filter conversion time ***
165 ==============================
166 [..]
167 (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
168
169 *** Callback registration ***
170 =============================
171 [..]
172 The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS when set to 1
173 allows the user to configure dynamically the driver callbacks.
174 Use functions HAL_DFSDM_Channel_RegisterCallback(),
175 HAL_DFSDM_Filter_RegisterCallback() or
176 HAL_DFSDM_Filter_RegisterAwdCallback() to register a user callback.
177
178 [..]
179 Function HAL_DFSDM_Channel_RegisterCallback() allows to register
180 following callbacks:
181 (+) CkabCallback : DFSDM channel clock absence detection callback.
182 (+) ScdCallback : DFSDM channel short circuit detection callback.
183 (+) MspInitCallback : DFSDM channel MSP init callback.
184 (+) MspDeInitCallback : DFSDM channel MSP de-init callback.
185 [..]
186 This function takes as parameters the HAL peripheral handle, the Callback ID
187 and a pointer to the user callback function.
188
189 [..]
190 Function HAL_DFSDM_Filter_RegisterCallback() allows to register
191 following callbacks:
192 (+) RegConvCpltCallback : DFSDM filter regular conversion complete callback.
193 (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.
194 (+) InjConvCpltCallback : DFSDM filter injected conversion complete callback.
195 (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.
196 (+) ErrorCallback : DFSDM filter error callback.
197 (+) MspInitCallback : DFSDM filter MSP init callback.
198 (+) MspDeInitCallback : DFSDM filter MSP de-init callback.
199 [..]
200 This function takes as parameters the HAL peripheral handle, the Callback ID
201 and a pointer to the user callback function.
202
203 [..]
204 For specific DFSDM filter analog watchdog callback use dedicated register callback:
205 HAL_DFSDM_Filter_RegisterAwdCallback().
206
207 [..]
208 Use functions HAL_DFSDM_Channel_UnRegisterCallback() or
209 HAL_DFSDM_Filter_UnRegisterCallback() to reset a callback to the default
210 weak function.
211
212 [..]
213 HAL_DFSDM_Channel_UnRegisterCallback() takes as parameters the HAL peripheral handle,
214 and the Callback ID.
215 [..]
216 This function allows to reset following callbacks:
217 (+) CkabCallback : DFSDM channel clock absence detection callback.
218 (+) ScdCallback : DFSDM channel short circuit detection callback.
219 (+) MspInitCallback : DFSDM channel MSP init callback.
220 (+) MspDeInitCallback : DFSDM channel MSP de-init callback.
221
222 [..]
223 HAL_DFSDM_Filter_UnRegisterCallback() takes as parameters the HAL peripheral handle,
224 and the Callback ID.
225 [..]
226 This function allows to reset following callbacks:
227 (+) RegConvCpltCallback : DFSDM filter regular conversion complete callback.
228 (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.
229 (+) InjConvCpltCallback : DFSDM filter injected conversion complete callback.
230 (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.
231 (+) ErrorCallback : DFSDM filter error callback.
232 (+) MspInitCallback : DFSDM filter MSP init callback.
233 (+) MspDeInitCallback : DFSDM filter MSP de-init callback.
234
235 [..]
236 For specific DFSDM filter analog watchdog callback use dedicated unregister callback:
237 HAL_DFSDM_Filter_UnRegisterAwdCallback().
238
239 [..]
240 By default, after the call of init function and if the state is RESET
241 all callbacks are reset to the corresponding legacy weak functions:
242 examples HAL_DFSDM_ChannelScdCallback(), HAL_DFSDM_FilterErrorCallback().
243 Exception done for MspInit and MspDeInit callbacks that are respectively
244 reset to the legacy weak functions in the init and de-init only when these
245 callbacks are null (not registered beforehand).
246 If not, MspInit or MspDeInit are not null, the init and de-init keep and use
247 the user MspInit/MspDeInit callbacks (registered beforehand)
248
249 [..]
250 Callbacks can be registered/unregistered in READY state only.
251 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
252 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
253 during the init/de-init.
254 In that case first register the MspInit/MspDeInit user callbacks using
255 HAL_DFSDM_Channel_RegisterCallback() or
256 HAL_DFSDM_Filter_RegisterCallback() before calling init or de-init function.
257
258 [..]
259 When The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS is set to 0 or
260 not defined, the callback registering feature is not available
261 and weak callbacks are used.
262
263 @endverbatim
264 ******************************************************************************
265 */
266
267 /* Includes ------------------------------------------------------------------*/
268 #include "stm32f7xx_hal.h"
269
270 /** @addtogroup STM32F7xx_HAL_Driver
271 * @{
272 */
273 #ifdef HAL_DFSDM_MODULE_ENABLED
274 #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
275 /** @defgroup DFSDM DFSDM
276 * @brief DFSDM HAL driver module
277 * @{
278 */
279
280 /* Private typedef -----------------------------------------------------------*/
281 /* Private define ------------------------------------------------------------*/
282 /** @defgroup DFSDM_Private_Define DFSDM Private Define
283 * @{
284 */
285
286 #define DFSDM_FLTCR1_MSB_RCH_OFFSET 8
287
288 #define DFSDM_MSB_MASK 0xFFFF0000U
289 #define DFSDM_LSB_MASK 0x0000FFFFU
290 #define DFSDM_CKAB_TIMEOUT 5000U
291 #define DFSDM1_CHANNEL_NUMBER 8U
292 /**
293 * @}
294 */
295
296 /* Private macro -------------------------------------------------------------*/
297 /* Private variables ---------------------------------------------------------*/
298 /** @defgroup DFSDM_Private_Variables DFSDM Private Variables
299 * @{
300 */
301 __IO uint32_t v_dfsdm1ChannelCounter = 0;
302 DFSDM_Channel_HandleTypeDef* a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
303 /**
304 * @}
305 */
306
307 /* Private function prototypes -----------------------------------------------*/
308 /** @defgroup DFSDM_Private_Functions DFSDM Private Functions
309 * @{
310 */
311 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
312 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance);
313 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
314 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
315 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
316 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
317 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
318 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
319 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
320 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
321 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma);
322 /**
323 * @}
324 */
325
326 /* Exported functions --------------------------------------------------------*/
327 /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
328 * @{
329 */
330
331 /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
332 * @brief Channel initialization and de-initialization functions
333 *
334 @verbatim
335 ==============================================================================
336 ##### Channel initialization and de-initialization functions #####
337 ==============================================================================
338 [..] This section provides functions allowing to:
339 (+) Initialize the DFSDM channel.
340 (+) De-initialize the DFSDM channel.
341 @endverbatim
342 * @{
343 */
344
345 /**
346 * @brief Initialize the DFSDM channel according to the specified parameters
347 * in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
348 * @param hdfsdm_channel DFSDM channel handle.
349 * @retval HAL status.
350 */
HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)351 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
352 {
353 /* Check DFSDM Channel handle */
354 if(hdfsdm_channel == NULL)
355 {
356 return HAL_ERROR;
357 }
358
359 /* Check parameters */
360 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
361 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
362 assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
363 assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
364 assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
365 assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
366 assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
367 assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
368 assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
369 assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
370 assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
371
372 /* Check that channel has not been already initialized */
373 if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
374 {
375 return HAL_ERROR;
376 }
377
378 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
379 /* Reset callback pointers to the weak predefined callbacks */
380 hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;
381 hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback;
382
383 /* Call MSP init function */
384 if(hdfsdm_channel->MspInitCallback == NULL)
385 {
386 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
387 }
388 hdfsdm_channel->MspInitCallback(hdfsdm_channel);
389 #else
390 /* Call MSP init function */
391 HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
392 #endif
393
394 /* Update the channel counter */
395 v_dfsdm1ChannelCounter++;
396
397 /* Configure output serial clock and enable global DFSDM interface only for first channel */
398 if(v_dfsdm1ChannelCounter == 1)
399 {
400 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
401 /* Set the output serial clock source */
402 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
403 DFSDM1_Channel0->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
404
405 /* Reset clock divider */
406 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
407 if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
408 {
409 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
410 /* Set the output clock divider */
411 DFSDM1_Channel0->CHCFGR1 |= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1) <<
412 DFSDM_CHCFGR1_CKOUTDIV_Pos);
413 }
414
415 /* enable the DFSDM global interface */
416 DFSDM1_Channel0->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
417 }
418
419 /* Set channel input parameters */
420 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |
421 DFSDM_CHCFGR1_CHINSEL);
422 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
423 hdfsdm_channel->Init.Input.DataPacking |
424 hdfsdm_channel->Init.Input.Pins);
425
426 /* Set serial interface parameters */
427 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
428 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
429 hdfsdm_channel->Init.SerialInterface.SpiClock);
430
431 /* Set analog watchdog parameters */
432 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
433 hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
434 ((hdfsdm_channel->Init.Awd.Oversampling - 1) << DFSDM_CHAWSCDR_AWFOSR_Pos));
435
436 /* Set channel offset and right bit shift */
437 hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
438 hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) |
439 (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos));
440
441 /* Enable DFSDM channel */
442 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
443
444 /* Set DFSDM Channel to ready state */
445 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
446
447 /* Store channel handle in DFSDM channel handle table */
448 a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
449
450 return HAL_OK;
451 }
452
453 /**
454 * @brief De-initialize the DFSDM channel.
455 * @param hdfsdm_channel DFSDM channel handle.
456 * @retval HAL status.
457 */
HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)458 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
459 {
460 /* Check DFSDM Channel handle */
461 if(hdfsdm_channel == NULL)
462 {
463 return HAL_ERROR;
464 }
465
466 /* Check parameters */
467 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
468
469 /* Check that channel has not been already deinitialized */
470 if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
471 {
472 return HAL_ERROR;
473 }
474
475 /* Disable the DFSDM channel */
476 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
477
478 /* Update the channel counter */
479 v_dfsdm1ChannelCounter--;
480
481 /* Disable global DFSDM at deinit of last channel */
482 if(v_dfsdm1ChannelCounter == 0)
483 {
484 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
485 }
486
487 /* Call MSP deinit function */
488 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
489 if(hdfsdm_channel->MspDeInitCallback == NULL)
490 {
491 hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
492 }
493 hdfsdm_channel->MspDeInitCallback(hdfsdm_channel);
494 #else
495 HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
496 #endif
497
498 /* Set DFSDM Channel in reset state */
499 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
500
501 /* Reset channel handle in DFSDM channel handle table */
502 a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
503
504 return HAL_OK;
505 }
506
507 /**
508 * @brief Initialize the DFSDM channel MSP.
509 * @param hdfsdm_channel DFSDM channel handle.
510 * @retval None
511 */
HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)512 __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
513 {
514 /* Prevent unused argument(s) compilation warning */
515 UNUSED(hdfsdm_channel);
516
517 /* NOTE : This function should not be modified, when the function is needed,
518 the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
519 */
520 }
521
522 /**
523 * @brief De-initialize the DFSDM channel MSP.
524 * @param hdfsdm_channel DFSDM channel handle.
525 * @retval None
526 */
HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)527 __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
528 {
529 /* Prevent unused argument(s) compilation warning */
530 UNUSED(hdfsdm_channel);
531
532 /* NOTE : This function should not be modified, when the function is needed,
533 the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
534 */
535 }
536 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
537 /**
538 * @brief Register a user DFSDM channel callback
539 * to be used instead of the weak predefined callback.
540 * @param hdfsdm_channel DFSDM channel handle.
541 * @param CallbackID ID of the callback to be registered.
542 * This parameter can be one of the following values:
543 * @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.
544 * @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.
545 * @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.
546 * @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.
547 * @param pCallback pointer to the callback function.
548 * @retval HAL status.
549 */
HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,pDFSDM_Channel_CallbackTypeDef pCallback)550 HAL_StatusTypeDef HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
551 HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,
552 pDFSDM_Channel_CallbackTypeDef pCallback)
553 {
554 HAL_StatusTypeDef status = HAL_OK;
555
556 if(pCallback == NULL)
557 {
558 /* update return status */
559 status = HAL_ERROR;
560 }
561 else
562 {
563 if(HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)
564 {
565 switch (CallbackID)
566 {
567 case HAL_DFSDM_CHANNEL_CKAB_CB_ID :
568 hdfsdm_channel->CkabCallback = pCallback;
569 break;
570 case HAL_DFSDM_CHANNEL_SCD_CB_ID :
571 hdfsdm_channel->ScdCallback = pCallback;
572 break;
573 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
574 hdfsdm_channel->MspInitCallback = pCallback;
575 break;
576 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
577 hdfsdm_channel->MspDeInitCallback = pCallback;
578 break;
579 default :
580 /* update return status */
581 status = HAL_ERROR;
582 break;
583 }
584 }
585 else if(HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)
586 {
587 switch (CallbackID)
588 {
589 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
590 hdfsdm_channel->MspInitCallback = pCallback;
591 break;
592 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
593 hdfsdm_channel->MspDeInitCallback = pCallback;
594 break;
595 default :
596 /* update return status */
597 status = HAL_ERROR;
598 break;
599 }
600 }
601 else
602 {
603 /* update return status */
604 status = HAL_ERROR;
605 }
606 }
607 return status;
608 }
609
610 /**
611 * @brief Unregister a user DFSDM channel callback.
612 * DFSDM channel callback is redirected to the weak predefined callback.
613 * @param hdfsdm_channel DFSDM channel handle.
614 * @param CallbackID ID of the callback to be unregistered.
615 * This parameter can be one of the following values:
616 * @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.
617 * @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.
618 * @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.
619 * @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.
620 * @retval HAL status.
621 */
HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID)622 HAL_StatusTypeDef HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
623 HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID)
624 {
625 HAL_StatusTypeDef status = HAL_OK;
626
627 if(HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)
628 {
629 switch (CallbackID)
630 {
631 case HAL_DFSDM_CHANNEL_CKAB_CB_ID :
632 hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;
633 break;
634 case HAL_DFSDM_CHANNEL_SCD_CB_ID :
635 hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback;
636 break;
637 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
638 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
639 break;
640 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
641 hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
642 break;
643 default :
644 /* update return status */
645 status = HAL_ERROR;
646 break;
647 }
648 }
649 else if(HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)
650 {
651 switch (CallbackID)
652 {
653 case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
654 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
655 break;
656 case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
657 hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
658 break;
659 default :
660 /* update return status */
661 status = HAL_ERROR;
662 break;
663 }
664 }
665 else
666 {
667 /* update return status */
668 status = HAL_ERROR;
669 }
670 return status;
671 }
672 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
673
674 /**
675 * @}
676 */
677
678 /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
679 * @brief Channel operation functions
680 *
681 @verbatim
682 ==============================================================================
683 ##### Channel operation functions #####
684 ==============================================================================
685 [..] This section provides functions allowing to:
686 (+) Manage clock absence detector feature.
687 (+) Manage short circuit detector feature.
688 (+) Get analog watchdog value.
689 (+) Modify offset value.
690 @endverbatim
691 * @{
692 */
693
694 /**
695 * @brief This function allows to start clock absence detection in polling mode.
696 * @note Same mode has to be used for all channels.
697 * @note If clock is not available on this channel during 5 seconds,
698 * clock absence detection will not be activated and function
699 * will return HAL_TIMEOUT error.
700 * @param hdfsdm_channel DFSDM channel handle.
701 * @retval HAL status
702 */
HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)703 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
704 {
705 HAL_StatusTypeDef status = HAL_OK;
706 uint32_t channel;
707 uint32_t tickstart;
708
709 /* Check parameters */
710 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
711
712 /* Check DFSDM channel state */
713 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
714 {
715 /* Return error status */
716 status = HAL_ERROR;
717 }
718 else
719 {
720 /* Get channel number from channel instance */
721 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
722
723 /* Get timeout */
724 tickstart = HAL_GetTick();
725
726 /* Clear clock absence flag */
727 while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1) != 0)
728 {
729 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
730
731 /* Check the Timeout */
732 if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
733 {
734 /* Set timeout status */
735 status = HAL_TIMEOUT;
736 break;
737 }
738 }
739
740 if(status == HAL_OK)
741 {
742 /* Start clock absence detection */
743 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
744 }
745 }
746 /* Return function status */
747 return status;
748 }
749
750 /**
751 * @brief This function allows to poll for the clock absence detection.
752 * @param hdfsdm_channel DFSDM channel handle.
753 * @param Timeout Timeout value in milliseconds.
754 * @retval HAL status
755 */
HAL_DFSDM_ChannelPollForCkab(const DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Timeout)756 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(const DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
757 uint32_t Timeout)
758 {
759 uint32_t tickstart;
760 uint32_t channel;
761
762 /* Check parameters */
763 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
764
765 /* Check DFSDM channel state */
766 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
767 {
768 /* Return error status */
769 return HAL_ERROR;
770 }
771 else
772 {
773 /* Get channel number from channel instance */
774 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
775
776 /* Get timeout */
777 tickstart = HAL_GetTick();
778
779 /* Wait clock absence detection */
780 while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1) == 0)
781 {
782 /* Check the Timeout */
783 if(Timeout != HAL_MAX_DELAY)
784 {
785 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
786 {
787 /* Return timeout status */
788 return HAL_TIMEOUT;
789 }
790 }
791 }
792
793 /* Clear clock absence detection flag */
794 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
795
796 /* Return function status */
797 return HAL_OK;
798 }
799 }
800
801 /**
802 * @brief This function allows to stop clock absence detection in polling mode.
803 * @param hdfsdm_channel DFSDM channel handle.
804 * @retval HAL status
805 */
HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)806 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
807 {
808 HAL_StatusTypeDef status = HAL_OK;
809 uint32_t channel;
810
811 /* Check parameters */
812 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
813
814 /* Check DFSDM channel state */
815 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
816 {
817 /* Return error status */
818 status = HAL_ERROR;
819 }
820 else
821 {
822 /* Stop clock absence detection */
823 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
824
825 /* Clear clock absence flag */
826 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
827 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
828 }
829 /* Return function status */
830 return status;
831 }
832
833 /**
834 * @brief This function allows to start clock absence detection in interrupt mode.
835 * @note Same mode has to be used for all channels.
836 * @note If clock is not available on this channel during 5 seconds,
837 * clock absence detection will not be activated and function
838 * will return HAL_TIMEOUT error.
839 * @param hdfsdm_channel DFSDM channel handle.
840 * @retval HAL status
841 */
HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)842 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
843 {
844 HAL_StatusTypeDef status = HAL_OK;
845 uint32_t channel;
846 uint32_t tickstart;
847
848 /* Check parameters */
849 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
850
851 /* Check DFSDM channel state */
852 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
853 {
854 /* Return error status */
855 status = HAL_ERROR;
856 }
857 else
858 {
859 /* Get channel number from channel instance */
860 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
861
862 /* Get timeout */
863 tickstart = HAL_GetTick();
864
865 /* Clear clock absence flag */
866 while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1) != 0)
867 {
868 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
869
870 /* Check the Timeout */
871 if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
872 {
873 /* Set timeout status */
874 status = HAL_TIMEOUT;
875 break;
876 }
877 }
878
879 if(status == HAL_OK)
880 {
881 /* Activate clock absence detection interrupt */
882 DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_CKABIE;
883
884 /* Start clock absence detection */
885 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
886 }
887 }
888 /* Return function status */
889 return status;
890 }
891
892 /**
893 * @brief Clock absence detection callback.
894 * @param hdfsdm_channel DFSDM channel handle.
895 * @retval None
896 */
HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)897 __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
898 {
899 /* Prevent unused argument(s) compilation warning */
900 UNUSED(hdfsdm_channel);
901
902 /* NOTE : This function should not be modified, when the callback is needed,
903 the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
904 */
905 }
906
907 /**
908 * @brief This function allows to stop clock absence detection in interrupt mode.
909 * @note Interrupt will be disabled for all channels
910 * @param hdfsdm_channel DFSDM channel handle.
911 * @retval HAL status
912 */
HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)913 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
914 {
915 HAL_StatusTypeDef status = HAL_OK;
916 uint32_t channel;
917
918 /* Check parameters */
919 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
920
921 /* Check DFSDM channel state */
922 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
923 {
924 /* Return error status */
925 status = HAL_ERROR;
926 }
927 else
928 {
929 /* Stop clock absence detection */
930 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
931
932 /* Clear clock absence flag */
933 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
934 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
935
936 /* Disable clock absence detection interrupt */
937 DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
938 }
939 /* Return function status */
940 return status;
941 }
942
943 /**
944 * @brief This function allows to start short circuit detection in polling mode.
945 * @note Same mode has to be used for all channels
946 * @param hdfsdm_channel DFSDM channel handle.
947 * @param Threshold Short circuit detector threshold.
948 * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
949 * @param BreakSignal Break signals assigned to short circuit event.
950 * This parameter can be a values combination of @ref DFSDM_BreakSignals.
951 * @retval HAL status
952 */
HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Threshold,uint32_t BreakSignal)953 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
954 uint32_t Threshold,
955 uint32_t BreakSignal)
956 {
957 HAL_StatusTypeDef status = HAL_OK;
958
959 /* Check parameters */
960 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
961 assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
962 assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
963
964 /* Check DFSDM channel state */
965 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
966 {
967 /* Return error status */
968 status = HAL_ERROR;
969 }
970 else
971 {
972 /* Configure threshold and break signals */
973 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
974 hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
975 Threshold);
976
977 /* Start short circuit detection */
978 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
979 }
980 /* Return function status */
981 return status;
982 }
983
984 /**
985 * @brief This function allows to poll for the short circuit detection.
986 * @param hdfsdm_channel DFSDM channel handle.
987 * @param Timeout Timeout value in milliseconds.
988 * @retval HAL status
989 */
HAL_DFSDM_ChannelPollForScd(const DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Timeout)990 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(const DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
991 uint32_t Timeout)
992 {
993 uint32_t tickstart;
994 uint32_t channel;
995
996 /* Check parameters */
997 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
998
999 /* Check DFSDM channel state */
1000 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1001 {
1002 /* Return error status */
1003 return HAL_ERROR;
1004 }
1005 else
1006 {
1007 /* Get channel number from channel instance */
1008 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1009
1010 /* Get timeout */
1011 tickstart = HAL_GetTick();
1012
1013 /* Wait short circuit detection */
1014 while(((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_Pos + channel)) == 0)
1015 {
1016 /* Check the Timeout */
1017 if(Timeout != HAL_MAX_DELAY)
1018 {
1019 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
1020 {
1021 /* Return timeout status */
1022 return HAL_TIMEOUT;
1023 }
1024 }
1025 }
1026
1027 /* Clear short circuit detection flag */
1028 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1029
1030 /* Return function status */
1031 return HAL_OK;
1032 }
1033 }
1034
1035 /**
1036 * @brief This function allows to stop short circuit detection in polling mode.
1037 * @param hdfsdm_channel DFSDM channel handle.
1038 * @retval HAL status
1039 */
HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1040 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1041 {
1042 HAL_StatusTypeDef status = HAL_OK;
1043 uint32_t channel;
1044
1045 /* Check parameters */
1046 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1047
1048 /* Check DFSDM channel state */
1049 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1050 {
1051 /* Return error status */
1052 status = HAL_ERROR;
1053 }
1054 else
1055 {
1056 /* Stop short circuit detection */
1057 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
1058
1059 /* Clear short circuit detection flag */
1060 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1061 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1062 }
1063 /* Return function status */
1064 return status;
1065 }
1066
1067 /**
1068 * @brief This function allows to start short circuit detection in interrupt mode.
1069 * @note Same mode has to be used for all channels
1070 * @param hdfsdm_channel DFSDM channel handle.
1071 * @param Threshold Short circuit detector threshold.
1072 * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
1073 * @param BreakSignal Break signals assigned to short circuit event.
1074 * This parameter can be a values combination of @ref DFSDM_BreakSignals.
1075 * @retval HAL status
1076 */
HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Threshold,uint32_t BreakSignal)1077 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1078 uint32_t Threshold,
1079 uint32_t BreakSignal)
1080 {
1081 HAL_StatusTypeDef status = HAL_OK;
1082
1083 /* Check parameters */
1084 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1085 assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
1086 assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
1087
1088 /* Check DFSDM channel state */
1089 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1090 {
1091 /* Return error status */
1092 status = HAL_ERROR;
1093 }
1094 else
1095 {
1096 /* Activate short circuit detection interrupt */
1097 DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_SCDIE;
1098
1099 /* Configure threshold and break signals */
1100 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
1101 hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
1102 Threshold);
1103
1104 /* Start short circuit detection */
1105 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
1106 }
1107 /* Return function status */
1108 return status;
1109 }
1110
1111 /**
1112 * @brief Short circuit detection callback.
1113 * @param hdfsdm_channel DFSDM channel handle.
1114 * @retval None
1115 */
HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1116 __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1117 {
1118 /* Prevent unused argument(s) compilation warning */
1119 UNUSED(hdfsdm_channel);
1120
1121 /* NOTE : This function should not be modified, when the callback is needed,
1122 the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
1123 */
1124 }
1125
1126 /**
1127 * @brief This function allows to stop short circuit detection in interrupt mode.
1128 * @note Interrupt will be disabled for all channels
1129 * @param hdfsdm_channel DFSDM channel handle.
1130 * @retval HAL status
1131 */
HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1132 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1133 {
1134 HAL_StatusTypeDef status = HAL_OK;
1135 uint32_t channel;
1136
1137 /* Check parameters */
1138 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1139
1140 /* Check DFSDM channel state */
1141 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1142 {
1143 /* Return error status */
1144 status = HAL_ERROR;
1145 }
1146 else
1147 {
1148 /* Stop short circuit detection */
1149 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
1150
1151 /* Clear short circuit detection flag */
1152 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1153 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1154
1155 /* Disable short circuit detection interrupt */
1156 DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
1157 }
1158 /* Return function status */
1159 return status;
1160 }
1161
1162 /**
1163 * @brief This function allows to get channel analog watchdog value.
1164 * @param hdfsdm_channel DFSDM channel handle.
1165 * @retval Channel analog watchdog value.
1166 */
HAL_DFSDM_ChannelGetAwdValue(const DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1167 int16_t HAL_DFSDM_ChannelGetAwdValue(const DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1168 {
1169 return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
1170 }
1171
1172 /**
1173 * @brief This function allows to modify channel offset value.
1174 * @param hdfsdm_channel DFSDM channel handle.
1175 * @param Offset DFSDM channel offset.
1176 * This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
1177 * @retval HAL status.
1178 */
HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,int32_t Offset)1179 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1180 int32_t Offset)
1181 {
1182 HAL_StatusTypeDef status = HAL_OK;
1183
1184 /* Check parameters */
1185 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1186 assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
1187
1188 /* Check DFSDM channel state */
1189 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1190 {
1191 /* Return error status */
1192 status = HAL_ERROR;
1193 }
1194 else
1195 {
1196 /* Modify channel offset */
1197 hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
1198 hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_Pos);
1199 }
1200 /* Return function status */
1201 return status;
1202 }
1203
1204 /**
1205 * @}
1206 */
1207
1208 /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
1209 * @brief Channel state function
1210 *
1211 @verbatim
1212 ==============================================================================
1213 ##### Channel state function #####
1214 ==============================================================================
1215 [..] This section provides function allowing to:
1216 (+) Get channel handle state.
1217 @endverbatim
1218 * @{
1219 */
1220
1221 /**
1222 * @brief This function allows to get the current DFSDM channel handle state.
1223 * @param hdfsdm_channel DFSDM channel handle.
1224 * @retval DFSDM channel state.
1225 */
HAL_DFSDM_ChannelGetState(const DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1226 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(const DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1227 {
1228 /* Return DFSDM channel handle state */
1229 return hdfsdm_channel->State;
1230 }
1231
1232 /**
1233 * @}
1234 */
1235
1236 /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
1237 * @brief Filter initialization and de-initialization functions
1238 *
1239 @verbatim
1240 ==============================================================================
1241 ##### Filter initialization and de-initialization functions #####
1242 ==============================================================================
1243 [..] This section provides functions allowing to:
1244 (+) Initialize the DFSDM filter.
1245 (+) De-initialize the DFSDM filter.
1246 @endverbatim
1247 * @{
1248 */
1249
1250 /**
1251 * @brief Initialize the DFSDM filter according to the specified parameters
1252 * in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
1253 * @param hdfsdm_filter DFSDM filter handle.
1254 * @retval HAL status.
1255 */
HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1256 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1257 {
1258 /* Check DFSDM Channel handle */
1259 if(hdfsdm_filter == NULL)
1260 {
1261 return HAL_ERROR;
1262 }
1263
1264 /* Check parameters */
1265 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1266 assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
1267 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
1268 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
1269 assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
1270 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
1271 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
1272 assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
1273 assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
1274 assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
1275
1276 /* Check parameters compatibility */
1277 if((hdfsdm_filter->Instance == DFSDM1_Filter0) &&
1278 ((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) ||
1279 (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
1280 {
1281 return HAL_ERROR;
1282 }
1283
1284 /* Initialize DFSDM filter variables with default values */
1285 hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF;
1286 hdfsdm_filter->InjectedChannelsNbr = 1;
1287 hdfsdm_filter->InjConvRemaining = 1;
1288 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE;
1289
1290 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1291 /* Reset callback pointers to the weak predefined callbacks */
1292 hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback;
1293 hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback;
1294 hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;
1295 hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback;
1296 hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;
1297 hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback;
1298
1299 /* Call MSP init function */
1300 if(hdfsdm_filter->MspInitCallback == NULL)
1301 {
1302 hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1303 }
1304 hdfsdm_filter->MspInitCallback(hdfsdm_filter);
1305 #else
1306 /* Call MSP init function */
1307 HAL_DFSDM_FilterMspInit(hdfsdm_filter);
1308 #endif
1309
1310 /* Set regular parameters */
1311 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
1312 if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
1313 {
1314 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;
1315 }
1316 else
1317 {
1318 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
1319 }
1320
1321 if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
1322 {
1323 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;
1324 }
1325 else
1326 {
1327 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
1328 }
1329
1330 /* Set injected parameters */
1331 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);
1332 if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
1333 {
1334 assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
1335 assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
1336 hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
1337 }
1338
1339 if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
1340 {
1341 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;
1342 }
1343 else
1344 {
1345 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
1346 }
1347
1348 if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
1349 {
1350 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;
1351 }
1352 else
1353 {
1354 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
1355 }
1356
1357 /* Set filter parameters */
1358 hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
1359 hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
1360 ((hdfsdm_filter->Init.FilterParam.Oversampling - 1) << DFSDM_FLTFCR_FOSR_Pos) |
1361 (hdfsdm_filter->Init.FilterParam.IntOversampling - 1));
1362
1363 /* Store regular and injected triggers and injected scan mode*/
1364 hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger;
1365 hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger;
1366 hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
1367 hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
1368
1369 /* Enable DFSDM filter */
1370 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
1371
1372 /* Set DFSDM filter to ready state */
1373 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
1374
1375 return HAL_OK;
1376 }
1377
1378 /**
1379 * @brief De-initializes the DFSDM filter.
1380 * @param hdfsdm_filter DFSDM filter handle.
1381 * @retval HAL status.
1382 */
HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1383 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1384 {
1385 /* Check DFSDM filter handle */
1386 if(hdfsdm_filter == NULL)
1387 {
1388 return HAL_ERROR;
1389 }
1390
1391 /* Check parameters */
1392 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1393
1394 /* Disable the DFSDM filter */
1395 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
1396
1397 /* Call MSP deinit function */
1398 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1399 if(hdfsdm_filter->MspDeInitCallback == NULL)
1400 {
1401 hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1402 }
1403 hdfsdm_filter->MspDeInitCallback(hdfsdm_filter);
1404 #else
1405 HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
1406 #endif
1407
1408 /* Set DFSDM filter in reset state */
1409 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
1410
1411 return HAL_OK;
1412 }
1413
1414 /**
1415 * @brief Initializes the DFSDM filter MSP.
1416 * @param hdfsdm_filter DFSDM filter handle.
1417 * @retval None
1418 */
HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1419 __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1420 {
1421 /* Prevent unused argument(s) compilation warning */
1422 UNUSED(hdfsdm_filter);
1423
1424 /* NOTE : This function should not be modified, when the function is needed,
1425 the HAL_DFSDM_FilterMspInit could be implemented in the user file.
1426 */
1427 }
1428
1429 /**
1430 * @brief De-initializes the DFSDM filter MSP.
1431 * @param hdfsdm_filter DFSDM filter handle.
1432 * @retval None
1433 */
HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1434 __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1435 {
1436 /* Prevent unused argument(s) compilation warning */
1437 UNUSED(hdfsdm_filter);
1438
1439 /* NOTE : This function should not be modified, when the function is needed,
1440 the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
1441 */
1442 }
1443
1444 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1445 /**
1446 * @brief Register a user DFSDM filter callback
1447 * to be used instead of the weak predefined callback.
1448 * @param hdfsdm_filter DFSDM filter handle.
1449 * @param CallbackID ID of the callback to be registered.
1450 * This parameter can be one of the following values:
1451 * @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.
1452 * @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.
1453 * @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.
1454 * @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.
1455 * @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.
1456 * @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.
1457 * @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.
1458 * @param pCallback pointer to the callback function.
1459 * @retval HAL status.
1460 */
HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,pDFSDM_Filter_CallbackTypeDef pCallback)1461 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1462 HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,
1463 pDFSDM_Filter_CallbackTypeDef pCallback)
1464 {
1465 HAL_StatusTypeDef status = HAL_OK;
1466
1467 if(pCallback == NULL)
1468 {
1469 /* update the error code */
1470 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1471 /* update return status */
1472 status = HAL_ERROR;
1473 }
1474 else
1475 {
1476 if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1477 {
1478 switch (CallbackID)
1479 {
1480 case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :
1481 hdfsdm_filter->RegConvCpltCallback = pCallback;
1482 break;
1483 case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :
1484 hdfsdm_filter->RegConvHalfCpltCallback = pCallback;
1485 break;
1486 case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :
1487 hdfsdm_filter->InjConvCpltCallback = pCallback;
1488 break;
1489 case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :
1490 hdfsdm_filter->InjConvHalfCpltCallback = pCallback;
1491 break;
1492 case HAL_DFSDM_FILTER_ERROR_CB_ID :
1493 hdfsdm_filter->ErrorCallback = pCallback;
1494 break;
1495 case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1496 hdfsdm_filter->MspInitCallback = pCallback;
1497 break;
1498 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1499 hdfsdm_filter->MspDeInitCallback = pCallback;
1500 break;
1501 default :
1502 /* update the error code */
1503 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1504 /* update return status */
1505 status = HAL_ERROR;
1506 break;
1507 }
1508 }
1509 else if(HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)
1510 {
1511 switch (CallbackID)
1512 {
1513 case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1514 hdfsdm_filter->MspInitCallback = pCallback;
1515 break;
1516 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1517 hdfsdm_filter->MspDeInitCallback = pCallback;
1518 break;
1519 default :
1520 /* update the error code */
1521 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1522 /* update return status */
1523 status = HAL_ERROR;
1524 break;
1525 }
1526 }
1527 else
1528 {
1529 /* update the error code */
1530 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1531 /* update return status */
1532 status = HAL_ERROR;
1533 }
1534 }
1535 return status;
1536 }
1537
1538 /**
1539 * @brief Unregister a user DFSDM filter callback.
1540 * DFSDM filter callback is redirected to the weak predefined callback.
1541 * @param hdfsdm_filter DFSDM filter handle.
1542 * @param CallbackID ID of the callback to be unregistered.
1543 * This parameter can be one of the following values:
1544 * @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.
1545 * @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.
1546 * @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.
1547 * @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.
1548 * @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.
1549 * @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.
1550 * @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.
1551 * @retval HAL status.
1552 */
HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID)1553 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1554 HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID)
1555 {
1556 HAL_StatusTypeDef status = HAL_OK;
1557
1558 if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1559 {
1560 switch (CallbackID)
1561 {
1562 case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :
1563 hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback;
1564 break;
1565 case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :
1566 hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;
1567 break;
1568 case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :
1569 hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback;
1570 break;
1571 case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :
1572 hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;
1573 break;
1574 case HAL_DFSDM_FILTER_ERROR_CB_ID :
1575 hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback;
1576 break;
1577 case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1578 hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1579 break;
1580 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1581 hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1582 break;
1583 default :
1584 /* update the error code */
1585 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1586 /* update return status */
1587 status = HAL_ERROR;
1588 break;
1589 }
1590 }
1591 else if(HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)
1592 {
1593 switch (CallbackID)
1594 {
1595 case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1596 hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1597 break;
1598 case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1599 hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1600 break;
1601 default :
1602 /* update the error code */
1603 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1604 /* update return status */
1605 status = HAL_ERROR;
1606 break;
1607 }
1608 }
1609 else
1610 {
1611 /* update the error code */
1612 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1613 /* update return status */
1614 status = HAL_ERROR;
1615 }
1616 return status;
1617 }
1618
1619 /**
1620 * @brief Register a user DFSDM filter analog watchdog callback
1621 * to be used instead of the weak predefined callback.
1622 * @param hdfsdm_filter DFSDM filter handle.
1623 * @param pCallback pointer to the DFSDM filter analog watchdog callback function.
1624 * @retval HAL status.
1625 */
HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,pDFSDM_Filter_AwdCallbackTypeDef pCallback)1626 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1627 pDFSDM_Filter_AwdCallbackTypeDef pCallback)
1628 {
1629 HAL_StatusTypeDef status = HAL_OK;
1630
1631 if(pCallback == NULL)
1632 {
1633 /* update the error code */
1634 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1635 /* update return status */
1636 status = HAL_ERROR;
1637 }
1638 else
1639 {
1640 if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1641 {
1642 hdfsdm_filter->AwdCallback = pCallback;
1643 }
1644 else
1645 {
1646 /* update the error code */
1647 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1648 /* update return status */
1649 status = HAL_ERROR;
1650 }
1651 }
1652 return status;
1653 }
1654
1655 /**
1656 * @brief Unregister a user DFSDM filter analog watchdog callback.
1657 * DFSDM filter AWD callback is redirected to the weak predefined callback.
1658 * @param hdfsdm_filter DFSDM filter handle.
1659 * @retval HAL status.
1660 */
HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1661 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1662 {
1663 HAL_StatusTypeDef status = HAL_OK;
1664
1665 if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1666 {
1667 hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback;
1668 }
1669 else
1670 {
1671 /* update the error code */
1672 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1673 /* update return status */
1674 status = HAL_ERROR;
1675 }
1676 return status;
1677 }
1678 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
1679
1680 /**
1681 * @}
1682 */
1683
1684 /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
1685 * @brief Filter control functions
1686 *
1687 @verbatim
1688 ==============================================================================
1689 ##### Filter control functions #####
1690 ==============================================================================
1691 [..] This section provides functions allowing to:
1692 (+) Select channel and enable/disable continuous mode for regular conversion.
1693 (+) Select channels for injected conversion.
1694 @endverbatim
1695 * @{
1696 */
1697
1698 /**
1699 * @brief This function allows to select channel and to enable/disable
1700 * continuous mode for regular conversion.
1701 * @param hdfsdm_filter DFSDM filter handle.
1702 * @param Channel Channel for regular conversion.
1703 * This parameter can be a value of @ref DFSDM_Channel_Selection.
1704 * @param ContinuousMode Enable/disable continuous mode for regular conversion.
1705 * This parameter can be a value of @ref DFSDM_ContinuousMode.
1706 * @retval HAL status
1707 */
HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel,uint32_t ContinuousMode)1708 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1709 uint32_t Channel,
1710 uint32_t ContinuousMode)
1711 {
1712 HAL_StatusTypeDef status = HAL_OK;
1713
1714 /* Check parameters */
1715 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1716 assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
1717 assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
1718
1719 /* Check DFSDM filter state */
1720 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
1721 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
1722 {
1723 /* Configure channel and continuous mode for regular conversion */
1724 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);
1725 if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
1726 {
1727 hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |
1728 DFSDM_FLTCR1_RCONT);
1729 }
1730 else
1731 {
1732 hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
1733 }
1734 /* Store continuous mode information */
1735 hdfsdm_filter->RegularContMode = ContinuousMode;
1736 }
1737 else
1738 {
1739 status = HAL_ERROR;
1740 }
1741
1742 /* Return function status */
1743 return status;
1744 }
1745
1746 /**
1747 * @brief This function allows to select channels for injected conversion.
1748 * @param hdfsdm_filter DFSDM filter handle.
1749 * @param Channel Channels for injected conversion.
1750 * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
1751 * @retval HAL status
1752 */
HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel)1753 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1754 uint32_t Channel)
1755 {
1756 HAL_StatusTypeDef status = HAL_OK;
1757
1758 /* Check parameters */
1759 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1760 assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
1761
1762 /* Check DFSDM filter state */
1763 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
1764 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
1765 {
1766 /* Configure channel for injected conversion */
1767 hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
1768 /* Store number of injected channels */
1769 hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
1770 /* Update number of injected channels remaining */
1771 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
1772 hdfsdm_filter->InjectedChannelsNbr : 1;
1773 }
1774 else
1775 {
1776 status = HAL_ERROR;
1777 }
1778 /* Return function status */
1779 return status;
1780 }
1781
1782 /**
1783 * @}
1784 */
1785
1786 /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
1787 * @brief Filter operation functions
1788 *
1789 @verbatim
1790 ==============================================================================
1791 ##### Filter operation functions #####
1792 ==============================================================================
1793 [..] This section provides functions allowing to:
1794 (+) Start conversion of regular/injected channel.
1795 (+) Poll for the end of regular/injected conversion.
1796 (+) Stop conversion of regular/injected channel.
1797 (+) Start conversion of regular/injected channel and enable interrupt.
1798 (+) Call the callback functions at the end of regular/injected conversions.
1799 (+) Stop conversion of regular/injected channel and disable interrupt.
1800 (+) Start conversion of regular/injected channel and enable DMA transfer.
1801 (+) Stop conversion of regular/injected channel and disable DMA transfer.
1802 (+) Start analog watchdog and enable interrupt.
1803 (+) Call the callback function when analog watchdog occurs.
1804 (+) Stop analog watchdog and disable interrupt.
1805 (+) Start extreme detector.
1806 (+) Stop extreme detector.
1807 (+) Get result of regular channel conversion.
1808 (+) Get result of injected channel conversion.
1809 (+) Get extreme detector maximum and minimum values.
1810 (+) Get conversion time.
1811 (+) Handle DFSDM interrupt request.
1812 @endverbatim
1813 * @{
1814 */
1815
1816 /**
1817 * @brief This function allows to start regular conversion in polling mode.
1818 * @note This function should be called only when DFSDM filter instance is
1819 * in idle state or if injected conversion is ongoing.
1820 * @param hdfsdm_filter DFSDM filter handle.
1821 * @retval HAL status
1822 */
HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1823 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1824 {
1825 HAL_StatusTypeDef status = HAL_OK;
1826
1827 /* Check parameters */
1828 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1829
1830 /* Check DFSDM filter state */
1831 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
1832 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
1833 {
1834 /* Start regular conversion */
1835 DFSDM_RegConvStart(hdfsdm_filter);
1836 }
1837 else
1838 {
1839 status = HAL_ERROR;
1840 }
1841 /* Return function status */
1842 return status;
1843 }
1844
1845 /**
1846 * @brief This function allows to poll for the end of regular conversion.
1847 * @note This function should be called only if regular conversion is ongoing.
1848 * @param hdfsdm_filter DFSDM filter handle.
1849 * @param Timeout Timeout value in milliseconds.
1850 * @retval HAL status
1851 */
HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Timeout)1852 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1853 uint32_t Timeout)
1854 {
1855 uint32_t tickstart;
1856
1857 /* Check parameters */
1858 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1859
1860 /* Check DFSDM filter state */
1861 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1862 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1863 {
1864 /* Return error status */
1865 return HAL_ERROR;
1866 }
1867 else
1868 {
1869 /* Get timeout */
1870 tickstart = HAL_GetTick();
1871
1872 /* Wait end of regular conversion */
1873 while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
1874 {
1875 /* Check the Timeout */
1876 if(Timeout != HAL_MAX_DELAY)
1877 {
1878 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
1879 {
1880 /* Return timeout status */
1881 return HAL_TIMEOUT;
1882 }
1883 }
1884 }
1885 /* Check if overrun occurs */
1886 if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
1887 {
1888 /* Update error code and call error callback */
1889 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
1890 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1891 hdfsdm_filter->ErrorCallback(hdfsdm_filter);
1892 #else
1893 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
1894 #endif
1895
1896 /* Clear regular overrun flag */
1897 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
1898 }
1899 /* Update DFSDM filter state only if not continuous conversion and SW trigger */
1900 if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
1901 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
1902 {
1903 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
1904 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
1905 }
1906 /* Return function status */
1907 return HAL_OK;
1908 }
1909 }
1910
1911 /**
1912 * @brief This function allows to stop regular conversion in polling mode.
1913 * @note This function should be called only if regular conversion is ongoing.
1914 * @param hdfsdm_filter DFSDM filter handle.
1915 * @retval HAL status
1916 */
HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1917 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1918 {
1919 HAL_StatusTypeDef status = HAL_OK;
1920
1921 /* Check parameters */
1922 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1923
1924 /* Check DFSDM filter state */
1925 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1926 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1927 {
1928 /* Return error status */
1929 status = HAL_ERROR;
1930 }
1931 else
1932 {
1933 /* Stop regular conversion */
1934 DFSDM_RegConvStop(hdfsdm_filter);
1935 }
1936 /* Return function status */
1937 return status;
1938 }
1939
1940 /**
1941 * @brief This function allows to start regular conversion in interrupt mode.
1942 * @note This function should be called only when DFSDM filter instance is
1943 * in idle state or if injected conversion is ongoing.
1944 * @param hdfsdm_filter DFSDM filter handle.
1945 * @retval HAL status
1946 */
HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1947 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1948 {
1949 HAL_StatusTypeDef status = HAL_OK;
1950
1951 /* Check parameters */
1952 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1953
1954 /* Check DFSDM filter state */
1955 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
1956 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
1957 {
1958 /* Enable interrupts for regular conversions */
1959 hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
1960
1961 /* Start regular conversion */
1962 DFSDM_RegConvStart(hdfsdm_filter);
1963 }
1964 else
1965 {
1966 status = HAL_ERROR;
1967 }
1968 /* Return function status */
1969 return status;
1970 }
1971
1972 /**
1973 * @brief This function allows to stop regular conversion in interrupt mode.
1974 * @note This function should be called only if regular conversion is ongoing.
1975 * @param hdfsdm_filter DFSDM filter handle.
1976 * @retval HAL status
1977 */
HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1978 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1979 {
1980 HAL_StatusTypeDef status = HAL_OK;
1981
1982 /* Check parameters */
1983 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1984
1985 /* Check DFSDM filter state */
1986 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1987 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1988 {
1989 /* Return error status */
1990 status = HAL_ERROR;
1991 }
1992 else
1993 {
1994 /* Disable interrupts for regular conversions */
1995 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
1996
1997 /* Stop regular conversion */
1998 DFSDM_RegConvStop(hdfsdm_filter);
1999 }
2000 /* Return function status */
2001 return status;
2002 }
2003
2004 /**
2005 * @brief This function allows to start regular conversion in DMA mode.
2006 * @note This function should be called only when DFSDM filter instance is
2007 * in idle state or if injected conversion is ongoing.
2008 * Please note that data on buffer will contain signed regular conversion
2009 * value on 24 most significant bits and corresponding channel on 3 least
2010 * significant bits.
2011 * @param hdfsdm_filter DFSDM filter handle.
2012 * @param pData The destination buffer address.
2013 * @param Length The length of data to be transferred from DFSDM filter to memory.
2014 * @retval HAL status
2015 */
HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int32_t * pData,uint32_t Length)2016 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2017 int32_t *pData,
2018 uint32_t Length)
2019 {
2020 HAL_StatusTypeDef status = HAL_OK;
2021
2022 /* Check parameters */
2023 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2024
2025 /* Check destination address and length */
2026 if((pData == NULL) || (Length == 0))
2027 {
2028 status = HAL_ERROR;
2029 }
2030 /* Check that DMA is enabled for regular conversion */
2031 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
2032 {
2033 status = HAL_ERROR;
2034 }
2035 /* Check parameters compatibility */
2036 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2037 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2038 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
2039 (Length != 1))
2040 {
2041 status = HAL_ERROR;
2042 }
2043 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2044 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2045 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
2046 {
2047 status = HAL_ERROR;
2048 }
2049 /* Check DFSDM filter state */
2050 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2051 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2052 {
2053 /* Set callbacks on DMA handler */
2054 hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
2055 hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
2056 hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
2057 DFSDM_DMARegularHalfConvCplt : NULL;
2058
2059 /* Start DMA in interrupt mode */
2060 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
2061 (uint32_t) pData, Length) != HAL_OK)
2062 {
2063 /* Set DFSDM filter in error state */
2064 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2065 status = HAL_ERROR;
2066 }
2067 else
2068 {
2069 /* Start regular conversion */
2070 DFSDM_RegConvStart(hdfsdm_filter);
2071 }
2072 }
2073 else
2074 {
2075 status = HAL_ERROR;
2076 }
2077 /* Return function status */
2078 return status;
2079 }
2080
2081 /**
2082 * @brief This function allows to start regular conversion in DMA mode and to get
2083 * only the 16 most significant bits of conversion.
2084 * @note This function should be called only when DFSDM filter instance is
2085 * in idle state or if injected conversion is ongoing.
2086 * Please note that data on buffer will contain signed 16 most significant
2087 * bits of regular conversion.
2088 * @param hdfsdm_filter DFSDM filter handle.
2089 * @param pData The destination buffer address.
2090 * @param Length The length of data to be transferred from DFSDM filter to memory.
2091 * @retval HAL status
2092 */
HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int16_t * pData,uint32_t Length)2093 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2094 int16_t *pData,
2095 uint32_t Length)
2096 {
2097 HAL_StatusTypeDef status = HAL_OK;
2098
2099 /* Check parameters */
2100 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2101
2102 /* Check destination address and length */
2103 if((pData == NULL) || (Length == 0))
2104 {
2105 status = HAL_ERROR;
2106 }
2107 /* Check that DMA is enabled for regular conversion */
2108 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
2109 {
2110 status = HAL_ERROR;
2111 }
2112 /* Check parameters compatibility */
2113 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2114 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2115 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
2116 (Length != 1))
2117 {
2118 status = HAL_ERROR;
2119 }
2120 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2121 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2122 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
2123 {
2124 status = HAL_ERROR;
2125 }
2126 /* Check DFSDM filter state */
2127 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2128 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2129 {
2130 /* Set callbacks on DMA handler */
2131 hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
2132 hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
2133 hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
2134 DFSDM_DMARegularHalfConvCplt : NULL;
2135
2136 /* Start DMA in interrupt mode */
2137 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2, \
2138 (uint32_t) pData, Length) != HAL_OK)
2139 {
2140 /* Set DFSDM filter in error state */
2141 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2142 status = HAL_ERROR;
2143 }
2144 else
2145 {
2146 /* Start regular conversion */
2147 DFSDM_RegConvStart(hdfsdm_filter);
2148 }
2149 }
2150 else
2151 {
2152 status = HAL_ERROR;
2153 }
2154 /* Return function status */
2155 return status;
2156 }
2157
2158 /**
2159 * @brief This function allows to stop regular conversion in DMA mode.
2160 * @note This function should be called only if regular conversion is ongoing.
2161 * @param hdfsdm_filter DFSDM filter handle.
2162 * @retval HAL status
2163 */
HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2164 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2165 {
2166 HAL_StatusTypeDef status = HAL_OK;
2167
2168 /* Check parameters */
2169 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2170
2171 /* Check DFSDM filter state */
2172 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
2173 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2174 {
2175 /* Return error status */
2176 status = HAL_ERROR;
2177 }
2178 else
2179 {
2180 /* Stop current DMA transfer */
2181 if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
2182 {
2183 /* Set DFSDM filter in error state */
2184 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2185 status = HAL_ERROR;
2186 }
2187 else
2188 {
2189 /* Stop regular conversion */
2190 DFSDM_RegConvStop(hdfsdm_filter);
2191 }
2192 }
2193 /* Return function status */
2194 return status;
2195 }
2196
2197 /**
2198 * @brief This function allows to get regular conversion value.
2199 * @param hdfsdm_filter DFSDM filter handle.
2200 * @param Channel Corresponding channel of regular conversion.
2201 * @retval Regular conversion value
2202 */
HAL_DFSDM_FilterGetRegularValue(const DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2203 int32_t HAL_DFSDM_FilterGetRegularValue(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2204 uint32_t *Channel)
2205 {
2206 uint32_t reg = 0;
2207 int32_t value = 0;
2208
2209 /* Check parameters */
2210 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2211 assert_param(Channel != NULL);
2212
2213 /* Get value of data register for regular channel */
2214 reg = hdfsdm_filter->Instance->FLTRDATAR;
2215
2216 /* Extract channel and regular conversion value */
2217 *Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
2218 value = ((int32_t)(reg & DFSDM_FLTRDATAR_RDATA) >> DFSDM_FLTRDATAR_RDATA_Pos);
2219
2220 /* return regular conversion value */
2221 return value;
2222 }
2223
2224 /**
2225 * @brief This function allows to start injected conversion in polling mode.
2226 * @note This function should be called only when DFSDM filter instance is
2227 * in idle state or if regular conversion is ongoing.
2228 * @param hdfsdm_filter DFSDM filter handle.
2229 * @retval HAL status
2230 */
HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2231 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2232 {
2233 HAL_StatusTypeDef status = HAL_OK;
2234
2235 /* Check parameters */
2236 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2237
2238 /* Check DFSDM filter state */
2239 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2240 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2241 {
2242 /* Start injected conversion */
2243 DFSDM_InjConvStart(hdfsdm_filter);
2244 }
2245 else
2246 {
2247 status = HAL_ERROR;
2248 }
2249 /* Return function status */
2250 return status;
2251 }
2252
2253 /**
2254 * @brief This function allows to poll for the end of injected conversion.
2255 * @note This function should be called only if injected conversion is ongoing.
2256 * @param hdfsdm_filter DFSDM filter handle.
2257 * @param Timeout Timeout value in milliseconds.
2258 * @retval HAL status
2259 */
HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Timeout)2260 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2261 uint32_t Timeout)
2262 {
2263 uint32_t tickstart;
2264
2265 /* Check parameters */
2266 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2267
2268 /* Check DFSDM filter state */
2269 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2270 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2271 {
2272 /* Return error status */
2273 return HAL_ERROR;
2274 }
2275 else
2276 {
2277 /* Get timeout */
2278 tickstart = HAL_GetTick();
2279
2280 /* Wait end of injected conversions */
2281 while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
2282 {
2283 /* Check the Timeout */
2284 if(Timeout != HAL_MAX_DELAY)
2285 {
2286 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
2287 {
2288 /* Return timeout status */
2289 return HAL_TIMEOUT;
2290 }
2291 }
2292 }
2293 /* Check if overrun occurs */
2294 if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
2295 {
2296 /* Update error code and call error callback */
2297 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
2298 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2299 hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2300 #else
2301 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2302 #endif
2303
2304 /* Clear injected overrun flag */
2305 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
2306 }
2307
2308 /* Update remaining injected conversions */
2309 hdfsdm_filter->InjConvRemaining--;
2310 if(hdfsdm_filter->InjConvRemaining == 0)
2311 {
2312 /* Update DFSDM filter state only if trigger is software */
2313 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
2314 {
2315 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
2316 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
2317 }
2318
2319 /* end of injected sequence, reset the value */
2320 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
2321 hdfsdm_filter->InjectedChannelsNbr : 1;
2322 }
2323
2324 /* Return function status */
2325 return HAL_OK;
2326 }
2327 }
2328
2329 /**
2330 * @brief This function allows to stop injected conversion in polling mode.
2331 * @note This function should be called only if injected conversion is ongoing.
2332 * @param hdfsdm_filter DFSDM filter handle.
2333 * @retval HAL status
2334 */
HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2335 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2336 {
2337 HAL_StatusTypeDef status = HAL_OK;
2338
2339 /* Check parameters */
2340 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2341
2342 /* Check DFSDM filter state */
2343 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2344 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2345 {
2346 /* Return error status */
2347 status = HAL_ERROR;
2348 }
2349 else
2350 {
2351 /* Stop injected conversion */
2352 DFSDM_InjConvStop(hdfsdm_filter);
2353 }
2354 /* Return function status */
2355 return status;
2356 }
2357
2358 /**
2359 * @brief This function allows to start injected conversion in interrupt mode.
2360 * @note This function should be called only when DFSDM filter instance is
2361 * in idle state or if regular conversion is ongoing.
2362 * @param hdfsdm_filter DFSDM filter handle.
2363 * @retval HAL status
2364 */
HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2365 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2366 {
2367 HAL_StatusTypeDef status = HAL_OK;
2368
2369 /* Check parameters */
2370 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2371
2372 /* Check DFSDM filter state */
2373 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2374 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2375 {
2376 /* Enable interrupts for injected conversions */
2377 hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
2378
2379 /* Start injected conversion */
2380 DFSDM_InjConvStart(hdfsdm_filter);
2381 }
2382 else
2383 {
2384 status = HAL_ERROR;
2385 }
2386 /* Return function status */
2387 return status;
2388 }
2389
2390 /**
2391 * @brief This function allows to stop injected conversion in interrupt mode.
2392 * @note This function should be called only if injected conversion is ongoing.
2393 * @param hdfsdm_filter DFSDM filter handle.
2394 * @retval HAL status
2395 */
HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2396 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2397 {
2398 HAL_StatusTypeDef status = HAL_OK;
2399
2400 /* Check parameters */
2401 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2402
2403 /* Check DFSDM filter state */
2404 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2405 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2406 {
2407 /* Return error status */
2408 status = HAL_ERROR;
2409 }
2410 else
2411 {
2412 /* Disable interrupts for injected conversions */
2413 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
2414
2415 /* Stop injected conversion */
2416 DFSDM_InjConvStop(hdfsdm_filter);
2417 }
2418 /* Return function status */
2419 return status;
2420 }
2421
2422 /**
2423 * @brief This function allows to start injected conversion in DMA mode.
2424 * @note This function should be called only when DFSDM filter instance is
2425 * in idle state or if regular conversion is ongoing.
2426 * Please note that data on buffer will contain signed injected conversion
2427 * value on 24 most significant bits and corresponding channel on 3 least
2428 * significant bits.
2429 * @param hdfsdm_filter DFSDM filter handle.
2430 * @param pData The destination buffer address.
2431 * @param Length The length of data to be transferred from DFSDM filter to memory.
2432 * @retval HAL status
2433 */
HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int32_t * pData,uint32_t Length)2434 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2435 int32_t *pData,
2436 uint32_t Length)
2437 {
2438 HAL_StatusTypeDef status = HAL_OK;
2439
2440 /* Check parameters */
2441 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2442
2443 /* Check destination address and length */
2444 if((pData == NULL) || (Length == 0))
2445 {
2446 status = HAL_ERROR;
2447 }
2448 /* Check that DMA is enabled for injected conversion */
2449 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
2450 {
2451 status = HAL_ERROR;
2452 }
2453 /* Check parameters compatibility */
2454 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2455 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
2456 (Length > hdfsdm_filter->InjConvRemaining))
2457 {
2458 status = HAL_ERROR;
2459 }
2460 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2461 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
2462 {
2463 status = HAL_ERROR;
2464 }
2465 /* Check DFSDM filter state */
2466 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2467 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2468 {
2469 /* Set callbacks on DMA handler */
2470 hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
2471 hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
2472 hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
2473 DFSDM_DMAInjectedHalfConvCplt : NULL;
2474
2475 /* Start DMA in interrupt mode */
2476 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
2477 (uint32_t) pData, Length) != HAL_OK)
2478 {
2479 /* Set DFSDM filter in error state */
2480 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2481 status = HAL_ERROR;
2482 }
2483 else
2484 {
2485 /* Start injected conversion */
2486 DFSDM_InjConvStart(hdfsdm_filter);
2487 }
2488 }
2489 else
2490 {
2491 status = HAL_ERROR;
2492 }
2493 /* Return function status */
2494 return status;
2495 }
2496
2497 /**
2498 * @brief This function allows to start injected conversion in DMA mode and to get
2499 * only the 16 most significant bits of conversion.
2500 * @note This function should be called only when DFSDM filter instance is
2501 * in idle state or if regular conversion is ongoing.
2502 * Please note that data on buffer will contain signed 16 most significant
2503 * bits of injected conversion.
2504 * @param hdfsdm_filter DFSDM filter handle.
2505 * @param pData The destination buffer address.
2506 * @param Length The length of data to be transferred from DFSDM filter to memory.
2507 * @retval HAL status
2508 */
HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int16_t * pData,uint32_t Length)2509 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2510 int16_t *pData,
2511 uint32_t Length)
2512 {
2513 HAL_StatusTypeDef status = HAL_OK;
2514
2515 /* Check parameters */
2516 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2517
2518 /* Check destination address and length */
2519 if((pData == NULL) || (Length == 0))
2520 {
2521 status = HAL_ERROR;
2522 }
2523 /* Check that DMA is enabled for injected conversion */
2524 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
2525 {
2526 status = HAL_ERROR;
2527 }
2528 /* Check parameters compatibility */
2529 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2530 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
2531 (Length > hdfsdm_filter->InjConvRemaining))
2532 {
2533 status = HAL_ERROR;
2534 }
2535 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2536 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
2537 {
2538 status = HAL_ERROR;
2539 }
2540 /* Check DFSDM filter state */
2541 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2542 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2543 {
2544 /* Set callbacks on DMA handler */
2545 hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
2546 hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
2547 hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
2548 DFSDM_DMAInjectedHalfConvCplt : NULL;
2549
2550 /* Start DMA in interrupt mode */
2551 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2, \
2552 (uint32_t) pData, Length) != HAL_OK)
2553 {
2554 /* Set DFSDM filter in error state */
2555 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2556 status = HAL_ERROR;
2557 }
2558 else
2559 {
2560 /* Start injected conversion */
2561 DFSDM_InjConvStart(hdfsdm_filter);
2562 }
2563 }
2564 else
2565 {
2566 status = HAL_ERROR;
2567 }
2568 /* Return function status */
2569 return status;
2570 }
2571
2572 /**
2573 * @brief This function allows to stop injected conversion in DMA mode.
2574 * @note This function should be called only if injected conversion is ongoing.
2575 * @param hdfsdm_filter DFSDM filter handle.
2576 * @retval HAL status
2577 */
HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2578 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2579 {
2580 HAL_StatusTypeDef status = HAL_OK;
2581
2582 /* Check parameters */
2583 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2584
2585 /* Check DFSDM filter state */
2586 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2587 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2588 {
2589 /* Return error status */
2590 status = HAL_ERROR;
2591 }
2592 else
2593 {
2594 /* Stop current DMA transfer */
2595 if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
2596 {
2597 /* Set DFSDM filter in error state */
2598 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2599 status = HAL_ERROR;
2600 }
2601 else
2602 {
2603 /* Stop regular conversion */
2604 DFSDM_InjConvStop(hdfsdm_filter);
2605 }
2606 }
2607 /* Return function status */
2608 return status;
2609 }
2610
2611 /**
2612 * @brief This function allows to get injected conversion value.
2613 * @param hdfsdm_filter DFSDM filter handle.
2614 * @param Channel Corresponding channel of injected conversion.
2615 * @retval Injected conversion value
2616 */
HAL_DFSDM_FilterGetInjectedValue(const DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2617 int32_t HAL_DFSDM_FilterGetInjectedValue(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2618 uint32_t *Channel)
2619 {
2620 uint32_t reg = 0;
2621 int32_t value = 0;
2622
2623 /* Check parameters */
2624 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2625 assert_param(Channel != NULL);
2626
2627 /* Get value of data register for injected channel */
2628 reg = hdfsdm_filter->Instance->FLTJDATAR;
2629
2630 /* Extract channel and injected conversion value */
2631 *Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
2632 value = ((int32_t)(reg & DFSDM_FLTJDATAR_JDATA) >> DFSDM_FLTJDATAR_JDATA_Pos);
2633
2634 /* return regular conversion value */
2635 return value;
2636 }
2637
2638 /**
2639 * @brief This function allows to start filter analog watchdog in interrupt mode.
2640 * @param hdfsdm_filter DFSDM filter handle.
2641 * @param awdParam DFSDM filter analog watchdog parameters.
2642 * @retval HAL status
2643 */
HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,const DFSDM_Filter_AwdParamTypeDef * awdParam)2644 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2645 const DFSDM_Filter_AwdParamTypeDef *awdParam)
2646 {
2647 HAL_StatusTypeDef status = HAL_OK;
2648
2649 /* Check parameters */
2650 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2651 assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
2652 assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
2653 assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
2654 assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
2655 assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
2656 assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
2657
2658 /* Check DFSDM filter state */
2659 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2660 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2661 {
2662 /* Return error status */
2663 status = HAL_ERROR;
2664 }
2665 else
2666 {
2667 /* Set analog watchdog data source */
2668 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
2669 hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource;
2670
2671 /* Set thresholds and break signals */
2672 hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
2673 hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_AWHT_Pos) | \
2674 awdParam->HighBreakSignal);
2675 hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
2676 hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_AWLT_Pos) | \
2677 awdParam->LowBreakSignal);
2678
2679 /* Set channels and interrupt for analog watchdog */
2680 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
2681 hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_Pos) | \
2682 DFSDM_FLTCR2_AWDIE);
2683 }
2684 /* Return function status */
2685 return status;
2686 }
2687
2688 /**
2689 * @brief This function allows to stop filter analog watchdog in interrupt mode.
2690 * @param hdfsdm_filter DFSDM filter handle.
2691 * @retval HAL status
2692 */
HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2693 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2694 {
2695 HAL_StatusTypeDef status = HAL_OK;
2696
2697 /* Check parameters */
2698 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2699
2700 /* Check DFSDM filter state */
2701 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2702 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2703 {
2704 /* Return error status */
2705 status = HAL_ERROR;
2706 }
2707 else
2708 {
2709 /* Reset channels for analog watchdog and deactivate interrupt */
2710 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE);
2711
2712 /* Clear all analog watchdog flags */
2713 hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF);
2714
2715 /* Reset thresholds and break signals */
2716 hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
2717 hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
2718
2719 /* Reset analog watchdog data source */
2720 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
2721 }
2722 /* Return function status */
2723 return status;
2724 }
2725
2726 /**
2727 * @brief This function allows to start extreme detector feature.
2728 * @param hdfsdm_filter DFSDM filter handle.
2729 * @param Channel Channels where extreme detector is enabled.
2730 * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
2731 * @retval HAL status
2732 */
HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel)2733 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2734 uint32_t Channel)
2735 {
2736 HAL_StatusTypeDef status = HAL_OK;
2737
2738 /* Check parameters */
2739 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2740 assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
2741
2742 /* Check DFSDM filter state */
2743 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2744 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2745 {
2746 /* Return error status */
2747 status = HAL_ERROR;
2748 }
2749 else
2750 {
2751 /* Set channels for extreme detector */
2752 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
2753 hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_Pos);
2754 }
2755 /* Return function status */
2756 return status;
2757 }
2758
2759 /**
2760 * @brief This function allows to stop extreme detector feature.
2761 * @param hdfsdm_filter DFSDM filter handle.
2762 * @retval HAL status
2763 */
HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2764 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2765 {
2766 HAL_StatusTypeDef status = HAL_OK;
2767 __IO uint32_t reg1;
2768 __IO uint32_t reg2;
2769
2770 /* Check parameters */
2771 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2772
2773 /* Check DFSDM filter state */
2774 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2775 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2776 {
2777 /* Return error status */
2778 status = HAL_ERROR;
2779 }
2780 else
2781 {
2782 /* Reset channels for extreme detector */
2783 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
2784
2785 /* Clear extreme detector values */
2786 reg1 = hdfsdm_filter->Instance->FLTEXMAX;
2787 reg2 = hdfsdm_filter->Instance->FLTEXMIN;
2788 UNUSED(reg1); /* To avoid GCC warning */
2789 UNUSED(reg2); /* To avoid GCC warning */
2790 }
2791 /* Return function status */
2792 return status;
2793 }
2794
2795 /**
2796 * @brief This function allows to get extreme detector maximum value.
2797 * @param hdfsdm_filter DFSDM filter handle.
2798 * @param Channel Corresponding channel.
2799 * @retval Extreme detector maximum value
2800 * This value is between Min_Data = -8388608 and Max_Data = 8388607.
2801 */
HAL_DFSDM_FilterGetExdMaxValue(const DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2802 int32_t HAL_DFSDM_FilterGetExdMaxValue(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2803 uint32_t *Channel)
2804 {
2805 uint32_t reg = 0;
2806 int32_t value = 0;
2807
2808 /* Check parameters */
2809 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2810 assert_param(Channel != NULL);
2811
2812 /* Get value of extreme detector maximum register */
2813 reg = hdfsdm_filter->Instance->FLTEXMAX;
2814
2815 /* Extract channel and extreme detector maximum value */
2816 *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
2817 value = ((int32_t)(reg & DFSDM_FLTEXMAX_EXMAX) >> DFSDM_FLTEXMAX_EXMAX_Pos);
2818
2819 /* return extreme detector maximum value */
2820 return value;
2821 }
2822
2823 /**
2824 * @brief This function allows to get extreme detector minimum value.
2825 * @param hdfsdm_filter DFSDM filter handle.
2826 * @param Channel Corresponding channel.
2827 * @retval Extreme detector minimum value
2828 * This value is between Min_Data = -8388608 and Max_Data = 8388607.
2829 */
HAL_DFSDM_FilterGetExdMinValue(const DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2830 int32_t HAL_DFSDM_FilterGetExdMinValue(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2831 uint32_t *Channel)
2832 {
2833 uint32_t reg = 0;
2834 int32_t value = 0;
2835
2836 /* Check parameters */
2837 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2838 assert_param(Channel != NULL);
2839
2840 /* Get value of extreme detector minimum register */
2841 reg = hdfsdm_filter->Instance->FLTEXMIN;
2842
2843 /* Extract channel and extreme detector minimum value */
2844 *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
2845 value = ((int32_t)(reg & DFSDM_FLTEXMIN_EXMIN) >> DFSDM_FLTEXMIN_EXMIN_Pos);
2846
2847 /* return extreme detector minimum value */
2848 return value;
2849 }
2850
2851 /**
2852 * @brief This function allows to get conversion time value.
2853 * @param hdfsdm_filter DFSDM filter handle.
2854 * @retval Conversion time value
2855 * @note To get time in second, this value has to be divided by DFSDM clock frequency.
2856 */
HAL_DFSDM_FilterGetConvTimeValue(const DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2857 uint32_t HAL_DFSDM_FilterGetConvTimeValue(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2858 {
2859 uint32_t reg = 0;
2860 uint32_t value = 0;
2861
2862 /* Check parameters */
2863 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2864
2865 /* Get value of conversion timer register */
2866 reg = hdfsdm_filter->Instance->FLTCNVTIMR;
2867
2868 /* Extract conversion time value */
2869 value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_CNVCNT_Pos);
2870
2871 /* return extreme detector minimum value */
2872 return value;
2873 }
2874
2875 /**
2876 * @brief This function handles the DFSDM interrupts.
2877 * @param hdfsdm_filter DFSDM filter handle.
2878 * @retval None
2879 */
HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2880 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2881 {
2882 /* Check if overrun occurs during regular conversion */
2883 if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) != 0) && \
2884 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_ROVRIE) != 0))
2885 {
2886 /* Clear regular overrun flag */
2887 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
2888
2889 /* Update error code */
2890 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
2891
2892 /* Call error callback */
2893 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2894 hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2895 #else
2896 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2897 #endif
2898 }
2899 /* Check if overrun occurs during injected conversion */
2900 else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) != 0) && \
2901 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JOVRIE) != 0))
2902 {
2903 /* Clear injected overrun flag */
2904 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
2905
2906 /* Update error code */
2907 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
2908
2909 /* Call error callback */
2910 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2911 hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2912 #else
2913 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2914 #endif
2915 }
2916 /* Check if end of regular conversion */
2917 else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != 0) && \
2918 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_REOCIE) != 0))
2919 {
2920 /* Call regular conversion complete callback */
2921 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2922 hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);
2923 #else
2924 HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
2925 #endif
2926
2927 /* End of conversion if mode is not continuous and software trigger */
2928 if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2929 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
2930 {
2931 /* Disable interrupts for regular conversions */
2932 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
2933
2934 /* Update DFSDM filter state */
2935 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
2936 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
2937 }
2938 }
2939 /* Check if end of injected conversion */
2940 else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != 0) && \
2941 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JEOCIE) != 0))
2942 {
2943 /* Call injected conversion complete callback */
2944 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2945 hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);
2946 #else
2947 HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
2948 #endif
2949
2950 /* Update remaining injected conversions */
2951 hdfsdm_filter->InjConvRemaining--;
2952 if(hdfsdm_filter->InjConvRemaining == 0)
2953 {
2954 /* End of conversion if trigger is software */
2955 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
2956 {
2957 /* Disable interrupts for injected conversions */
2958 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
2959
2960 /* Update DFSDM filter state */
2961 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
2962 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
2963 }
2964 /* end of injected sequence, reset the value */
2965 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
2966 hdfsdm_filter->InjectedChannelsNbr : 1;
2967 }
2968 }
2969 /* Check if analog watchdog occurs */
2970 else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_AWDF) != 0) && \
2971 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_AWDIE) != 0))
2972 {
2973 uint32_t reg = 0;
2974 uint32_t threshold = 0;
2975 uint32_t channel = 0;
2976
2977 /* Get channel and threshold */
2978 reg = hdfsdm_filter->Instance->FLTAWSR;
2979 threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
2980 if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
2981 {
2982 reg = reg >> DFSDM_FLTAWSR_AWHTF_Pos;
2983 }
2984 while((reg & 1) == 0)
2985 {
2986 channel++;
2987 reg = reg >> 1;
2988 }
2989 /* Clear analog watchdog flag */
2990 hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
2991 (1 << (DFSDM_FLTAWSR_AWHTF_Pos + channel)) : \
2992 (1 << channel);
2993
2994 /* Call analog watchdog callback */
2995 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2996 hdfsdm_filter->AwdCallback(hdfsdm_filter, channel, threshold);
2997 #else
2998 HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
2999 #endif
3000 }
3001 /* Check if clock absence occurs */
3002 else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
3003 ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) != 0) && \
3004 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_CKABIE) != 0))
3005 {
3006 uint32_t reg = 0;
3007 uint32_t channel = 0;
3008
3009 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_Pos);
3010
3011 while(channel < DFSDM1_CHANNEL_NUMBER)
3012 {
3013 /* Check if flag is set and corresponding channel is enabled */
3014 if(((reg & 1) != 0) && (a_dfsdm1ChannelHandle[channel] != NULL))
3015 {
3016 /* Check clock absence has been enabled for this channel */
3017 if((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0)
3018 {
3019 /* Clear clock absence flag */
3020 hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
3021
3022 /* Call clock absence callback */
3023 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3024 a_dfsdm1ChannelHandle[channel]->CkabCallback(a_dfsdm1ChannelHandle[channel]);
3025 #else
3026 HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);
3027 #endif
3028 }
3029 }
3030 channel++;
3031 reg = reg >> 1;
3032 }
3033 }
3034 /* Check if short circuit detection occurs */
3035 else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
3036 ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) != 0) && \
3037 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_SCDIE) != 0))
3038 {
3039 uint32_t reg = 0;
3040 uint32_t channel = 0;
3041
3042 /* Get channel */
3043 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_Pos);
3044 while((reg & 1) == 0)
3045 {
3046 channel++;
3047 reg = reg >> 1;
3048 }
3049
3050 /* Clear short circuit detection flag */
3051 hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
3052
3053 /* Call short circuit detection callback */
3054 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3055 a_dfsdm1ChannelHandle[channel]->ScdCallback(a_dfsdm1ChannelHandle[channel]);
3056 #else
3057 HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);
3058 #endif
3059 }
3060 }
3061
3062 /**
3063 * @brief Regular conversion complete callback.
3064 * @note In interrupt mode, user has to read conversion value in this function
3065 * using HAL_DFSDM_FilterGetRegularValue.
3066 * @param hdfsdm_filter DFSDM filter handle.
3067 * @retval None
3068 */
HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3069 __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3070 {
3071 /* Prevent unused argument(s) compilation warning */
3072 UNUSED(hdfsdm_filter);
3073
3074 /* NOTE : This function should not be modified, when the callback is needed,
3075 the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
3076 */
3077 }
3078
3079 /**
3080 * @brief Half regular conversion complete callback.
3081 * @param hdfsdm_filter DFSDM filter handle.
3082 * @retval None
3083 */
HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3084 __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3085 {
3086 /* Prevent unused argument(s) compilation warning */
3087 UNUSED(hdfsdm_filter);
3088
3089 /* NOTE : This function should not be modified, when the callback is needed,
3090 the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
3091 */
3092 }
3093
3094 /**
3095 * @brief Injected conversion complete callback.
3096 * @note In interrupt mode, user has to read conversion value in this function
3097 * using HAL_DFSDM_FilterGetInjectedValue.
3098 * @param hdfsdm_filter DFSDM filter handle.
3099 * @retval None
3100 */
HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3101 __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3102 {
3103 /* Prevent unused argument(s) compilation warning */
3104 UNUSED(hdfsdm_filter);
3105
3106 /* NOTE : This function should not be modified, when the callback is needed,
3107 the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
3108 */
3109 }
3110
3111 /**
3112 * @brief Half injected conversion complete callback.
3113 * @param hdfsdm_filter DFSDM filter handle.
3114 * @retval None
3115 */
HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3116 __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3117 {
3118 /* Prevent unused argument(s) compilation warning */
3119 UNUSED(hdfsdm_filter);
3120
3121 /* NOTE : This function should not be modified, when the callback is needed,
3122 the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
3123 */
3124 }
3125
3126 /**
3127 * @brief Filter analog watchdog callback.
3128 * @param hdfsdm_filter DFSDM filter handle.
3129 * @param Channel Corresponding channel.
3130 * @param Threshold Low or high threshold has been reached.
3131 * @retval None
3132 */
HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel,uint32_t Threshold)3133 __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
3134 uint32_t Channel, uint32_t Threshold)
3135 {
3136 /* Prevent unused argument(s) compilation warning */
3137 UNUSED(hdfsdm_filter);
3138 UNUSED(Channel);
3139 UNUSED(Threshold);
3140
3141 /* NOTE : This function should not be modified, when the callback is needed,
3142 the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
3143 */
3144 }
3145
3146 /**
3147 * @brief Error callback.
3148 * @param hdfsdm_filter DFSDM filter handle.
3149 * @retval None
3150 */
HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3151 __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3152 {
3153 /* Prevent unused argument(s) compilation warning */
3154 UNUSED(hdfsdm_filter);
3155
3156 /* NOTE : This function should not be modified, when the callback is needed,
3157 the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
3158 */
3159 }
3160
3161 /**
3162 * @}
3163 */
3164
3165 /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
3166 * @brief Filter state functions
3167 *
3168 @verbatim
3169 ==============================================================================
3170 ##### Filter state functions #####
3171 ==============================================================================
3172 [..] This section provides functions allowing to:
3173 (+) Get the DFSDM filter state.
3174 (+) Get the DFSDM filter error.
3175 @endverbatim
3176 * @{
3177 */
3178
3179 /**
3180 * @brief This function allows to get the current DFSDM filter handle state.
3181 * @param hdfsdm_filter DFSDM filter handle.
3182 * @retval DFSDM filter state.
3183 */
HAL_DFSDM_FilterGetState(const DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3184 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3185 {
3186 /* Return DFSDM filter handle state */
3187 return hdfsdm_filter->State;
3188 }
3189
3190 /**
3191 * @brief This function allows to get the current DFSDM filter error.
3192 * @param hdfsdm_filter DFSDM filter handle.
3193 * @retval DFSDM filter error code.
3194 */
HAL_DFSDM_FilterGetError(const DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3195 uint32_t HAL_DFSDM_FilterGetError(const DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3196 {
3197 return hdfsdm_filter->ErrorCode;
3198 }
3199
3200 /**
3201 * @}
3202 */
3203
3204 /**
3205 * @}
3206 */
3207 /* End of exported functions -------------------------------------------------*/
3208
3209 /* Private functions ---------------------------------------------------------*/
3210 /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
3211 * @{
3212 */
3213
3214 /**
3215 * @brief DMA half transfer complete callback for regular conversion.
3216 * @param hdma DMA handle.
3217 * @retval None
3218 */
DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef * hdma)3219 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
3220 {
3221 /* Get DFSDM filter handle */
3222 DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3223
3224 /* Call regular half conversion complete callback */
3225 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3226 hdfsdm_filter->RegConvHalfCpltCallback(hdfsdm_filter);
3227 #else
3228 HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
3229 #endif
3230 }
3231
3232 /**
3233 * @brief DMA transfer complete callback for regular conversion.
3234 * @param hdma DMA handle.
3235 * @retval None
3236 */
DFSDM_DMARegularConvCplt(DMA_HandleTypeDef * hdma)3237 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
3238 {
3239 /* Get DFSDM filter handle */
3240 DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3241
3242 /* Call regular conversion complete callback */
3243 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3244 hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);
3245 #else
3246 HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
3247 #endif
3248 }
3249
3250 /**
3251 * @brief DMA half transfer complete callback for injected conversion.
3252 * @param hdma DMA handle.
3253 * @retval None
3254 */
DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef * hdma)3255 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
3256 {
3257 /* Get DFSDM filter handle */
3258 DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3259
3260 /* Call injected half conversion complete callback */
3261 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3262 hdfsdm_filter->InjConvHalfCpltCallback(hdfsdm_filter);
3263 #else
3264 HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
3265 #endif
3266 }
3267
3268 /**
3269 * @brief DMA transfer complete callback for injected conversion.
3270 * @param hdma DMA handle.
3271 * @retval None
3272 */
DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef * hdma)3273 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
3274 {
3275 /* Get DFSDM filter handle */
3276 DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3277
3278 /* Call injected conversion complete callback */
3279 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3280 hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);
3281 #else
3282 HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
3283 #endif
3284 }
3285
3286 /**
3287 * @brief DMA error callback.
3288 * @param hdma DMA handle.
3289 * @retval None
3290 */
DFSDM_DMAError(DMA_HandleTypeDef * hdma)3291 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
3292 {
3293 /* Get DFSDM filter handle */
3294 DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3295
3296 /* Update error code */
3297 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
3298
3299 /* Call error callback */
3300 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3301 hdfsdm_filter->ErrorCallback(hdfsdm_filter);
3302 #else
3303 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
3304 #endif
3305 }
3306
3307 /**
3308 * @brief This function allows to get the number of injected channels.
3309 * @param Channels bitfield of injected channels.
3310 * @retval Number of injected channels.
3311 */
DFSDM_GetInjChannelsNbr(uint32_t Channels)3312 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
3313 {
3314 uint32_t nbChannels = 0;
3315 uint32_t tmp;
3316
3317 /* Get the number of channels from bitfield */
3318 tmp = (uint32_t) (Channels & DFSDM_LSB_MASK);
3319 while(tmp != 0)
3320 {
3321 if((tmp & 1) != 0)
3322 {
3323 nbChannels++;
3324 }
3325 tmp = (uint32_t) (tmp >> 1);
3326 }
3327 return nbChannels;
3328 }
3329
3330 /**
3331 * @brief This function allows to get the channel number from channel instance.
3332 * @param Instance DFSDM channel instance.
3333 * @retval Channel number.
3334 */
DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef * Instance)3335 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance)
3336 {
3337 uint32_t channel;
3338
3339 /* Get channel from instance */
3340 if(Instance == DFSDM1_Channel0)
3341 {
3342 channel = 0;
3343 }
3344 else if(Instance == DFSDM1_Channel1)
3345 {
3346 channel = 1;
3347 }
3348 else if(Instance == DFSDM1_Channel2)
3349 {
3350 channel = 2;
3351 }
3352 else if(Instance == DFSDM1_Channel3)
3353 {
3354 channel = 3;
3355 }
3356 else if(Instance == DFSDM1_Channel4)
3357 {
3358 channel = 4;
3359 }
3360 else if(Instance == DFSDM1_Channel5)
3361 {
3362 channel = 5;
3363 }
3364 else if(Instance == DFSDM1_Channel6)
3365 {
3366 channel = 6;
3367 }
3368 else /* DFSDM1_Channel7 */
3369 {
3370 channel = 7;
3371 }
3372
3373 return channel;
3374 }
3375
3376 /**
3377 * @brief This function allows to really start regular conversion.
3378 * @param hdfsdm_filter DFSDM filter handle.
3379 * @retval None
3380 */
DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3381 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
3382 {
3383 /* Check regular trigger */
3384 if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
3385 {
3386 /* Software start of regular conversion */
3387 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3388 }
3389 else /* synchronous trigger */
3390 {
3391 /* Disable DFSDM filter */
3392 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3393
3394 /* Set RSYNC bit in DFSDM_FLTCR1 register */
3395 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;
3396
3397 /* Enable DFSDM filter */
3398 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3399
3400 /* If injected conversion was in progress, restart it */
3401 if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
3402 {
3403 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3404 {
3405 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3406 }
3407 /* Update remaining injected conversions */
3408 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3409 hdfsdm_filter->InjectedChannelsNbr : 1;
3410 }
3411 }
3412 /* Update DFSDM filter state */
3413 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
3414 HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
3415 }
3416
3417 /**
3418 * @brief This function allows to really stop regular conversion.
3419 * @param hdfsdm_filter DFSDM filter handle.
3420 * @retval None
3421 */
DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3422 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
3423 {
3424 /* Disable DFSDM filter */
3425 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3426
3427 /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
3428 if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3429 {
3430 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
3431 }
3432
3433 /* Enable DFSDM filter */
3434 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3435
3436 /* If injected conversion was in progress, restart it */
3437 if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
3438 {
3439 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3440 {
3441 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3442 }
3443 /* Update remaining injected conversions */
3444 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3445 hdfsdm_filter->InjectedChannelsNbr : 1;
3446 }
3447
3448 /* Update DFSDM filter state */
3449 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
3450 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
3451 }
3452
3453 /**
3454 * @brief This function allows to really start injected conversion.
3455 * @param hdfsdm_filter DFSDM filter handle.
3456 * @retval None
3457 */
DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3458 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
3459 {
3460 /* Check injected trigger */
3461 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3462 {
3463 /* Software start of injected conversion */
3464 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3465 }
3466 else /* external or synchronous trigger */
3467 {
3468 /* Disable DFSDM filter */
3469 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3470
3471 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3472 {
3473 /* Set JSYNC bit in DFSDM_FLTCR1 register */
3474 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC;
3475 }
3476 else /* external trigger */
3477 {
3478 /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
3479 hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge;
3480 }
3481
3482 /* Enable DFSDM filter */
3483 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3484
3485 /* If regular conversion was in progress, restart it */
3486 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
3487 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
3488 {
3489 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3490 }
3491 }
3492 /* Update DFSDM filter state */
3493 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
3494 HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
3495 }
3496
3497 /**
3498 * @brief This function allows to really stop injected conversion.
3499 * @param hdfsdm_filter DFSDM filter handle.
3500 * @retval None
3501 */
DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3502 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
3503 {
3504 /* Disable DFSDM filter */
3505 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3506
3507 /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
3508 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3509 {
3510 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
3511 }
3512 else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
3513 {
3514 /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
3515 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
3516 }
3517
3518 /* Enable DFSDM filter */
3519 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3520
3521 /* If regular conversion was in progress, restart it */
3522 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
3523 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
3524 {
3525 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3526 }
3527
3528 /* Update remaining injected conversions */
3529 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3530 hdfsdm_filter->InjectedChannelsNbr : 1;
3531
3532 /* Update DFSDM filter state */
3533 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
3534 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
3535 }
3536
3537 /**
3538 * @}
3539 */
3540 /* End of private functions --------------------------------------------------*/
3541
3542 /**
3543 * @}
3544 */
3545 #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
3546 #endif /* HAL_DFSDM_MODULE_ENABLED */
3547 /**
3548 * @}
3549 */
3550
