1 /**
2 ******************************************************************************
3 * @file stm32f0xx_hal_cortex.c
4 * @author MCD Application Team
5 * @brief CORTEX HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the CORTEX:
8 * + Initialization and de-initialization functions
9 * + Peripheral Control functions
10 *
11 * @verbatim
12 ==============================================================================
13 ##### How to use this driver #####
14 ==============================================================================
15
16 [..]
17 *** How to configure Interrupts using CORTEX HAL driver ***
18 ===========================================================
19 [..]
20 This section provides functions allowing to configure the NVIC interrupts (IRQ).
21 The Cortex-M0 exceptions are managed by CMSIS functions.
22 (#) Enable and Configure the priority of the selected IRQ Channels.
23 The priority can be 0..3.
24
25 -@- Lower priority values gives higher priority.
26 -@- Priority Order:
27 (#@) Lowest priority.
28 (#@) Lowest hardware priority (IRQn position).
29
30 (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority()
31
32 (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ()
33
34 -@- Negative value of IRQn_Type are not allowed.
35
36
37 [..]
38 *** How to configure Systick using CORTEX HAL driver ***
39 ========================================================
40 [..]
41 Setup SysTick Timer for time base.
42
43 (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which
44 is a CMSIS function that:
45 (++) Configures the SysTick Reload register with value passed as function parameter.
46 (++) Configures the SysTick IRQ priority to the lowest value (0x03).
47 (++) Resets the SysTick Counter register.
48 (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
49 (++) Enables the SysTick Interrupt.
50 (++) Starts the SysTick Counter.
51
52 (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
53 HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
54 HAL_SYSTICK_Config() function call. The HAL_SYSTICK_CLKSourceConfig() macro is defined
55 inside the stm32f0xx_hal_cortex.h file.
56
57 (+) You can change the SysTick IRQ priority by calling the
58 HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function
59 call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
60
61 (+) To adjust the SysTick time base, use the following formula:
62
63 Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s)
64 (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
65 (++) Reload Value should not exceed 0xFFFFFF
66
67 @endverbatim
68 ******************************************************************************
69 * @attention
70 *
71 * <h2><center>© Copyright (c) 2016 STMicroelectronics.
72 * All rights reserved.</center></h2>
73 *
74 * This software component is licensed by ST under BSD 3-Clause license,
75 * the "License"; You may not use this file except in compliance with the
76 * License. You may obtain a copy of the License at:
77 * opensource.org/licenses/BSD-3-Clause
78 *
79 ******************************************************************************
80 */
81
82 /* Includes ------------------------------------------------------------------*/
83 #include "stm32f0xx_hal.h"
84
85 /** @addtogroup STM32F0xx_HAL_Driver
86 * @{
87 */
88
89 /** @defgroup CORTEX CORTEX
90 * @brief CORTEX CORTEX HAL module driver
91 * @{
92 */
93
94 #ifdef HAL_CORTEX_MODULE_ENABLED
95
96 /* Private typedef -----------------------------------------------------------*/
97 /* Private define ------------------------------------------------------------*/
98 /* Private macro -------------------------------------------------------------*/
99 /* Private variables ---------------------------------------------------------*/
100 /* Private function prototypes -----------------------------------------------*/
101 /* Exported functions ---------------------------------------------------------*/
102
103 /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions
104 * @{
105 */
106
107
108 /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions
109 * @brief Initialization and Configuration functions
110 *
111 @verbatim
112 ==============================================================================
113 ##### Initialization and de-initialization functions #####
114 ==============================================================================
115 [..]
116 This section provides the CORTEX HAL driver functions allowing to configure Interrupts
117 Systick functionalities
118
119 @endverbatim
120 * @{
121 */
122
123 /**
124 * @brief Sets the priority of an interrupt.
125 * @param IRQn External interrupt number .
126 * This parameter can be an enumerator of IRQn_Type enumeration
127 * (For the complete STM32 Devices IRQ Channels list, please refer to stm32f0xx.h file)
128 * @param PreemptPriority The preemption priority for the IRQn channel.
129 * This parameter can be a value between 0 and 3.
130 * A lower priority value indicates a higher priority
131 * @param SubPriority the subpriority level for the IRQ channel.
132 * with stm32f0xx devices, this parameter is a dummy value and it is ignored, because
133 * no subpriority supported in Cortex M0 based products.
134 * @retval None
135 */
HAL_NVIC_SetPriority(IRQn_Type IRQn,uint32_t PreemptPriority,uint32_t SubPriority)136 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
137 {
138 /* Check the parameters */
139 assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
140 NVIC_SetPriority(IRQn,PreemptPriority);
141 }
142
143 /**
144 * @brief Enables a device specific interrupt in the NVIC interrupt controller.
145 * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
146 * function should be called before.
147 * @param IRQn External interrupt number.
148 * This parameter can be an enumerator of IRQn_Type enumeration
149 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
150 * @retval None
151 */
HAL_NVIC_EnableIRQ(IRQn_Type IRQn)152 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
153 {
154 /* Check the parameters */
155 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
156
157 /* Enable interrupt */
158 NVIC_EnableIRQ(IRQn);
159 }
160
161 /**
162 * @brief Disables a device specific interrupt in the NVIC interrupt controller.
163 * @param IRQn External interrupt number.
164 * This parameter can be an enumerator of IRQn_Type enumeration
165 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
166 * @retval None
167 */
HAL_NVIC_DisableIRQ(IRQn_Type IRQn)168 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
169 {
170 /* Check the parameters */
171 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
172
173 /* Disable interrupt */
174 NVIC_DisableIRQ(IRQn);
175 }
176
177 /**
178 * @brief Initiates a system reset request to reset the MCU.
179 * @retval None
180 */
HAL_NVIC_SystemReset(void)181 void HAL_NVIC_SystemReset(void)
182 {
183 /* System Reset */
184 NVIC_SystemReset();
185 }
186
187 /**
188 * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer.
189 * Counter is in free running mode to generate periodic interrupts.
190 * @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
191 * @retval status: - 0 Function succeeded.
192 * - 1 Function failed.
193 */
HAL_SYSTICK_Config(uint32_t TicksNumb)194 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
195 {
196 return SysTick_Config(TicksNumb);
197 }
198 /**
199 * @}
200 */
201
202 /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
203 * @brief Cortex control functions
204 *
205 @verbatim
206 ==============================================================================
207 ##### Peripheral Control functions #####
208 ==============================================================================
209 [..]
210 This subsection provides a set of functions allowing to control the CORTEX
211 (NVIC, SYSTICK) functionalities.
212
213
214 @endverbatim
215 * @{
216 */
217
218
219 /**
220 * @brief Gets the priority of an interrupt.
221 * @param IRQn External interrupt number.
222 * This parameter can be an enumerator of IRQn_Type enumeration
223 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
224 * @retval None
225 */
HAL_NVIC_GetPriority(IRQn_Type IRQn)226 uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn)
227 {
228 /* Get priority for Cortex-M system or device specific interrupts */
229 return NVIC_GetPriority(IRQn);
230 }
231
232 /**
233 * @brief Sets Pending bit of an external interrupt.
234 * @param IRQn External interrupt number
235 * This parameter can be an enumerator of IRQn_Type enumeration
236 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
237 * @retval None
238 */
HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)239 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
240 {
241 /* Check the parameters */
242 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
243
244 /* Set interrupt pending */
245 NVIC_SetPendingIRQ(IRQn);
246 }
247
248 /**
249 * @brief Gets Pending Interrupt (reads the pending register in the NVIC
250 * and returns the pending bit for the specified interrupt).
251 * @param IRQn External interrupt number.
252 * This parameter can be an enumerator of IRQn_Type enumeration
253 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
254 * @retval status: - 0 Interrupt status is not pending.
255 * - 1 Interrupt status is pending.
256 */
HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)257 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
258 {
259 /* Check the parameters */
260 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
261
262 /* Return 1 if pending else 0 */
263 return NVIC_GetPendingIRQ(IRQn);
264 }
265
266 /**
267 * @brief Clears the pending bit of an external interrupt.
268 * @param IRQn External interrupt number.
269 * This parameter can be an enumerator of IRQn_Type enumeration
270 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f0xxxx.h))
271 * @retval None
272 */
HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)273 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
274 {
275 /* Check the parameters */
276 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
277
278 /* Clear pending interrupt */
279 NVIC_ClearPendingIRQ(IRQn);
280 }
281
282 /**
283 * @brief Configures the SysTick clock source.
284 * @param CLKSource specifies the SysTick clock source.
285 * This parameter can be one of the following values:
286 * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
287 * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
288 * @retval None
289 */
HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)290 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
291 {
292 /* Check the parameters */
293 assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
294 if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
295 {
296 SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
297 }
298 else
299 {
300 SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
301 }
302 }
303
304 /**
305 * @brief This function handles SYSTICK interrupt request.
306 * @retval None
307 */
HAL_SYSTICK_IRQHandler(void)308 void HAL_SYSTICK_IRQHandler(void)
309 {
310 HAL_SYSTICK_Callback();
311 }
312
313 /**
314 * @brief SYSTICK callback.
315 * @retval None
316 */
HAL_SYSTICK_Callback(void)317 __weak void HAL_SYSTICK_Callback(void)
318 {
319 /* NOTE : This function Should not be modified, when the callback is needed,
320 the HAL_SYSTICK_Callback could be implemented in the user file
321 */
322 }
323
324 /**
325 * @}
326 */
327
328 /**
329 * @}
330 */
331
332 #endif /* HAL_CORTEX_MODULE_ENABLED */
333 /**
334 * @}
335 */
336
337 /**
338 * @}
339 */
340
341 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
342
