1# Synopsys DesignWare MAC configuration options
2
3# Copyright (c) 2021 BayLibre SAS
4# SPDX-License-Identifier: Apache-2.0
5
6menuconfig ETH_DWMAC
7	bool "Synopsys DesignWare MAC driver"
8	default y
9	depends on NET_BUF_FIXED_DATA_SIZE
10	depends on (SOC_SERIES_STM32H7X && !ETH_STM32_HAL) || MMU
11	depends on DT_HAS_SNPS_DESIGNWARE_ETHERNET_ENABLED
12	help
13	  This is a driver for the Synopsys DesignWare MAC, also referred to
14	  as "DesignWare Cores Ethernet Quality-of-Service". Hardware versions
15	  4.x and 5.x are supported.
16
17	  Platform specific glue support is also required. This driver is
18	  currently available on targets using the STM32H7X series as an
19	  alternative to the eth_stm32_hal driver. Support for a generic DT
20	  and MMU based platform is also provided.
21
22	  Not yet implemented:
23	  - MDIO (currently relying on default PHY config)
24	  - PTP support
25	  - VLAN support
26	  - various hardware offloads (when available)
27
28if ETH_DWMAC
29
30config ETH_DWMAC_STM32H7X
31	bool
32	depends on SOC_SERIES_STM32H7X
33	select NOCACHE_MEMORY if ARCH_HAS_NOCACHE_MEMORY_SUPPORT
34	default y
35
36config ETH_DWMAC_MMU
37	bool
38	depends on MMU
39	default y
40
41config DWMAC_NB_TX_DESCS
42	int "Number of entries in the transmit descriptor ring"
43	default 16
44	range 4 128
45	help
46	  A higher number allows for more packets to be queued which may
47	  improve throughput, but that requires more transient memory.
48	  However there must be enough descriptors to hold all fragments
49	  of a full-size packet to be transmitted or the packet will be
50	  dropped.
51
52	  Fragment size is influenced by CONFIG_NET_BUF_DATA_SIZE.
53
54config DWMAC_NB_RX_DESCS
55	int "Number of entries in the receive descriptor ring"
56	default 16
57	range 4 128
58	help
59	  Received packets are spread across the required number of fragment
60	  buffers. Each RX fragment has a size of CONFIG_NET_BUF_DATA_SIZE.
61	  There is one descriptor entry per fragment.
62
63	  A higher number allows for more packets to be received without
64	  immediate intervention from the CPU but requires more transient
65	  memory. A smaller number increases the risk of an overflow and
66	  dropped packets.
67
68endif # ETH_DWMAC
69