1 /* 2 * Copyright (c) 2020 Teslabs Engineering S.L. 3 * Copyright (c) 2021 Krivorot Oleg <krivorot.oleg@gmail.com> 4 * Copyright (c) 2022 Konstantinos Papadopoulos <kostas.papadopulos@gmail.com> 5 * 6 * SPDX-License-Identifier: Apache-2.0 7 */ 8 #ifndef ZEPHYR_DRIVERS_DISPLAY_DISPLAY_ILI9342C_H_ 9 #define ZEPHYR_DRIVERS_DISPLAY_DISPLAY_ILI9342C_H_ 10 11 #include <zephyr/device.h> 12 13 /* Commands/registers. */ 14 #define ILI9342C_GAMSET 0x26 15 #define ILI9342C_IFMODE 0xB0 16 #define ILI9342C_FRMCTR1 0xB1 17 #define ILI9342C_INVTR 0xB4 18 #define ILI9342C_DISCTRL 0xB6 19 #define ILI9342C_ETMOD 0xB7 20 #define ILI9342C_PWCTRL1 0xC0 21 #define ILI9342C_PWCTRL2 0xC1 22 #define ILI9342C_PWCTRL3 0xC2 23 #define ILI9342C_VMCTRL1 0xC5 24 #define ILI9342C_SETEXTC 0xC8 25 #define ILI9342C_PGAMCTRL 0xE0 26 #define ILI9342C_NGAMCTRL 0xE1 27 #define ILI9342C_IFCTL 0xF6 28 29 /* Commands/registers length. */ 30 #define ILI9342C_GAMSET_LEN 1U 31 #define ILI9342C_IFMODE_LEN 1U 32 #define ILI9342C_FRMCTR1_LEN 2U 33 #define ILI9342C_INVTR_LEN 1U 34 #define ILI9342C_DISCTRL_LEN 4U 35 #define ILI9342C_ETMOD_LEN 1U 36 #define ILI9342C_PWCTRL1_LEN 2U 37 #define ILI9342C_PWCTRL2_LEN 1U 38 #define ILI9342C_PWCTRL3_LEN 1U 39 #define ILI9342C_VMCTRL1_LEN 1U 40 #define ILI9342C_SETEXTC_LEN 3U 41 #define ILI9342C_PGAMCTRL_LEN 15U 42 #define ILI9342C_NGAMCTRL_LEN 15U 43 #define ILI9342C_IFCTL_LEN 3U 44 45 /** X resolution (pixels). */ 46 #define ILI9342c_X_RES 320U 47 /** Y resolution (pixels). */ 48 #define ILI9342c_Y_RES 240U 49 50 /** ILI9342C registers to be initialized. */ 51 struct ili9342c_regs { 52 uint8_t gamset[ILI9342C_GAMSET_LEN]; 53 uint8_t ifmode[ILI9342C_IFMODE_LEN]; 54 uint8_t frmctr1[ILI9342C_FRMCTR1_LEN]; 55 uint8_t invtr[ILI9342C_INVTR_LEN]; 56 uint8_t disctrl[ILI9342C_DISCTRL_LEN]; 57 uint8_t etmod[ILI9342C_ETMOD_LEN]; 58 uint8_t pwctrl1[ILI9342C_PWCTRL1_LEN]; 59 uint8_t pwctrl2[ILI9342C_PWCTRL2_LEN]; 60 uint8_t pwctrl3[ILI9342C_PWCTRL3_LEN]; 61 uint8_t vmctrl1[ILI9342C_VMCTRL1_LEN]; 62 uint8_t setextc[ILI9342C_SETEXTC_LEN]; 63 uint8_t pgamctrl[ILI9342C_PGAMCTRL_LEN]; 64 uint8_t ngamctrl[ILI9342C_NGAMCTRL_LEN]; 65 uint8_t ifctl[ILI9342C_IFCTL_LEN]; 66 }; 67 68 /* Initializer macro for ILI9342C registers. */ 69 #define ILI9342c_REGS_INIT(n) \ 70 static const struct ili9342c_regs ili9xxx_regs_##n = { \ 71 .gamset = DT_PROP(DT_INST(n, ilitek_ili9342c), gamset), \ 72 .ifmode = DT_PROP(DT_INST(n, ilitek_ili9342c), ifmode), \ 73 .frmctr1 = DT_PROP(DT_INST(n, ilitek_ili9342c), frmctr1), \ 74 .invtr = DT_PROP(DT_INST(n, ilitek_ili9342c), invtr), \ 75 .disctrl = DT_PROP(DT_INST(n, ilitek_ili9342c), disctrl), \ 76 .etmod = DT_PROP(DT_INST(n, ilitek_ili9342c), etmod), \ 77 .pwctrl1 = DT_PROP(DT_INST(n, ilitek_ili9342c), pwctrl1), \ 78 .pwctrl2 = DT_PROP(DT_INST(n, ilitek_ili9342c), pwctrl2), \ 79 .pwctrl3 = DT_PROP(DT_INST(n, ilitek_ili9342c), pwctrl3), \ 80 .vmctrl1 = DT_PROP(DT_INST(n, ilitek_ili9342c), vmctrl1), \ 81 .setextc = {0xFF, 0x93, 0x42}, \ 82 .pgamctrl = DT_PROP(DT_INST(n, ilitek_ili9342c), pgamctrl), \ 83 .ngamctrl = DT_PROP(DT_INST(n, ilitek_ili9342c), ngamctrl), \ 84 .ifctl = DT_PROP(DT_INST(n, ilitek_ili9342c), ifctl), \ 85 }; 86 87 /** 88 * @brief Initialize ILI9342C registers with DT values. 89 * 90 * @param dev ILI9342C device instance 91 * @return 0 on success, errno otherwise. 92 */ 93 int ili9342c_regs_init(const struct device *dev); 94 95 #endif /* ZEPHYR_DRIVERS_DISPLAY_DISPLAY_ILI9342C_H_ */ 96
