1 /******************************************************************************* 2 * File Name: cycfg_peripherals.h 3 * 4 * Description: 5 * Peripheral Hardware Block configuration 6 * This file was automatically generated and should not be modified. 7 * Tools Package 2.2.0.2801 8 * latest-v2.X 2.0.0.6211 9 * personalities 3.0.0.0 10 * udd 3.0.0.562 11 * 12 ******************************************************************************** 13 * Copyright 2020 Cypress Semiconductor Corporation 14 * SPDX-License-Identifier: Apache-2.0 15 * 16 * Licensed under the Apache License, Version 2.0 (the "License"); 17 * you may not use this file except in compliance with the License. 18 * You may obtain a copy of the License at 19 * 20 * http://www.apache.org/licenses/LICENSE-2.0 21 * 22 * Unless required by applicable law or agreed to in writing, software 23 * distributed under the License is distributed on an "AS IS" BASIS, 24 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 * See the License for the specific language governing permissions and 26 * limitations under the License. 27 ********************************************************************************/ 28 29 #if !defined(CYCFG_PERIPHERALS_H) 30 #define CYCFG_PERIPHERALS_H 31 32 #include "cycfg_notices.h" 33 #include "cy_sysclk.h" 34 #include "cy_csd.h" 35 36 #if defined(__cplusplus) 37 extern "C" { 38 #endif 39 40 #define CYBSP_CSD_ENABLED 1U 41 #define CY_CAPSENSE_CORE 4u 42 #define CY_CAPSENSE_CPU_CLK 100000000u 43 #define CY_CAPSENSE_PERI_CLK 100000000u 44 #define CY_CAPSENSE_VDDA_MV 3300u 45 #define CY_CAPSENSE_PERI_DIV_TYPE CY_SYSCLK_DIV_8_BIT 46 #define CY_CAPSENSE_PERI_DIV_INDEX 0u 47 #define Cmod_PORT GPIO_PRT7 48 #define CintA_PORT GPIO_PRT7 49 #define CintB_PORT GPIO_PRT7 50 #define Button0_Rx0_PORT GPIO_PRT1 51 #define Button0_Tx_PORT GPIO_PRT8 52 #define Button1_Rx0_PORT GPIO_PRT1 53 #define Button1_Tx_PORT GPIO_PRT8 54 #define LinearSlider0_Sns0_PORT GPIO_PRT8 55 #define LinearSlider0_Sns1_PORT GPIO_PRT8 56 #define LinearSlider0_Sns2_PORT GPIO_PRT8 57 #define LinearSlider0_Sns3_PORT GPIO_PRT8 58 #define LinearSlider0_Sns4_PORT GPIO_PRT8 59 #define Cmod_PIN 7u 60 #define CintA_PIN 1u 61 #define CintB_PIN 2u 62 #define Button0_Rx0_PIN 0u 63 #define Button0_Tx_PIN 1u 64 #define Button1_Rx0_PIN 0u 65 #define Button1_Tx_PIN 2u 66 #define LinearSlider0_Sns0_PIN 3u 67 #define LinearSlider0_Sns1_PIN 4u 68 #define LinearSlider0_Sns2_PIN 5u 69 #define LinearSlider0_Sns3_PIN 6u 70 #define LinearSlider0_Sns4_PIN 7u 71 #define Cmod_PORT_NUM 7u 72 #define CintA_PORT_NUM 7u 73 #define CintB_PORT_NUM 7u 74 #define CYBSP_CSD_HW CSD0 75 #define CYBSP_CSD_IRQ csd_interrupt_IRQn 76 77 extern cy_stc_csd_context_t cy_csd_0_context; 78 79 void init_cycfg_peripherals(void); 80 81 #if defined(__cplusplus) 82 } 83 #endif 84 85 86 #endif /* CYCFG_PERIPHERALS_H */ 87
