1/*******************************************************************************
2* \file cyb06xxa_cm4.icf
3* \version 2.95.1
4*
5* Linker file for the IAR compiler.
6*
7* The main purpose of the linker script is to describe how the sections in the
8* input files should be mapped into the output file, and to control the memory
9* layout of the output file.
10*
11* \note The entry point is fixed and starts at 0x100E0000. The valid application
12* image should be placed there.
13*
14* \note The linker files included with the PDL template projects must be generic
15* and handle all common use cases. Your project may not use every section
16* defined in the linker files. In that case you may see warnings during the
17* build process. In your project, you can simply comment out or remove the
18* relevant code in the linker file.
19*
20********************************************************************************
21* \copyright
22* Copyright 2016-2021 Cypress Semiconductor Corporation
23* SPDX-License-Identifier: Apache-2.0
24*
25* Licensed under the Apache License, Version 2.0 (the "License");
26* you may not use this file except in compliance with the License.
27* You may obtain a copy of the License at
28*
29*     http://www.apache.org/licenses/LICENSE-2.0
30*
31* Unless required by applicable law or agreed to in writing, software
32* distributed under the License is distributed on an "AS IS" BASIS,
33* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
34* See the License for the specific language governing permissions and
35* limitations under the License.
36*******************************************************************************/
37
38/*###ICF### Section handled by ICF editor, don't touch! ****/
39/*-Editor annotation file-*/
40/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_4.xml" */
41/*-Specials-*/
42define symbol __ICFEDIT_intvec_start__ = 0x00000000;
43
44/* The symbols below define the location and size of blocks of memory in the target.
45 * Use these symbols to specify the memory regions available for allocation.
46 */
47/* RAM */
48define symbol __ICFEDIT_region_IRAM1_start__ = 0x08001800;
49define symbol __ICFEDIT_region_IRAM1_end__   = 0x080DFFFF;
50
51/* Flash */
52define symbol __ICFEDIT_region_IROM1_start__ = 0x100E0000;
53define symbol __ICFEDIT_region_IROM1_end__   = 0x1014FFFF;
54
55/* The following symbols define a 32K flash region used for EEPROM emulation.
56 * This region can also be used as the general purpose flash.
57 * You can assign sections to this memory region for only one of the cores.
58 * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
59 * Therefore, repurposing this memory region will prevent such middleware from operation.
60 */
61define symbol __ICFEDIT_region_IROM2_start__ = 0x14000000;
62define symbol __ICFEDIT_region_IROM2_end__   = 0x14007FFF;
63
64/* The following symbols define device specific memory regions and must not be changed. */
65/* XIP */
66define symbol __ICFEDIT_region_EROM1_start__ = 0x18000000;
67define symbol __ICFEDIT_region_EROM1_end__   = 0x1FFFFFFF;
68
69define symbol __ICFEDIT_region_EROM2_start__ = 0x0;
70define symbol __ICFEDIT_region_EROM2_end__   = 0x0;
71define symbol __ICFEDIT_region_EROM3_start__ = 0x0;
72define symbol __ICFEDIT_region_EROM3_end__   = 0x0;
73
74
75define symbol __ICFEDIT_region_IRAM2_start__ = 0x0;
76define symbol __ICFEDIT_region_IRAM2_end__   = 0x0;
77define symbol __ICFEDIT_region_ERAM1_start__ = 0x0;
78define symbol __ICFEDIT_region_ERAM1_end__   = 0x0;
79define symbol __ICFEDIT_region_ERAM2_start__ = 0x0;
80define symbol __ICFEDIT_region_ERAM2_end__   = 0x0;
81define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
82define symbol __ICFEDIT_region_ERAM3_end__   = 0x0;
83/*-Sizes-*/
84if (!isdefinedsymbol(__STACK_SIZE)) {
85  define symbol __ICFEDIT_size_cstack__ = 0x1000;
86} else {
87  define symbol __ICFEDIT_size_cstack__ = __STACK_SIZE;
88}
89define symbol __ICFEDIT_size_proc_stack__ = 0x0;
90
91/* Defines the minimum heap size. The actual heap size will be expanded to the end of the stack region */
92if (!isdefinedsymbol(__HEAP_SIZE)) {
93    define symbol __ICFEDIT_size_heap__ = 0x0400;
94} else {
95  define symbol __ICFEDIT_size_heap__ = __HEAP_SIZE;
96}
97/**** End of ICF editor section. ###ICF###*/
98
99/* The size of the MCU boot header area at the start of FLASH */
100define symbol BOOT_HEADER_SIZE  = 0x400;
101
102
103define memory mem with size = 4G;
104define region IROM1_region = mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__];
105define region IROM2_region = mem:[from __ICFEDIT_region_IROM2_start__ to __ICFEDIT_region_IROM2_end__];
106define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__];
107define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__];
108
109define block CSTACK     with alignment = 8, size = __ICFEDIT_size_cstack__     { };
110define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { };
111define block HEAP       with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
112define block HSTACK {block HEAP, block PROC_STACK, last block CSTACK};
113define block RO     {first section .intvec, readonly};
114
115define block cy_xip { section .cy_xip };
116
117/*-Initializations-*/
118initialize by copy { readwrite };
119do not initialize  { section .noinit, section .intvec_ram };
120
121/*-Placement-*/
122
123/* Flash - Cortex-M4 application */
124place at address (__ICFEDIT_region_IROM1_start__ + BOOT_HEADER_SIZE) { block RO };
125
126/* Used for the digital signature of the secure application and the Bootloader SDK application. */
127".cy_app_signature" : place at address (__ICFEDIT_region_IROM1_end__ - 0x200) { section .cy_app_signature };
128
129/* Emulated EEPROM Flash area */
130".cy_em_eeprom" : place at start of IROM2_region  { section .cy_em_eeprom };
131
132/* Execute in Place (XIP). See the smif driver documentation for details. */
133"cy_xip" : place at start of EROM1_region  { block cy_xip };
134
135/* RAM */
136place at start of IRAM1_region  { readwrite section .intvec_ram};
137place in          IRAM1_region  { readwrite };
138place at end   of IRAM1_region  { block HSTACK };
139
140keep {  section .cy_app_signature,
141        section .cy_em_eeprom,
142        section .cy_xip,
143         };
144
145
146
147/* EOF */
148