1 /***************************************************************************//**
2 * \file cy_sar2.h
3 * \version 1.0
4 *
5 * Provides an API declaration of the SAR2 driver
6 *
7 *******************************************************************************
8 * \copyright
9 * (c) (2022), Cypress Semiconductor Corporation (an Infineon company) or
10 * an affiliate of Cypress Semiconductor Corporation. All rights reserved.
11 *******************************************************************************
12 * You may use this file only in accordance with the license, terms, conditions,
13 * disclaimers, and limitations in the end user license agreement accompanying
14 * the software package with which this file was provided.
15 *******************************************************************************/
16
17 /**
18 * \addtogroup group_sar2
19 * \{
20 * The SAR2 driver provides an API to configure the SAR2 ADC.
21 * The SAR2 has up to 4 ADCs and up to 32 channels for each ADC module. About
22 * actual number of supported modules and channels, refer to the technical
23 * reference manual (TRM) and device datasheet.
24 *
25 * \section group_sar2_configuration Configuration Considerations
26 * Typical usage:
27 * - Call Cy_SAR2_Init to initialize the ADC module and its channels
28 * - Call Cy_SAR2_Channel_SetInterruptMask if you need to use the interrupt.
29 * After initializing channel(s) call, trigger a call by the software
30 * (calling Cy_SAR2_Channel_SoftwareTrigger) or start a peripheral
31 * configured for the HW trigger.
32 *
33 \note It is not recommended to set the triggerSelection structure member
34 * of the \ref cy_stc_sar2_channel_config_t to CY_SAR2_TRIGGER_CONTINUOUS if
35 * cy_en_sar2_preemption_type_t is set to CY_SAR2_PREEMPTION_ABORT_CANCEL.
36 * It may work to the effect that the channel or channel group will not be able
37 * to complete without advanced priority tuning.
38 * \par
39 *
40 * \note If you use an interrupt for ADC, create an interrupt handler
41 * and register it by using the sysint module. In the handler, you can check
42 * which interrupt is occurred by Cy_SAR2_Channel_GetInterruptStatusMasked
43 * and can get the conversion result by Cy_SAR2_Channel_GetResult.
44 * If you do not use the interrupt, you can poll the conversion status by
45 * Cy_SAR2_Channel_GetInterruptStatus.
46 * For both of polling and interrupt, clear the interrupt flags by
47 * Cy_SAR2_Channel_ClearInterrupt after handling data.
48 * \par
49 *
50 * \note SAR2 block can operate in Active or Sleep mode only.
51 *
52 * \subsection group_sar2_config Configuration Example
53 * First step would be to configure clock:
54 *
55 * \snippet sar2/snippet/main.c SNIPPET_CLOCK_INIT
56 *
57 * Group of two SAR2 ADC channels are configured, one for bandgap voltage
58 * and one for the AN0 analogue input:
59 *
60 * \snippet sar2/snippet/main.c SNIPPET_SAR2_CONFIG
61 *
62 * \subsection group_sar2_init Initialization
63 *
64 * \snippet sar2/snippet/main.c SNIPPET_SAR2_INIT
65 *
66 * \subsection group_sar2_result Obtaining results in counts
67 *
68 * \snippet sar2/snippet/main.c SNIPPET_SAR2_GET_RESULT
69 *
70 * \subsection group_sar2_calc_volts Calculating results in V, mV or uV
71 *
72 * \snippet sar2/snippet/main.c SNIPPET_SAR2_CALC_VOLTS
73 *
74 * \subsection group_sar2_die_temperature Die temperature
75 *
76 * \snippet sar2/snippet/main.c SNIPPET_SAR2_DIE_TEMPERATURE
77 *
78 * Once done, in the variable, returned by the
79 * \ref Cy_SAR2_CalculateDieTemperature function will contain the die temperature
80 * value in Celsius degrees.
81 *
82 * The accuracy can be increased by executing the calibration procedure
83 * (see \ref group_sar2_calibration section) before doing the conversion.
84 *
85 * In the function call, the first argument is the enumeration value,
86 * representing the VDDA value range supplied to this particular chip being used,
87 * see \ref cy_en_sar2_vdda_range_t.
88 *
89 * \subsection group_sar2_channel_grouping Channel grouping
90 * The SAR2 driver supports the channel grouping. Each channel can be either in
91 * an individual group or in a group of 2 or more channels. By default, the
92 * hardware will execute the next channel if it exists and is in the Enabled
93 * state if the current channel does not have the flag 'Group End' set. You can
94 * set triggers to start either the first channel or any channel of the group to
95 * execute all the next channels.
96 *
97 * \section group_sar2_more_information More Information
98 * Refer to the technical reference manual (TRM) and the device datasheet.
99 *
100 * \section group_sar2_changelog Changelog
101 * <table class="doxtable">
102 * <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
103 * <tr>
104 * <td>1.0</td>
105 * <td>Initial version</td>
106 * <td></td>
107 * </tr>
108 * </table>
109 *
110 * \defgroup group_sar2_macro Macros
111 * \{
112 * \defgroup group_sar2_macros_interrupt Interrupt Masks
113 * \defgroup group_sar2_macros_status Status Masks
114 * \}
115 * \defgroup group_sar2_functions Functions
116 * \defgroup group_sar2_data_structures Data structures
117 * \defgroup group_sar2_enums Enumerated Types
118 * \defgroup group_sar2_calibration Calibration procedure
119 *
120 * \n
121 * \addtogroup group_sar2_calibration
122 * \{
123 * To start the procedure, perform \ref group_sar2_config and
124 * \ref group_sar2_init with included extra channel, which can be re-used
125 * after this procedure is complete:
126 * \snippet sar2/snippet/main.c SNIPPET_CALIB_CH_INIT
127 * The ADC has an offset adjustment function to compensate for offset error.
128 * It is possible to select code from +127 to -128 in a dec. for analog
129 * calibration.
130 * \n
131 * The offset adjustment step is a quarter of 1LSb. \n
132 * Offset = max( 0, min( 4095, floor( VIN/VREFH x 4096 + OFST/4 ) ) )
133 * \image html sar2_offset_calibration.png
134 * \note Enable reference buffer mode using \ref Cy_SAR2_SetReferenceBufferMode
135 * function.
136 *
137 * \n
138 * Following code snippet can be used:
139 * \snippet sar2/snippet/main.c SNIPPET_SAR2_OFFSET_CALIBRATION
140 *
141 * After that, the Gain should also be calibrated as well.
142 * The ADC has a gain adjustment function to compensate for gain error.
143 * It is possible to set code from +15 to -15 dec.
144 * The gain adjustment step is a quarter of 1LSb. \n
145 * Gain = max(0, min(4095, floor((4096 - GAIN)/VREFH x (VIN - VREFH/2) + 2048)))
146 * \image html sar2_gain_calibration.png
147 * \snippet sar2/snippet/main.c SNIPPET_SAR2_GAIN_CALIBRATION
148 * \n
149 * Once done, the calibrationConfig global structure contains calibration data
150 * for SAR2 block 0. Calibration is advised to be done as frequent as possible.
151 * \}
152 */
153
154
155 #if !defined(CY_SAR2_H)
156 #define CY_SAR2_H
157
158 #include <stdint.h>
159 #include <stdbool.h>
160 #include <stddef.h>
161 #include <math.h>
162 #include "cy_syslib.h"
163 #include "cy_utils.h"
164 #include "cy_device.h"
165
166 #if defined (CY_IP_MXS40EPASS_ESAR)
167
168 #if defined(__cplusplus)
169 extern "C" {
170 #endif
171
172 /***************************************
173 * Macro definitions
174 ***************************************/
175
176 /**
177 * \addtogroup group_sar2_macro
178 * \{
179 */
180
181 /** Driver major version */
182 #define CY_SAR2_DRV_VERSION_MAJOR 1
183
184 /** Driver minor version */
185 #define CY_SAR2_DRV_VERSION_MINOR 0
186
187 /** Sar2 driver ID */
188 #define CY_SAR2_ID CY_PDL_DRV_ID(0x4BUL)
189
190 /** Number of input triggers */
191 #define CY_SAR2_TR_IN_NUM (5UL)
192
193 /** Number of output triggers */
194 #define CY_SAR2_TR_OUT_NUM (2UL)
195
196 /** Maximum generic input trigger */
197 #define CY_SAR2_GEN_TR_IN_NUM (16UL)
198
199 /** Maximum generic output trigger */
200 #define CY_SAR2_GEN_TR_OUT_NUM (64UL)
201
202 /** Temperature matrix sixe */
203 #define CY_SAR2_TEMP_MATRIX_SIZE (3UL)
204
205 /** Channel number */
206 #define CY_SAR2_NUM_CHANNELS (32UL)
207
208 /***************************************
209 * Group status
210 ***************************************/
211 /** \addtogroup group_sar2_macros_status
212 * \{
213 */
214 /** If this bit is true, "out of range" was detected and the value was above the High threshold. */
215 #define CY_SAR2_STATUS_ABOVE (PASS_SAR_CH_RESULT_ABOVE_HI_MIR_Msk)
216
217 /** If this bit is true, the range is detected. */
218 #define CY_SAR2_STATUS_RANGE (PASS_SAR_CH_RESULT_RANGE_INTR_MIR_Msk)
219
220 /** If this bit is true, the pulse is detected. */
221 #define CY_SAR2_STATUS_PULSE (PASS_SAR_CH_RESULT_PULSE_INTR_MIR_Msk)
222
223 /** If this bit is true, the result data is valid. */
224 #define CY_SAR2_STATUS_VALID (PASS_SAR_CH_RESULT_VALID_MIR_Msk)
225
226 /** Group acquisition completed. This bit can be set for the last channel of a group if the group scan is done. */
227 #define CY_SAR2_GRP_COMPLETE (PASS_SAR_CH_GRP_STAT_GRP_COMPLETE_Msk)
228
229 /** Group Cancelled. This bit can be set for the last channel of a group if the group scan was
230 * preempted and cancelled. */
231 #define CY_SAR2_GRP_CANCELLED (PASS_SAR_CH_GRP_STAT_GRP_CANCELLED_Msk)
232
233 /** Group Overflow. This bit can be set for the last channel of a group if the group scan is
234 * done and the Done interrupt is already (still) pending. */
235 #define CY_SAR2_GRP_OVERFLOW (PASS_SAR_CH_GRP_STAT_GRP_OVERFLOW_Msk)
236
237 /** Channel Range completed. This bit can be set for each channel if the conversion result
238 * (after averaging) of that channel met the condition specified by the range detection
239 * mode settings of the channel. */
240 #define CY_SAR2_CH_RANGE_COMPLETE (PASS_SAR_CH_GRP_STAT_CH_RANGE_COMPLETE_Msk)
241
242 /** Channel Pulse completed. This bit can be set for each channel if the positive pulse counter reaches zero. */
243 #define CY_SAR2_CH_PULSE_COMPLETE (PASS_SAR_CH_GRP_STAT_CH_PULSE_COMPLETE_Msk)
244
245 /** Channel Overflow. This bit can be set for each channel if a new Pulse or Range interrupt is detected
246 * while the interrupt is still pending or when HW did not acknowledge data pickup.*/
247 #define CY_SAR2_CH_OVERFLOW (PASS_SAR_CH_GRP_STAT_CH_OVERFLOW_Msk)
248
249 /** Group acquisition busy. */
250 #define CY_SAR2_GRP_BUSY (PASS_SAR_CH_GRP_STAT_GRP_BUSY_Msk)
251
252 /** \} group_sar2_macros_status */
253
254
255 /***************************************
256 * Interrupts
257 ***************************************/
258 /** \addtogroup group_sar2_macros_interrupt
259 * \{
260 */
261 /** Group done. */
262 #define CY_SAR2_INT_GRP_DONE (PASS_SAR_CH_INTR_GRP_DONE_Msk)
263
264 /** Group cancelled. */
265 #define CY_SAR2_INT_GRP_CANCELLED (PASS_SAR_CH_INTR_GRP_CANCELLED_Msk)
266
267 /** Group overflow. */
268 #define CY_SAR2_INT_GRP_OVERFLOW (PASS_SAR_CH_INTR_GRP_OVERFLOW_Msk)
269
270 /** Channel range event. */
271 #define CY_SAR2_INT_CH_RANGE (PASS_SAR_CH_INTR_CH_RANGE_Msk)
272
273 /** Channel pulse event. */
274 #define CY_SAR2_INT_CH_PULSE (PASS_SAR_CH_INTR_CH_PULSE_Msk)
275
276 /** Channel overflow event. */
277 #define CY_SAR2_INT_CH_OVERFLOW (PASS_SAR_CH_INTR_CH_OVERFLOW_Msk)
278
279 /** Combined interrupt mask. */
280 #define CY_SAR2_INTR (CY_SAR2_INT_GRP_DONE | \
281 CY_SAR2_INT_GRP_CANCELLED | \
282 CY_SAR2_INT_GRP_OVERFLOW | \
283 CY_SAR2_INT_CH_RANGE | \
284 CY_SAR2_INT_CH_PULSE | \
285 CY_SAR2_INT_CH_OVERFLOW)
286
287 /** \} group_sar2_macros_interrupt */
288
289 /** \cond INTERNAL */
290 /** Macro that returns the channel number for a specified SAR instance. */
291 #define CY_SAR2_CHAN_NUM(base) ((PASS0_SAR0 == (base)) ? PASS_SAR_SLICE_NR0_SAR_SAR_MUX_IN :\
292 (PASS0_SAR1 == (base)) ? PASS_SAR_SLICE_NR1_SAR_SAR_MUX_IN :\
293 PASS_SAR_SLICE_NR2_SAR_SAR_MUX_IN)
294
295 #define CY_SAR2_CHAN_NUM_VALID(base, channel) (CY_SAR2_CHAN_NUM(base) > (channel))
296
297 /** \endcond */
298
299 /** \} group_sar2_macro */
300
301 /***************************************
302 * Enumeration
303 ***************************************/
304
305 /**
306 * \addtogroup group_sar2_enums
307 * \{
308 */
309
310 /**
311 * SAR2 Driver error codes
312 */
313 typedef enum {
314 CY_SAR2_SUCCESS = 0x00U, /**< Returned successful */
315 CY_SAR2_BAD_PARAM = CY_SAR2_ID | CY_PDL_STATUS_ERROR | 0x01U, /**< A bad parameter was passed */
316 } cy_en_sar2_status_t;
317
318 /** When set uses 2 cycles for the Most Significant Bit (MSB). */
319 typedef enum {
320 CY_SAR2_MSB_STRETCH_MODE_1CYCLE = 0U, /**< Use 1 clock cycles per conversion. */
321 CY_SAR2_MSB_STRETCH_MODE_2CYCLE = 1U /**< Use 2 clock cycles per conversion. */
322 } cy_en_sar2_msb_stretch_mode_t;
323
324 /** The Diagnostic Reference function selection. */
325 typedef enum {
326 CY_SAR2_DIAG_REFERENCE_SELECT_VREFL = 0U, /**< DiagOut = VrefL */
327 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH_1DIV8 = 1U, /**< DiagOut = VrefH * 1/8 */
328 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH_2DIV8 = 2U, /**< DiagOut = VrefH * 2/8 */
329 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH_3DIV8 = 3U, /**< DiagOut = VrefH * 3/8 */
330 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH_4DIV8 = 4U, /**< DiagOut = VrefH * 4/8 */
331 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH_5DIV8 = 5U, /**< DiagOut = VrefH * 5/8 */
332 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH_6DIV8 = 6U, /**< DiagOut = VrefH * 6/8 */
333 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH_7DIV8 = 7U, /**< DiagOut = VrefH * 7/8 */
334 CY_SAR2_DIAG_REFERENCE_SELECT_VREFH = 8U, /**< DiagOut = VrefH */
335 CY_SAR2_DIAG_REFERENCE_SELECT_VREFX = 9U, /**< DiagOut = VrefX = VrefH * 199/200 */
336 CY_SAR2_DIAG_REFERENCE_SELECT_VBG = 10U, /**< DiagOut = Vbg from SRSS */
337 CY_SAR2_DIAG_REFERENCE_SELECT_VIN1 = 11U, /**< DiagOut = Vin1 */
338 CY_SAR2_DIAG_REFERENCE_SELECT_VIN2 = 12U, /**< DiagOut = Vin2 */
339 CY_SAR2_DIAG_REFERENCE_SELECT_VIN3 = 13U, /**< DiagOut = Vin3 */
340 CY_SAR2_DIAG_REFERENCE_SELECT_I_SOURCE = 14U, /**< DiagOut = Isource (10uA) */
341 CY_SAR2_DIAG_REFERENCE_SELECT_I_SINK = 15U /**< DiagOut = Isink (10uA) */
342 } cy_en_sar2_diag_reference_select_t;
343
344 /** The SAR2 trigger mode selection. */
345 typedef enum {
346 CY_SAR2_TRIGGER_OFF = 0U, /**< Use for channels in group, except the first channel */
347 CY_SAR2_TRIGGER_TCPWM = 1U, /**< Trigger from corresponding TCPWM channel */
348 CY_SAR2_TRIGGER_GENERIC0 = 2U, /**< Generic trigger input 0 */
349 CY_SAR2_TRIGGER_GENERIC1 = 3U, /**< Generic trigger input 1 */
350 CY_SAR2_TRIGGER_GENERIC2 = 4U, /**< Generic trigger input 2 */
351 CY_SAR2_TRIGGER_GENERIC3 = 5U, /**< Generic trigger input 3 */
352 CY_SAR2_TRIGGER_GENERIC4 = 6U, /**< Generic trigger input 4 */
353 CY_SAR2_TRIGGER_CONTINUOUS = 7U /**< Always triggered (also called idle), can only be used for at most 1 channel */
354 } cy_en_sar2_trigger_selection_t;
355
356 /** The SAR2 ADC preemption type selection. */
357 typedef enum {
358 CY_SAR2_PREEMPTION_ABORT_CANCEL = 0U, /**< Abort the ongoing acquisition, does not return. */
359 CY_SAR2_PREEMPTION_ABORT_RESTART = 1U, /**< Abort ongoing acquisition, up on return Restart
360 group from the first channel. */
361 CY_SAR2_PREEMPTION_ABORT_RESUME = 2U, /**< Abort the ongoing acquisition, up on return Resume group from
362 the aborted channel. */
363 CY_SAR2_PREEMPTION_FINISH_RESUME = 3U /**< Completed ongoing acquisition (including averaging), up on return
364 Resume group from the next channel. */
365 } cy_en_sar2_preemption_type_t;
366
367 /** Conversion done, trigger output selection. */
368 typedef enum {
369 CY_SAR2_DONE_LEVEL_PULSE = 0U, /**< The conversion done signal for other IPs is a 2-cycle pulse (clk_sys), no need
370 to read the result register. Typically used for triggering another IPs other
371 than DW. */
372 CY_SAR2_DONE_LEVEL_LEVEL = 1U /**< The conversion done signal for other IPs is the level output until the result
373 register is read. Typically used for DW and also overflowed? detection. */
374 } cy_en_sar2_done_level_t;
375
376 /** The address of the analog signal (pin) to be sampled by a corresponding channel. */
377 typedef enum {
378 CY_SAR2_PIN_ADDRESS_AN0 = 0U, /**< Vout = AN0, select the corresponding analog input. */
379 CY_SAR2_PIN_ADDRESS_AN1 = 1U,
380 CY_SAR2_PIN_ADDRESS_AN2 = 2U,
381 CY_SAR2_PIN_ADDRESS_AN3 = 3U,
382 CY_SAR2_PIN_ADDRESS_AN4 = 4U,
383 CY_SAR2_PIN_ADDRESS_AN5 = 5U,
384 CY_SAR2_PIN_ADDRESS_AN6 = 6U,
385 CY_SAR2_PIN_ADDRESS_AN7 = 7U,
386 CY_SAR2_PIN_ADDRESS_AN8 = 8U,
387 CY_SAR2_PIN_ADDRESS_AN9 = 9U,
388 CY_SAR2_PIN_ADDRESS_AN10 = 10U,
389 CY_SAR2_PIN_ADDRESS_AN11 = 11U,
390 CY_SAR2_PIN_ADDRESS_AN12 = 12U,
391 CY_SAR2_PIN_ADDRESS_AN13 = 13U,
392 CY_SAR2_PIN_ADDRESS_AN14 = 14U,
393 CY_SAR2_PIN_ADDRESS_AN15 = 15U,
394 CY_SAR2_PIN_ADDRESS_AN16 = 16U,
395 CY_SAR2_PIN_ADDRESS_AN17 = 17U,
396 CY_SAR2_PIN_ADDRESS_AN18 = 18U,
397 CY_SAR2_PIN_ADDRESS_AN19 = 19U,
398 CY_SAR2_PIN_ADDRESS_AN20 = 20U,
399 CY_SAR2_PIN_ADDRESS_AN21 = 21U,
400 CY_SAR2_PIN_ADDRESS_AN22 = 22U,
401 CY_SAR2_PIN_ADDRESS_AN23 = 23U,
402 CY_SAR2_PIN_ADDRESS_AN24 = 24U,
403 CY_SAR2_PIN_ADDRESS_AN25 = 25U,
404 CY_SAR2_PIN_ADDRESS_AN26 = 26U,
405 CY_SAR2_PIN_ADDRESS_AN27 = 27U,
406 CY_SAR2_PIN_ADDRESS_AN28 = 28U,
407 CY_SAR2_PIN_ADDRESS_AN29 = 29U,
408 CY_SAR2_PIN_ADDRESS_AN30 = 30U,
409 CY_SAR2_PIN_ADDRESS_AN31 = 31U,
410 CY_SAR2_PIN_ADDRESS_VMOTOR = 32U, /**< Vout = Vmotor, select the motor input. */
411 CY_SAR2_PIN_ADDRESS_VAUX = 33U, /**< Vout = Vaux, select the auxiliarly input. */
412 CY_SAR2_PIN_ADDRESS_AMUXBUS_A = 34U, /**< Vout = AmuxbusA. */
413 CY_SAR2_PIN_ADDRESS_AMUXBUS_B = 35U, /**< Vout = AmuxbusB. */
414 CY_SAR2_PIN_ADDRESS_VCCD = 36U, /**< Vout = Vccd. */
415 CY_SAR2_PIN_ADDRESS_VDDA = 37U, /**< Vout = Vdda. */
416 CY_SAR2_PIN_ADDRESS_VBG = 38U, /**< Vout = Vbg, Bandgap voltage from SRSS. */
417 CY_SAR2_PIN_ADDRESS_VTEMP = 39U, /**< Vout = Vtemp, select the temperature sensor.
418 Ensure that only 1 ADC is allowed to use this. */
419 CY_SAR2_PIN_ADDRESS_VREF_L = 62U, /**< Vout = VrefL (VrefL actually bypasses the SARMUX (XSL)). */
420 CY_SAR2_PIN_ADDRESS_VREF_H = 63U /**< Vout = VrefH (VrefH actually bypasses the SARMUX (XSH)) */
421 } cy_en_sar2_pin_address_t;
422
423 /** The physical port. This field is only valid for the SAR2 ADC0 block. */
424 typedef enum {
425 CY_SAR2_PORT_ADDRESS_SARMUX0 = 0U, /**< ADC uses its own SARMUX. */
426 CY_SAR2_PORT_ADDRESS_SARMUX1 = 1U, /**< ADC0 uses SARMUX1 (only valid for ADC0,
427 undefined result if used for ADC1-3). */
428 CY_SAR2_PORT_ADDRESS_SARMUX2 = 2U, /**< ADC0 uses SARMUX2 (only valid for ADC0,
429 undefined result if used for ADC1-3). */
430 CY_SAR2_PORT_ADDRESS_SARMUX3 = 3U /**< ADC0 uses SARMUX3 (only valid for ADC0,
431 undefined result if used for ADC1-3). */
432 } cy_en_sar2_port_address_t;
433
434 /** Preconditioning mode selection.
435 Preconditioning charges or discharges the SAR sample capacitor to the selected reference voltage for precondition
436 time (global) cycles, a break before a make cycle will be inserted before sampling starts the sample time.
437 See also \ref cy_stc_sar2_config_t */
438 typedef enum {
439 CY_SAR2_PRECONDITION_MODE_OFF = 0U, /**< No preconditioning. */
440 CY_SAR2_PRECONDITION_MODE_VREFL = 1U, /**< Discharge to VREFL. */
441 CY_SAR2_PRECONDITION_MODE_VREFH = 2U, /**< Charge to VREFH. */
442 CY_SAR2_PRECONDITION_MODE_DIAG = 3U /**< Connect the Diagnostic reference output during preconditioning.
443 Configure the Diagnostic reference to output
444 the reference voltage. */
445 } cy_en_sar2_precondition_mode_t;
446
447 /** Overlap mode or SARMUX Diagnostics selection, in both cases only used when the Diagnostic reference is used. */
448 typedef enum {
449 CY_SAR2_OVERLAP_DIAG_MODE_OFF = 0U, /**< No overlap or SARMUX Diagnostics. */
450 CY_SAR2_OVERLAP_DIAG_MODE_HALF = 1U, /**< Sample the selected analog input for 2 sample time periods.
451 During the first period, use the overlap sampling,
452 i.e. connect both the analog input and Diagnostic reference.
453 During the second period only connect the analog input */
454 CY_SAR2_OVERLAP_DIAG_MODE_FULL = 2U, /**< The selected analog input for a single sample
455 time period is like a normal sample but use the overlap sampling,
456 i.e. connect both the analog input and Diagnostic reference. */
457 CY_SAR2_OVERLAP_DIAG_MODE_MUX_DIAG = 3U /**< Select Diagnostic reference instead of analog signal at the
458 input of the SARMUX. This enables a functional safety check
459 of the SARMUX analog connections. */
460 } cy_en_sar2_overlap_diag_mode_t;
461
462 /** Calibration values selection. */
463 typedef enum {
464 CY_SAR2_CALIBRATION_VALUE_REGULAR = 0U, /**< Use regular calibration values */
465 CY_SAR2_CALIBRATION_VALUE_ALTERNATE = 1U /**< Use alternate calibration values */
466 } cy_en_sar2_calibration_value_select_t;
467
468
469 /** Post processing mode selection. */
470 typedef enum {
471 CY_SAR2_POST_PROCESSING_MODE_NONE = 0U, /**< No post processing. */
472 CY_SAR2_POST_PROCESSING_MODE_AVG = 1U, /**< Averaging. */
473 CY_SAR2_POST_PROCESSING_MODE_AVG_RANGE = 2U, /**< Averaging followed by Range detect. */
474 CY_SAR2_POST_PROCESSING_MODE_RANGE = 3U, /**< Range detect. */
475 CY_SAR2_POST_PROCESSING_MODE_RANGE_PULSE = 4U, /**< Range detect followed by pulse detect. */
476 } cy_en_sar2_post_processing_mode_t;
477
478 /** Result data alignment selection. */
479 typedef enum {
480 CY_SAR2_RESULT_ALIGNMENT_RIGHT = 0U, /**< The data is right aligned in result[11:0], with sign extension
481 to 16 bits if enabled. */
482 CY_SAR2_RESULT_ALIGNMENT_LEFT = 1U, /**< The data shifts left in result[15:4] with the
483 lower nibble 0. Caveat if the result is more than 12 bits
484 (e.g. after averaging), then the bits above 12 will be
485 discarded. */
486
487 } cy_en_sar2_result_alignment_t;
488
489 /** Select whether result data is signed or unsigned. */
490 typedef enum {
491 CY_SAR2_SIGN_EXTENTION_UNSIGNED = 0U, /**< Result data is unsigned (zero-extended if needed). */
492 CY_SAR2_SIGN_EXTENTION_SIGNED = 1U, /**< Result data is signed (sign-extended if needed). */
493 } cy_en_sar2_sign_extention_t;
494
495 /** Range detection mode selection. */
496 typedef enum {
497 CY_SAR2_RANGE_DETECTION_MODE_BELOW_LO = 0U, /**< Below Low threshold (result < Lo) */
498 CY_SAR2_RANGE_DETECTION_MODE_INSIDE_RANGE = 1U, /**< Inside range (Lo <= result < Hi) */
499 CY_SAR2_RANGE_DETECTION_MODE_ABOVE_HI = 2U, /**< Above high threshold (Hi <= result) */
500 CY_SAR2_RANGE_DETECTION_MODE_OUTSIDE_RANGE = 3U /**< Outside range (result < Lo || Hi <= result) */
501 } cy_en_sar2_range_detection_mode_t;
502
503 /** Reference buffer mode selection. */
504 typedef enum {
505 CY_SAR2_REF_BUF_MODE_OFF = 0U, /**< No reference mode selected */
506 CY_SAR2_REF_BUF_MODE_ON = 1U, /**< Reference buffered Vbg from SRSS */
507 CY_SAR2_REF_BUF_MODE_BYPASS = 3U, /**< Reference unbuffered Vbg from SRSS */
508 } cy_en_sar2_ref_buf_mode_t;
509
510 /** VDDA voltage range selection. */
511 typedef enum {
512 CY_SAR2_VDDA_2_7V_TO_4_5V = 0U, /**< The Vdda is in range from 2.7 to 4.5 V */
513 CY_SAR2_VDDA_4_5V_TO_5_5V = 1U, /**< The Vdda is in range from 4.5 to 5.5 V */
514 } cy_en_sar2_vdda_range_t;
515
516 /** \} group_sar2_enums */
517
518 /***************************************
519 * Configuration Structure
520 ***************************************/
521 /**
522 * \addtogroup group_sar2_data_structures
523 * \{
524 */
525
526 /** Configuration structure of the SAR2 ADC channel */
527 typedef struct {
528 bool channelHwEnable; /**< If HW is started, or just configured. */
529 cy_en_sar2_trigger_selection_t triggerSelection; /**< The ADC trigger mode selection,
530 see \ref cy_en_sar2_trigger_selection_t */
531 uint8_t channelPriority; /**< Channel priority. 0=highest, 7=lowest.*/
532 cy_en_sar2_preemption_type_t preenptionType; /**< The ADC preemption type selection,
533 see \ref cy_en_sar2_preemption_type_t */
534 bool isGroupEnd; /**< This value indicates that this channel is the last
535 channel of a group or not */
536 cy_en_sar2_done_level_t doneLevel; /**< Conversion done, trigger output selection,
537 see \ref cy_en_sar2_done_level_t */
538 cy_en_sar2_pin_address_t pinAddress; /**< The address of the analog signal (pin) to be sampled by
539 a corresponding channel,
540 see \ref cy_en_sar2_pin_address_t */
541 cy_en_sar2_port_address_t portAddress; /**< Select the physical port,
542 see \ref cy_en_sar2_port_address_t */
543 uint8_t extMuxSelect; /**< External analog mux selection. */
544 bool extMuxEnable; /**< External analog mux enable. */
545 cy_en_sar2_precondition_mode_t preconditionMode; /**< Select Preconditioning mode,
546 see \ref cy_en_sar2_precondition_mode_t */
547 cy_en_sar2_overlap_diag_mode_t overlapDiagMode; /**< Select Overlap mode or SARMUX Diagnostics,
548 see \ref cy_en_sar2_overlap_diag_mode_t */
549 uint16_t sampleTime; /**< Sample time (aperture) in ADC clock cycles.
550 The minimum is 1 (0 gives the same result as 1),
551 the minimum time needed for the proper settling is at
552 least 300ns, i.e. 6 clock cycles at the max frequency of
553 20MHz. */
554 cy_en_sar2_calibration_value_select_t calibrationValueSelect; /**< Select calibration values, see
555 \ref cy_en_sar2_calibration_value_select_t */
556 cy_en_sar2_result_alignment_t resultAlignment; /**< Select the result data alignment,
557 see \ref cy_en_sar2_result_alignment_t */
558 cy_en_sar2_sign_extention_t signExtention; /**< Select whether the result data is signed or unsigned,
559 see \ref cy_en_sar2_sign_extention_t */
560 cy_en_sar2_post_processing_mode_t postProcessingMode; /**< Select Post processing mode == ,
561 see \ref cy_en_sar2_post_processing_mode_t */
562 uint16_t averageCount; /**< Averaging count. Active only if post processing mode
563 is set to Averaging or Averaging + Range detect.
564 The valid range is [1..256] */
565 uint8_t rightShift; /**< Shift Right. When using post processing mode with
566 averaging, the set value is used for the right-shift
567 value of the conversion result. Averaging data may be
568 over 12 bits, therefore the user must ensure the
569 conversion result is not to over 12 bits by using
570 this value. This value is also used to fit the 12-bit
571 result in 8 bits. The valid range is [0..15]*/
572 uint16_t positiveReload; /**< Positive pulse reload value. Active only if
573 post processing is set to the Pulse detection.
574 The valid range is [0..255]. */
575 uint8_t negativeReload; /**< Negative pulse reload value. Active only if
576 post processing is set to the Pulse detection.
577 The valid range is [0..31]. */
578 cy_en_sar2_range_detection_mode_t rangeDetectionMode; /**< Select Range detection mode,
579 see \ref cy_en_sar2_range_detection_mode_t */
580 uint16_t rangeDetectionLoThreshold; /**< Range detect low threshold (Lo) */
581 uint16_t rangeDetectionHiThreshold; /**< Range detect high threshold (Hi) */
582 uint32_t interruptMask; /**< Select the interrupt sources.
583 See \ref group_sar2_macros_interrupt */
584
585 } cy_stc_sar2_channel_config_t;
586
587 /** Configuration structure of the SAR2 HW block */
588 typedef struct {
589 uint8_t preconditionTime; /**< The number of ADC clock cycles when Preconditioning is done
590 before the sample window starts. */
591 uint8_t powerupTime; /**< The number of cycles to wait for power up after
592 IDLE_PWRDWN. */
593 bool enableIdlePowerDown; /**< When idle automatically power is down, the analog if
594 true. */
595 cy_en_sar2_msb_stretch_mode_t msbStretchMode; /**< When the set uses 2 cycles for the Most Significant Bit
596 (MSB), see \ref cy_en_sar2_msb_stretch_mode_t */
597 bool enableHalfLsbConv; /**< When true takes an extra cycle to convert the half LSB and
598 add it to the 12-bit result for Missing Code Recovery */
599 bool sarMuxEnable; /**< Enable the SARMUX (only valid if sarIpEnable = true). */
600 bool adcEnable; /**< Enable the SAR ADC and SAR sequencer
601 (only valid if sarIpEnable = true). */
602 bool sarIpEnable; /**< Enable the SAR IP. */
603 cy_stc_sar2_channel_config_t * channelConfig[CY_SAR2_NUM_CHANNELS]; /**< Channel configuration pointer array. */
604 } cy_stc_sar2_config_t;
605
606 /** Digital calibration values. */
607 typedef struct {
608 uint16_t offset; /**< Digital offset correction. The valid range is [0..4095] */
609 int8_t gain; /**< Digital gain correction. The valid range is [-32..31] */
610 } cy_stc_sar2_digital_calibration_config_t;
611
612 /** Analog calibration values. */
613 typedef struct {
614 int8_t offset; /**< Analog offset correction. The valid range is [-128..127] */
615 int8_t gain; /**< Analog gain correction. The valid range is [-16..15] */
616 } cy_stc_sar2_analog_calibration_conifg_t;
617
618 /** Configuration structure of diagnosis function. */
619 typedef struct {
620 cy_en_sar2_diag_reference_select_t referenceSelect; /**< Select Diagnostic Reference function,
621 see \ref cy_en_sar2_diag_reference_select_t */
622 } cy_stc_sar2_diag_config_t;
623
624 /** Control freeze feature for debugging. */
625 typedef struct {
626 bool enableFreezeAdc0; /**< If true, freeze ADC0 in Debug mode. */
627 bool enableFreezeAdc1; /**< If true, freeze ADC1 in Debug mode. */
628 bool enableFreezeAdc2; /**< If true, freeze ADC2 in Debug mode. */
629 bool enableFreezeAdc3; /**< If true, freeze ADC3 in Debug mode. */
630 } cy_stc_sar2_debug_freeze_config_t;
631
632 /** \} group_sar2_data_structures */
633
634 /***************************************
635 * Function Prototypes
636 ***************************************/
637 /**
638 * \addtogroup group_sar2_functions
639 * \{
640 */
641
642 /* For each ADC */
643 cy_en_sar2_status_t Cy_SAR2_Init(PASS_SAR_Type * base, const cy_stc_sar2_config_t * config);
644 __STATIC_INLINE void Cy_SAR2_DeInit(PASS_SAR_Type * base);
645 __STATIC_INLINE void Cy_SAR2_Enable(PASS_SAR_Type * base);
646 __STATIC_INLINE void Cy_SAR2_Disable(PASS_SAR_Type * base);
647 __STATIC_INLINE uint32_t Cy_SAR2_GetPendingStatus(const PASS_SAR_Type * base);
648 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkValidStatus(const PASS_SAR_Type * base);
649 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkRangeStatus(const PASS_SAR_Type * base);
650 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkRangeHiStatus(const PASS_SAR_Type * base);
651 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkPulseStatus(const PASS_SAR_Type * base);
652 __STATIC_INLINE uint32_t Cy_SAR2_GetResultValidStatus(const PASS_SAR_Type * base);
653 __STATIC_INLINE uint32_t Cy_SAR2_GetResultRangeHiStatus(const PASS_SAR_Type * base);
654
655 /* For each channel */
656 cy_en_sar2_status_t Cy_SAR2_Channel_Init(PASS_SAR_Type * base, uint32_t channel,
657 const cy_stc_sar2_channel_config_t * channelConfig);
658 void Cy_SAR2_Channel_DeInit(PASS_SAR_Type * base, uint32_t channel);
659 uint16_t Cy_SAR2_Channel_GetResult(PASS_SAR_Type * base, uint32_t channel, uint32_t * status);
660 uint16_t Cy_SAR2_Channel_GetWorkingData(PASS_SAR_Type * base, uint32_t channel, uint32_t * status);
661 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetGroupStatus(PASS_SAR_Type * base, uint32_t channel);
662 __STATIC_INLINE void Cy_SAR2_Channel_Enable(PASS_SAR_Type * base, uint32_t channel);
663 __STATIC_INLINE void Cy_SAR2_Channel_Disable(PASS_SAR_Type * base, uint32_t channel);
664 __STATIC_INLINE void Cy_SAR2_Channel_SoftwareTrigger(PASS_SAR_Type * base, uint32_t channel);
665 __STATIC_INLINE void Cy_SAR2_Channel_SetInterruptMask(PASS_SAR_Type * base, uint32_t channel, uint32_t intrMask);
666 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetInterruptMask(PASS_SAR_Type * base, uint32_t channel);
667 __STATIC_INLINE void Cy_SAR2_Channel_ClearInterrupt(PASS_SAR_Type * base, uint32_t channel, uint32_t intrMask);
668 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetInterruptStatus(PASS_SAR_Type * base, uint32_t channel);
669 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetInterruptStatusMasked(PASS_SAR_Type * base, uint32_t channel);
670 __STATIC_INLINE void Cy_SAR2_Channel_SetInterrupt(PASS_SAR_Type * base, uint32_t channel, uint32_t intrMask);
671
672 /* For diagnosis function */
673 cy_en_sar2_status_t Cy_SAR2_Diag_Init(PASS_SAR_Type * base, const cy_stc_sar2_diag_config_t * diagConfig);
674 __STATIC_INLINE void Cy_SAR2_Diag_Enable(PASS_SAR_Type * base);
675 __STATIC_INLINE void Cy_SAR2_Diag_Disable(PASS_SAR_Type * base);
676
677 /* For calibration */
678 __STATIC_INLINE void Cy_SAR2_TriggerCalibrationUpdate(PASS_SAR_Type * base);
679 __STATIC_INLINE bool Cy_SAR2_IsCalibrationUpdateDone(PASS_SAR_Type * base);
680 cy_en_sar2_status_t Cy_SAR2_SetDigitalCalibrationValue(PASS_SAR_Type * base,
681 const cy_stc_sar2_digital_calibration_config_t * digCalibConfig);
682 cy_en_sar2_status_t Cy_SAR2_GetDigitalCalibrationValue(PASS_SAR_Type * base,
683 cy_stc_sar2_digital_calibration_config_t * digCalibConfig);
684 cy_en_sar2_status_t Cy_SAR2_SetAltDigitalCalibrationValue(PASS_SAR_Type * base,
685 const cy_stc_sar2_digital_calibration_config_t * altDigCalibConfig);
686 cy_en_sar2_status_t Cy_SAR2_GetAltDigitalCalibrationValue(PASS_SAR_Type * base,
687 cy_stc_sar2_digital_calibration_config_t * altDigCalibConfig);
688 cy_en_sar2_status_t Cy_SAR2_SetAnalogCalibrationValue(PASS_SAR_Type * base,
689 cy_stc_sar2_analog_calibration_conifg_t * analogCalibConfig);
690 cy_en_sar2_status_t Cy_SAR2_GetAnalogCalibrationValue(PASS_SAR_Type * base,
691 cy_stc_sar2_analog_calibration_conifg_t * analogCalibConfig);
692 cy_en_sar2_status_t Cy_SAR2_SetAltAnalogCalibrationValue(PASS_SAR_Type * base,
693 cy_stc_sar2_analog_calibration_conifg_t * altAnalogCalibConfig);
694 cy_en_sar2_status_t Cy_SAR2_GetAltAnalogCalibrationValue(PASS_SAR_Type * base,
695 cy_stc_sar2_analog_calibration_conifg_t * altAnalogCalibConfig);
696
697 /* For debugging */
698 __STATIC_INLINE cy_en_sar2_ref_buf_mode_t Cy_SAR2_GetReferenceBufferMode(PASS_EPASS_MMIO_Type * base);
699 __STATIC_INLINE void Cy_SAR2_SetReferenceBufferMode(PASS_EPASS_MMIO_Type * base, cy_en_sar2_ref_buf_mode_t mode);
700 cy_en_sar2_status_t Cy_SAR2_SetDebugFreezeMode(PASS_EPASS_MMIO_Type * base,
701 const cy_stc_sar2_debug_freeze_config_t * debConfig);
702
703 /* For SAR general trigger input / output trigger setting */
704 cy_en_sar2_status_t Cy_SAR2_SetGenericTriggerInput(PASS_EPASS_MMIO_Type * base, uint8_t numOfAdc,
705 uint8_t triggerInputNumber, uint8_t genericTriggerValue);
706 cy_en_sar2_status_t Cy_SAR2_SetGenericTriggerOutput(PASS_EPASS_MMIO_Type * base, uint8_t numOfAdc,
707 uint8_t triggerOutputNumber, uint8_t genericTriggerValue);
708
709 /* For temperature measurements */
710 double Cy_SAR2_CalculateDieTemperature(cy_en_sar2_vdda_range_t VDDARange, uint16_t adcVtempRawValue,
711 uint16_t adcVbgRawValue);
712
713 /*******************************************************************************
714 * In-line Function Implementation
715 *******************************************************************************/
716
717 /*******************************************************************************
718 * Function Name: Cy_SAR2_Enable
719 ****************************************************************************//**
720 *
721 * Enables the SAR ADC block.
722 *
723 * \param base : The pointer to the SAR block.
724 *
725 *******************************************************************************/
Cy_SAR2_Enable(PASS_SAR_Type * base)726 __STATIC_INLINE void Cy_SAR2_Enable(PASS_SAR_Type * base)
727 {
728 base->CTL |= PASS_SAR_CTL_ENABLED_Msk;
729 }
730
731 /*******************************************************************************
732 * Function Name: Cy_SAR2_Disable
733 ****************************************************************************//**
734 *
735 * Disables the SAR ADC block.
736 *
737 * \param base : The pointer to the SAR block.
738 *
739 *******************************************************************************/
Cy_SAR2_Disable(PASS_SAR_Type * base)740 __STATIC_INLINE void Cy_SAR2_Disable(PASS_SAR_Type * base)
741 {
742 base->CTL &= ~PASS_SAR_CTL_ENABLED_Msk;
743 }
744
745 /*******************************************************************************
746 * Function Name: Cy_SAR2_DeInit
747 ****************************************************************************//**
748 *
749 * De-initializes the SAR ADC block, returns the register values to default.
750 *
751 * \param base : The pointer to the SAR block.
752 *
753 *******************************************************************************/
Cy_SAR2_DeInit(PASS_SAR_Type * base)754 __STATIC_INLINE void Cy_SAR2_DeInit(PASS_SAR_Type * base)
755 {
756 base->PRECOND_CTL = 0UL;
757 base->CTL = 0UL;
758 }
759
760 /*******************************************************************************
761 * Function Name: Cy_SAR2_GetPendingStatus
762 ****************************************************************************//**
763 *
764 * Returns the trigger pending status.
765 *
766 * \param base
767 * The pointer to the SAR instance.
768 *
769 * \return Pending status. Each bit corresponds a channel, i.e.
770 * If bit0 is 1, ch.0 is pending for a trigger.
771 *
772 *******************************************************************************/
Cy_SAR2_GetPendingStatus(const PASS_SAR_Type * base)773 __STATIC_INLINE uint32_t Cy_SAR2_GetPendingStatus(const PASS_SAR_Type * base)
774 {
775 return base->TR_PEND;
776 }
777
778 /*******************************************************************************
779 * Function Name: Cy_SAR2_GetWorkValidStatus
780 ****************************************************************************//**
781 *
782 * Returns the work register valid status.
783 *
784 * \param base
785 * The pointer to the SAR instance.
786 *
787 * \return Work register valid status. Each bit corresponds a channel, i.e.
788 * If bit0 is 1, ch.0's work register is valid.
789 *
790 *******************************************************************************/
Cy_SAR2_GetWorkValidStatus(const PASS_SAR_Type * base)791 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkValidStatus(const PASS_SAR_Type * base)
792 {
793 return base->WORK_VALID;
794 }
795
796 /*******************************************************************************
797 * Function Name: Cy_SAR2_GetWorkRangeStatus
798 ****************************************************************************//**
799 *
800 * Returns work register range status.
801 *
802 * \param base
803 * The pointer to the SAR instance.
804 *
805 * \return Work register range status. Each bit correspond a channel, i.e.
806 * If bit0 is 1, ch.0 detected a range.
807 *
808 *******************************************************************************/
Cy_SAR2_GetWorkRangeStatus(const PASS_SAR_Type * base)809 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkRangeStatus(const PASS_SAR_Type * base)
810 {
811 return base->WORK_RANGE;
812 }
813
814 /*******************************************************************************
815 * Function Name: Cy_SAR2_GetWorkRangeHiStatus
816 ****************************************************************************//**
817 *
818 * Returns work register range high status.
819 *
820 * \param base
821 * The pointer to the SAR instance.
822 *
823 * \return Work register range Hi status. Each bit corresponds a channel, i.e.
824 * If bit0 is 1, ch.0 detected "out of range" and the value was above the high
825 * threshold.
826 *
827 *******************************************************************************/
Cy_SAR2_GetWorkRangeHiStatus(const PASS_SAR_Type * base)828 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkRangeHiStatus(const PASS_SAR_Type * base)
829 {
830 return base->WORK_RANGE_HI;
831 }
832
833 /*******************************************************************************
834 * Function Name: Cy_SAR2_GetWorkPulseStatus
835 ****************************************************************************//**
836 *
837 * Returns the work register pulse status.
838 *
839 * \param base
840 * The pointer to the SAR instance.
841 *
842 * \return Work register pulse status. Each bit corresponds a channel, i.e.
843 * If bit0 is 1, ch.0 detected a pulse.
844 *
845 *******************************************************************************/
Cy_SAR2_GetWorkPulseStatus(const PASS_SAR_Type * base)846 __STATIC_INLINE uint32_t Cy_SAR2_GetWorkPulseStatus(const PASS_SAR_Type * base)
847 {
848 return base->WORK_PULSE;
849 }
850
851 /*******************************************************************************
852 * Function Name: Cy_SAR2_GetResultValidStatus
853 ****************************************************************************//**
854 *
855 * Returns result register valid status.
856 *
857 * \param base
858 * The pointer to the SAR instance.
859 *
860 * \return Result register pulse status. Each bit corresponds a channel, i.e.
861 * If bit0 is 1, ch.0's result register is valid.
862 *
863 *******************************************************************************/
Cy_SAR2_GetResultValidStatus(const PASS_SAR_Type * base)864 __STATIC_INLINE uint32_t Cy_SAR2_GetResultValidStatus(const PASS_SAR_Type * base)
865 {
866 return base->RESULT_VALID;
867 }
868
869 /*******************************************************************************
870 * Function Name: Cy_SAR2_GetResultRangeHiStatus
871 ****************************************************************************//**
872 *
873 * Returns result register range high status.
874 *
875 * \param base
876 * The pointer to the SAR instance.
877 *
878 * \return Result register range high. Each bit corresponds a channel, i.e.
879 * If bit0 is 1, ch.0 detected "out of range" and the value was above the high
880 * threshold.
881 *
882 *******************************************************************************/
Cy_SAR2_GetResultRangeHiStatus(const PASS_SAR_Type * base)883 __STATIC_INLINE uint32_t Cy_SAR2_GetResultRangeHiStatus(const PASS_SAR_Type * base)
884 {
885 return base->RESULT_RANGE_HI;
886 }
887
888 /*******************************************************************************
889 * Function Name: Cy_SAR2_Channel_Enable
890 ****************************************************************************//**
891 *
892 * Enables a corresponding channel.
893 *
894 * \param base
895 * The pointer to the SAR instance.
896 *
897 * \param channel
898 * The channel number.
899 *
900 * \note To enable a group either start with enabling the last channel first
901 * and the first channel last, or start the trigger after all channels are
902 * enabled.
903 *
904 *******************************************************************************/
Cy_SAR2_Channel_Enable(PASS_SAR_Type * base,uint32_t channel)905 __STATIC_INLINE void Cy_SAR2_Channel_Enable(PASS_SAR_Type * base, uint32_t channel)
906 {
907 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
908
909 base->CH[channel].ENABLE |= PASS_SAR_CH_ENABLE_CHAN_EN_Msk;
910 }
911
912 /*******************************************************************************
913 * Function Name: Cy_SAR2_Channel_Disable
914 ****************************************************************************//**
915 *
916 * Disables a corresponding channel.
917 *
918 * \param base
919 * The pointer to the SAR instance.
920 *
921 * \param channel
922 * The channel number.
923 *
924 * \note To disable a group either stop the trigger first or begin with disabling
925 * the lowest channel first.
926 *
927 *******************************************************************************/
Cy_SAR2_Channel_Disable(PASS_SAR_Type * base,uint32_t channel)928 __STATIC_INLINE void Cy_SAR2_Channel_Disable(PASS_SAR_Type * base, uint32_t channel)
929 {
930 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
931
932 base->CH[channel].ENABLE &= ~PASS_SAR_CH_ENABLE_CHAN_EN_Msk;
933 }
934
935 /*******************************************************************************
936 * Function Name: Cy_SAR2_Channel_SoftwareTrigger
937 ****************************************************************************//**
938 *
939 * Issues a software start trigger.
940 *
941 * \param base
942 * The pointer to the SAR instance.
943 *
944 * \param channel
945 * The channel number.
946 *
947 *******************************************************************************/
Cy_SAR2_Channel_SoftwareTrigger(PASS_SAR_Type * base,uint32_t channel)948 __STATIC_INLINE void Cy_SAR2_Channel_SoftwareTrigger(PASS_SAR_Type * base, uint32_t channel)
949 {
950 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
951
952 SAR2_CH_TR_CMD(base, channel) |= _VAL2FLD(PASS_SAR_CH_TR_CMD_START, 1UL);
953 }
954
955 /*******************************************************************************
956 * Function Name: Cy_SAR2_Diag_Enable
957 ****************************************************************************//**
958 *
959 * Enables the diagnostic function.
960 *
961 * \param base: The pointer to the hardware SAR block.
962 *
963 *******************************************************************************/
Cy_SAR2_Diag_Enable(PASS_SAR_Type * base)964 __STATIC_INLINE void Cy_SAR2_Diag_Enable(PASS_SAR_Type * base)
965 {
966 base->DIAG_CTL |= _VAL2FLD(PASS_SAR_DIAG_CTL_DIAG_EN, 1UL);
967 }
968
969 /*******************************************************************************
970 * Function Name: Cy_SAR2_Diag_Disable
971 ****************************************************************************//**
972 *
973 * Disables the diagnostic function.
974 *
975 * \param base: The pointer to the hardware SAR block.
976 *
977 *******************************************************************************/
Cy_SAR2_Diag_Disable(PASS_SAR_Type * base)978 __STATIC_INLINE void Cy_SAR2_Diag_Disable(PASS_SAR_Type * base)
979 {
980 base->DIAG_CTL &= ~PASS_SAR_DIAG_CTL_DIAG_EN_Msk;
981 }
982
983 /*******************************************************************************
984 * Function Name: Cy_SAR2_TriggerCalibrationUpdate
985 ****************************************************************************//**
986 *
987 * Triggers calibration update. After triggering, coherently copies the values
988 * from alternate calibration regs to the current calibration regs.
989 *
990 * \param base: The pointer to the hardware SAR block.
991 *
992 * \note Set an alternate calibration value before calling this function.
993 * After triggering, calibration will be updated as soon as the SAR is
994 * idle or a "continuous" triggered group completes.
995 * To determine whether calibration update is done or not call
996 * the Cy_SAR2_IsCalibrationUpdateDone function.
997 *******************************************************************************/
Cy_SAR2_TriggerCalibrationUpdate(PASS_SAR_Type * base)998 __STATIC_INLINE void Cy_SAR2_TriggerCalibrationUpdate(PASS_SAR_Type * base)
999 {
1000 base->CAL_UPD_CMD = _VAL2FLD(PASS_SAR_CAL_UPD_CMD_UPDATE, 1UL);
1001 }
1002
1003 /*******************************************************************************
1004 * Function Name: Cy_SAR2_IsCalibrationUpdateDone
1005 ****************************************************************************//**
1006 *
1007 * Gets the status of calibration update.
1008 *
1009 * \param base: The pointer to the hardware SAR block.
1010 *
1011 * \return If true, calibration update is done.
1012 * If false, calibration update is not yet done.
1013 *
1014 *******************************************************************************/
Cy_SAR2_IsCalibrationUpdateDone(PASS_SAR_Type * base)1015 __STATIC_INLINE bool Cy_SAR2_IsCalibrationUpdateDone(PASS_SAR_Type * base)
1016 {
1017 return (_FLD2BOOL(PASS_SAR_CAL_UPD_CMD_UPDATE, base->CAL_UPD_CMD));
1018 }
1019
1020 /*******************************************************************************
1021 * Function Name: Cy_SAR2_Channel_SetInterruptMask
1022 ****************************************************************************//**
1023 *
1024 * Configures the channel interrupt.
1025 *
1026 * \param base
1027 * The pointer to the SAR instance.
1028 *
1029 * \param channel
1030 * The channel number.
1031 *
1032 * \param intrMask
1033 * The mask of interrupts. Select one or more values from
1034 * \ref group_sar2_macros_interrupt and "OR" them together:
1035 * - \ref CY_SAR2_INT_GRP_DONE
1036 * - \ref CY_SAR2_INT_GRP_CANCELLED
1037 * - \ref CY_SAR2_INT_GRP_OVERFLOW
1038 * - \ref CY_SAR2_INT_CH_RANGE
1039 * - \ref CY_SAR2_INT_CH_PULSE
1040 * - \ref CY_SAR2_INT_CH_OVERFLOW
1041 *
1042 *******************************************************************************/
Cy_SAR2_Channel_SetInterruptMask(PASS_SAR_Type * base,uint32_t channel,uint32_t intrMask)1043 __STATIC_INLINE void Cy_SAR2_Channel_SetInterruptMask(PASS_SAR_Type * base, uint32_t channel, uint32_t intrMask)
1044 {
1045 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
1046
1047 SAR2_CH_INTR_MASK(base, channel) = (intrMask & CY_SAR2_INTR);
1048 }
1049
1050 /*******************************************************************************
1051 * Function Name: Cy_SAR2_Channel_GetInterruptMask
1052 ****************************************************************************//**
1053 *
1054 * Returns interrupt mask configuration.
1055 *
1056 * \param base
1057 * The pointer to the SAR instance.
1058 *
1059 * \param channel
1060 * The channel number.
1061 *
1062 * \return Interrupt mask value \ref group_sar2_macros_interrupt
1063 *
1064 *******************************************************************************/
Cy_SAR2_Channel_GetInterruptMask(PASS_SAR_Type * base,uint32_t channel)1065 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetInterruptMask(PASS_SAR_Type * base, uint32_t channel)
1066 {
1067 return SAR2_CH_INTR_MASK(base, channel);
1068 }
1069
1070 /*******************************************************************************
1071 * Function Name: Cy_SAR2_Channel_ClearInterrupt
1072 ****************************************************************************//**
1073 *
1074 * Clears the interrupt.
1075 * The interrupt must be cleared with this function so that the hardware
1076 * can set subsequent interrupts and those interrupts can be forwarded
1077 * to the interrupt controller, if enabled.
1078 *
1079 * \param base
1080 * The pointer to the SAR instance.
1081 *
1082 * \param channel
1083 * The channel number.
1084 *
1085 * \param intrMask
1086 * The mask of interrupts to clear. Typically this will be the value returned
1087 * from \ref Cy_SAR_GetInterruptStatus.
1088 * Alternately, select one or more values from \ref group_sar2_macros_interrupt
1089 * and "OR" them together.
1090 * - \ref CY_SAR2_INT_GRP_DONE
1091 * - \ref CY_SAR2_INT_GRP_CANCELLED
1092 * - \ref CY_SAR2_INT_GRP_OVERFLOW
1093 * - \ref CY_SAR2_INT_CH_RANGE
1094 * - \ref CY_SAR2_INT_CH_PULSE
1095 * - \ref CY_SAR2_INT_CH_OVERFLOW
1096 *
1097 *******************************************************************************/
Cy_SAR2_Channel_ClearInterrupt(PASS_SAR_Type * base,uint32_t channel,uint32_t intrMask)1098 __STATIC_INLINE void Cy_SAR2_Channel_ClearInterrupt(PASS_SAR_Type * base, uint32_t channel, uint32_t intrMask)
1099 {
1100 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
1101
1102 SAR2_CH_INTR(base, channel) = (intrMask & CY_SAR2_INTR);
1103 /* This dummy reading is necessary here. It provides a guarantee that interrupt is cleared at returning from this function. */
1104 (void) SAR2_CH_INTR(base, channel);
1105 }
1106
1107 /*******************************************************************************
1108 * Function Name: Cy_SAR2_Channel_GetInterruptStatus
1109 ****************************************************************************//**
1110 *
1111 * Returns the channel interrupt register status.
1112 *
1113 * \param base
1114 * The pointer to the SAR instance.
1115 *
1116 * \param channel
1117 * The channel number.
1118 *
1119 * \return status
1120 * Contents of the channel interrupt register. See
1121 * \ref group_sar2_macros_interrupt.
1122 *
1123 *******************************************************************************/
Cy_SAR2_Channel_GetInterruptStatus(PASS_SAR_Type * base,uint32_t channel)1124 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetInterruptStatus(PASS_SAR_Type * base, uint32_t channel)
1125 {
1126 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
1127
1128 return (SAR2_CH_INTR(base, channel));
1129 }
1130
1131 /*******************************************************************************
1132 * Function Name: Cy_SAR2_Channel_GetInterruptStatusMasked
1133 ****************************************************************************//**
1134 *
1135 * Returns interrupt status.
1136 *
1137 * \param base
1138 * The pointer to the SAR instance.
1139 *
1140 * \param channel
1141 * The channel number.
1142 *
1143 * \return status
1144 * Contents of the channel interrupt register. See
1145 * \ref group_sar2_macros_interrupt.
1146 *
1147 *******************************************************************************/
Cy_SAR2_Channel_GetInterruptStatusMasked(PASS_SAR_Type * base,uint32_t channel)1148 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetInterruptStatusMasked(PASS_SAR_Type * base, uint32_t channel)
1149 {
1150 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
1151
1152 return (SAR2_CH_INTR_MASKED(base, channel));
1153 }
1154
1155 /*******************************************************************************
1156 * Function Name: Cy_SAR2_Channel_SetInterrupt
1157 ****************************************************************************//**
1158 *
1159 * Triggers an interrupt with software.
1160 *
1161 * \param base
1162 * The pointer to the SAR instance.
1163 *
1164 * \param channel
1165 * The channel number.
1166 *
1167 * \param intrMask
1168 * The mask of interrupts to set.
1169 * Select one or more values from \ref group_sar2_macros_interrupt and "OR" them
1170 * together.
1171 * - \ref CY_SAR2_INT_GRP_DONE
1172 * - \ref CY_SAR2_INT_GRP_CANCELLED
1173 * - \ref CY_SAR2_INT_GRP_OVERFLOW
1174 * - \ref CY_SAR2_INT_CH_RANGE
1175 * - \ref CY_SAR2_INT_CH_PULSE
1176 * - \ref CY_SAR2_INT_CH_OVERFLOW
1177 *
1178 *******************************************************************************/
Cy_SAR2_Channel_SetInterrupt(PASS_SAR_Type * base,uint32_t channel,uint32_t intrMask)1179 __STATIC_INLINE void Cy_SAR2_Channel_SetInterrupt(PASS_SAR_Type * base, uint32_t channel, uint32_t intrMask)
1180 {
1181 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
1182
1183 SAR2_CH_INTR_SET(base, channel) = (intrMask & CY_SAR2_INTR);
1184 }
1185
1186 /*******************************************************************************
1187 * Function Name: Cy_SAR2_Channel_GetGroupStatus
1188 ****************************************************************************//**
1189 *
1190 * Returns the group conversion status.
1191 *
1192 * \param base
1193 * The pointer to an SAR instance.
1194 *
1195 * \param channel
1196 * The channel number.
1197 *
1198 * \return status
1199 * The status of the group, conversion status bits ORed.
1200 *
1201 *******************************************************************************/
Cy_SAR2_Channel_GetGroupStatus(PASS_SAR_Type * base,uint32_t channel)1202 __STATIC_INLINE uint32_t Cy_SAR2_Channel_GetGroupStatus(PASS_SAR_Type * base, uint32_t channel)
1203 {
1204 CY_ASSERT_L1(CY_SAR2_CHAN_NUM_VALID(base, channel));
1205
1206 return (base->CH[channel].GRP_STAT);
1207 }
1208
1209 /*******************************************************************************
1210 * Function Name: Cy_SAR2_SetReferenceBufferMode
1211 ****************************************************************************//**
1212 *
1213 * Sets ePASS MMIO reference buffer mode.
1214 *
1215 * \param base
1216 * The pointer to the PASS instance.
1217 *
1218 * \param mode
1219 * The reference buffer mode number.
1220 *
1221 *******************************************************************************/
Cy_SAR2_SetReferenceBufferMode(PASS_EPASS_MMIO_Type * base,cy_en_sar2_ref_buf_mode_t mode)1222 __STATIC_INLINE void Cy_SAR2_SetReferenceBufferMode(PASS_EPASS_MMIO_Type * base, cy_en_sar2_ref_buf_mode_t mode)
1223 {
1224 base->PASS_CTL = _CLR_SET_FLD32U(base->PASS_CTL, PASS_EPASS_MMIO_PASS_CTL_REFBUF_MODE, mode);
1225 }
1226
1227 /*******************************************************************************
1228 * Function Name: Cy_SAR2_GetReferenceBufferMode
1229 ****************************************************************************//**
1230 *
1231 * Gets ePASS MMIO reference buffer mode.
1232 *
1233 * \param base
1234 * The pointer to the PASS instance.
1235 *
1236 * \return
1237 * \ref cy_en_sar2_ref_buf_mode_t
1238 *
1239 *******************************************************************************/
Cy_SAR2_GetReferenceBufferMode(PASS_EPASS_MMIO_Type * base)1240 __STATIC_INLINE cy_en_sar2_ref_buf_mode_t Cy_SAR2_GetReferenceBufferMode(PASS_EPASS_MMIO_Type * base)
1241 {
1242 return (cy_en_sar2_ref_buf_mode_t)(int32_t)(uint32_t)_FLD2VAL(PASS_EPASS_MMIO_PASS_CTL_REFBUF_MODE, base->PASS_CTL);
1243 }
1244
1245
1246 /** \} group_sar2_functions */
1247
1248 #if defined(__cplusplus)
1249 }
1250 #endif
1251
1252 #endif /* CY_SAR2_H */
1253
1254 /** \} group_sar2 */
1255 #endif /* CY_IP_MXS40EPASS_ESAR */
1256
1257 /* [] END OF FILE */
1258
