1 /***************************************************************************//**
2 * \file cy_pdm_pcm_v2.h
3 * \version 1.10
4 *
5 * The header file of the PDM_PCM driver.
6 *
7 ********************************************************************************
8 * \copyright
9 * Copyright 2019-2022 Cypress Semiconductor Corporation
10 * SPDX-License-Identifier: Apache-2.0
11 *
12 * Licensed under the Apache License, Version 2.0 (the "License");
13 * you may not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 * http://www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an "AS IS" BASIS,
20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 *******************************************************************************/
24
25 /**
26 * \addtogroup group_pdm_pcm_v2
27 * \{
28 * \note IP Supported: PDM
29 * \note Device Categories: CAT1B. Please refer <a href="usergroup1.html">Device Catalog</a>.
30 *
31 * The pulse-density modulation to pulse-code modulation (PDM-PCM) driver provides an
32 * API to manage PDM-PCM conversion. A PDM-PCM converter is used
33 * to convert 1-bit digital audio streaming data to PCM data.
34 *
35 * The functions and other declarations used in this driver are in cy_pdm_pcm_v2.h.
36 * You can include cy_pdl.h (ModusToolbox only) to get access to all functions
37 * and declarations in the PDL.
38 *
39 * Features:
40 * - Supports up to 8 PDM receivers
41 * - Supports Stereo/Mono dual mode PDM (pulse-density-modulated) to PCM (pulse-code-modulated) conversion
42 * - Half rate sampling to reduce system power consumption
43 * - CIC filter, FIR filter, DC block filter signal processing path
44 * - Programmable interface clock
45 * - Programmable FIR filter coefficients
46 * - Programmable CIC and FIR filter decimation
47 * - Programmable DC blocking coefficient
48 * - Programmable PCM word size (8, 10, 12, 14, 16, 18, 20, 24, 32 bits)
49 * - Programmable sampling delay, to cope with different master-slavemaster roundtrip delays
50 * - 64 entry RX FIFO with interrupt and trigger support
51 * - Debug/freeze trigger support
52 * - Receiver activate trigger support
53 * - Test mode support, the IP includes a programmable PDM pattern generator
54 *
55 * Pulse-density modulation, or PDM, represents
56 * an analog signal with a binary signal. In a PDM signal, specific amplitude values
57 * are not encoded into codewords of pulses of different weight as they would be
58 * in pulse-code modulation (PCM); rather, the relative density of the pulses corresponds
59 * to the analog signal's amplitude. The output of a 1-bit DAC is the same
60 * as the PDM encoding of the signal.
61 *
62 * Pulse-code modulation (PCM) is the method used to digitally represent sampled analog signals.
63 * It is the standard form of digital audio in computers, compact discs, digital telephony,
64 * and other digital audio applications. In a PCM stream, the amplitude of the analog signal
65 * is sampled regularly at uniform intervals, and each sample is quantized
66 * to the nearest value within a range of digital steps.
67 *
68 * \section group_pdm_pcm_configuration_considerations_v2 Configuration Considerations
69 *
70 * To set up a PDM-PCM, provide the configuration parameters in the
71 * \ref cy_stc_pdm_pcm_config_v2_t structure.
72 *
73 * For example, set dataStreamingEnable to true, configure rxFifoTriggerLevel,
74 * dmaTriggerEnable (depending on whether DMA is going to be used),
75 * provide clock settings (clkDiv, mclkDiv and ckoDiv), set sincDecRate
76 * to the appropriate decimation rate, wordLen, and wordBitExtension.
77 * No other parameters are necessary for this example.
78 *
79 * To initialize the PDM-PCM channels, call \ref Cy_PDM_PCM_Channel_Init function, providing the
80 * filled \ref cy_stc_pdm_pcm_channel_config_t structure
81 * To initialize the PDM-PCM block, call the \ref Cy_PDM_PCM_Init function, providing the
82 * filled \ref cy_stc_pdm_pcm_config_v2_t structure.
83 *
84 * If you use a DMA, the DMA channel should be previously configured. PDM-PCM interrupts
85 * (if applicable) can be enabled by calling \ref Cy_PDM_PCM_SetInterruptMask.
86 *
87 * For example, if the trigger interrupt is used during operation, the ISR
88 * should call the \ref Cy_PDM_PCM_ReadFifo as many times as required for your
89 * FIFO payload. Then call \ref Cy_PDM_PCM_Channel_ClearInterrupt with appropriate parameters.
90 *
91 * If a DMA is used and the DMA channel is properly configured, no CPU activity
92 * (or application code) is needed for PDM-PCM operation.
93 *
94 * \section group_pdm_pcm_changelog_v2 Changelog
95 * <table class="doxtable">
96 * <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
97 * <tr>
98 * <td>1.10</td>
99 * <td>Minor documentation updates.</td>
100 * <td>Documentation enhancement.</td>
101 * <td></td>
102 * </tr>
103 * <tr>
104 * <td>1.0</td>
105 * <td>Initial version</td>
106 * <td></td>
107 * </tr>
108 * </table>
109 *
110 * \defgroup group_pdm_pcm_macros_v2 Macros
111 * \defgroup group_pdm_pcm_functions_v2 Functions
112 * \defgroup group_pdm_pcm_data_structures_v2 Data Structures
113 * \defgroup group_pdm_pcm_enums_v2 Enumerated Types
114 *
115 */
116
117 #if !defined (CY_PDM_PCM_V2_H__)
118 #define CY_PDM_PCM_V2_H__
119
120 /******************************************************************************/
121 /* Include files */
122 /******************************************************************************/
123
124 #include "cy_device.h"
125
126 #if defined (CY_IP_MXPDM)
127
128 #include "cy_syslib.h"
129 #include <stdint.h>
130 #include <stddef.h>
131 #include <stdbool.h>
132
133 #ifdef __cplusplus
134 extern "C"
135 {
136 #endif
137
138 /******************************************************************************
139 * Global definitions
140 ******************************************************************************/
141
142 /* Macros */
143 /**
144 * \addtogroup group_pdm_pcm_macros_v2
145 * \{
146 */
147
148 /** The driver major version */
149 #define CY_PDM_PCM_V2_DRV_VERSION_MAJOR 1
150
151 /** The driver minor version */
152 #define CY_PDM_PCM_V2_DRV_VERSION_MINOR 1
153
154 /** The PDM-PCM driver identifier */
155 #define CY_PDM_PCM_V2_ID CY_PDL_DRV_ID(0x73u)
156
157 /**
158 * \defgroup group_pdm_pcm_macros_interrupt_masks_v2 Interrupt Masks
159 * \{
160 */
161
162 /** More entries in the RX FIFO than specified by Trigger Level*/
163 #define CY_PDM_PCM_INTR_RX_TRIGGER (PDM_CH_INTR_RX_FIFO_TRIGGER_Msk)
164 /** Attempt to write to a full RX FIFO*/
165 #define CY_PDM_PCM_INTR_RX_OVERFLOW (PDM_CH_INTR_RX_FIFO_OVERFLOW_Msk)
166 /** Attempt to read from an empty RX FIFO*/
167 #define CY_PDM_PCM_INTR_RX_UNDERFLOW (PDM_CH_INTR_RX_FIFO_UNDERFLOW_Msk)
168 /** CIC filter PCM samples are produced at a faster rate than the FIR filter can process them*/
169 #define CY_PDM_PCM_INTR_RX_FIR_OVERFLOW (PDM_CH_INTR_RX_FIR_OVERFLOW_Msk)
170 /** when PDM samples are generated too fast*/
171 #define CY_PDM_PCM_INTR_RX_IF_OVERFLOW (PDM_CH_INTR_RX_IF_OVERFLOW_Msk)
172
173 /** \} group_pdm_pcm_macros_interrupt_masks_v2 */
174
175 /** \} group_pdm_pcm_macros_v2 */
176
177 /**
178 * \addtogroup group_pdm_pcm_enums_v2
179 * \{
180 */
181
182 /** PDM Word Length*/
183 typedef enum
184 {
185 CY_PDM_PCM_WSIZE_8_BIT = 0U, /**< Word length: 8 bit*/
186 CY_PDM_PCM_WSIZE_10_BIT = 1U, /**< Word length: 10 bit*/
187 CY_PDM_PCM_WSIZE_12_BIT = 2U, /**< Word length: 12 bit*/
188 CY_PDM_PCM_WSIZE_14_BIT = 3U, /**< Word length: 14 bit*/
189 CY_PDM_PCM_WSIZE_16_BIT = 4U, /**< Word length: 16 bit*/
190 CY_PDM_PCM_WSIZE_18_BIT = 5U, /**< Word length: 18 bit*/
191 CY_PDM_PCM_WSIZE_20_BIT = 6U, /**< Word length: 20 bit*/
192 CY_PDM_PCM_WSIZE_24_BIT = 7U, /**< Word length: 24 bit*/
193 CY_PDM_PCM_WSIZE_32_BIT = 8U /**< Word length: 32 bit*/
194 } cy_en_pdm_pcm_word_size_t;
195
196 /** cy_en_pdm_pcm_clock_sel_t*/
197 typedef enum
198 {
199 CY_PDM_PCM_SEL_SRSS_CLOCK = 0U, /**< Interface clock is selected as clk_if_srss[0]*/
200 CY_PDM_PCM_SEL_PDM_DATA0 = 1U, /**< Interface clock is selected as pdm_data[0]*/
201 CY_PDM_PCM_SEL_PDM_DATA1 = 2U, /**< Interface clock is selected as pdm_data[1]*/
202 CY_PDM_PCM_SEL_OFF = 3U /**< Interface clock clk_if is off*/
203 } cy_en_pdm_pcm_clock_sel_t;
204
205 /** PDM Halve Rate Sampling*/
206 typedef enum
207 {
208 CY_PDM_PCM_RATE_FULL = 0U, /**< Channel full*/
209 CY_PDM_PCM_RATE_HALVE = 1U /**< Channel halve*/
210 } cy_en_pdm_pcm_halve_rate_sel_t;
211
212 /** CIC DECIMATION CODE*/
213 typedef enum
214 {
215 CY_PDM_PCM_CHAN_CIC_DECIM_2 = 0U, /**< CIC Filter PCM Frequency is 1/2 * PDM Frequency*/
216 CY_PDM_PCM_CHAN_CIC_DECIM_4 = 1U, /**< CIC Filter PCM Frequency is 1/4 * PDM Frequency*/
217 CY_PDM_PCM_CHAN_CIC_DECIM_8 = 2U, /**< CIC Filter PCM Frequency is 1/8 * PDM Frequency*/
218 CY_PDM_PCM_CHAN_CIC_DECIM_16 = 3U, /**< CIC Filter PCM Frequency is 1/16 * PDM Frequency*/
219 CY_PDM_PCM_CHAN_CIC_DECIM_32 = 4U /**< CIC Filter PCM Frequency is 1/32 * PDM Frequency*/
220 } cy_en_pdm_pcm_ch_cic_decimcode_t;
221
222 /** FIR0 DECIMATION CODE*/
223 typedef enum
224 {
225 CY_PDM_PCM_CHAN_FIR0_DECIM_1 = 0U, /**< FIR0 Filter PCM Frequency is 1/1 * PCM Frequency*/
226 CY_PDM_PCM_CHAN_FIR0_DECIM_2 = 1U, /**< FIR0 Filter PCM Frequency is 1/2 * PCM Frequency*/
227 CY_PDM_PCM_CHAN_FIR0_DECIM_3 = 2U, /**< FIR0 Filter PCM Frequency is 1/3 * PCM Frequency*/
228 CY_PDM_PCM_CHAN_FIR0_DECIM_4 = 3U, /**< FIR0 Filter PCM Frequency is 1/4 * PCM Frequency*/
229 CY_PDM_PCM_CHAN_FIR0_DECIM_5 = 4U /**< FIR0 Filter PCM Frequency is 1/5 * PCM Frequency*/
230 } cy_en_pdm_pcm_ch_fir0_decimcode_t;
231
232 /** FIR1 DECIMATION CODE*/
233 typedef enum
234 {
235 CY_PDM_PCM_CHAN_FIR1_DECIM_1 = 0U, /**< FIR1 Filter PCM Frequency is 1/1 * PCM Frequency*/
236 CY_PDM_PCM_CHAN_FIR1_DECIM_2 = 1U, /**< FIR1 Filter PCM Frequency is 1/2 * PCM Frequency*/
237 CY_PDM_PCM_CHAN_FIR1_DECIM_3 = 2U, /**< FIR1 Filter PCM Frequency is 1/3 * PCM Frequency*/
238 CY_PDM_PCM_CHAN_FIR1_DECIM_4 = 3U, /**< FIR1 Filter PCM Frequency is 1/4 * PCM Frequency*/
239 } cy_en_pdm_pcm_ch_fir1_decimcode_t;
240
241 /** DC Block CODE*/
242 typedef enum
243 {
244 CY_PDM_PCM_CHAN_DCBLOCK_CODE_1 = 0U, /**< DCBLOCK Filter alpha = 1 - (1/2^(12-0))*/
245 CY_PDM_PCM_CHAN_DCBLOCK_CODE_2 = 1U, /**< DCBLOCK Filter alpha = 1 - (1/2^(12-1))*/
246 CY_PDM_PCM_CHAN_DCBLOCK_CODE_4 = 2U, /**< DCBLOCK Filter alpha = 1 - (1/2^(12-2))*/
247 CY_PDM_PCM_CHAN_DCBLOCK_CODE_8 = 3U, /**< DCBLOCK Filter alpha = 1 - (1/2^(12-3))*/
248 CY_PDM_PCM_CHAN_DCBLOCK_CODE_16 = 4U, /**< DCBLOCK Filter alpha = 1 - (1/2^(12-4))*/
249 CY_PDM_PCM_CHAN_DCBLOCK_CODE_32 = 5U, /**< DCBLOCK Filter alpha = 1 - (1/2^(12-5))*/
250 CY_PDM_PCM_CHAN_DCBLOCK_CODE_64 = 6U, /**< DCBLOCK Filter alpha = 1 - (1/2^(12-6))*/
251 CY_PDM_PCM_CHAN_DCBLOCK_CODE_128 = 7U, /**< DCBLOCK Filter alpha = 1 - (1/2^(12-7))*/
252 } cy_en_pdm_pcm_ch_dcblock_coef_t;
253
254 /** \cond INTERNAL */
255 /** PDM Output Mode*/
256 typedef enum
257 {
258 CY_PDM_PCM_OUT_CHAN_LEFT = 1U, /**< Channel mono left*/
259 CY_PDM_PCM_OUT_CHAN_RIGHT = 2U, /**< Channel mono right*/
260 CY_PDM_PCM_OUT_STEREO = 3U /**< Channel stereo*/
261 } cy_en_pdm_pcm_out_t;
262 /** \endcond */
263
264 /** The PDM-PCM status codes*/
265 typedef enum
266 {
267 CY_PDM_PCM_SUCCESS = 0x00UL, /**< Success status code*/
268 CY_PDM_PCM_BAD_PARAM = CY_PDM_PCM_V2_ID | CY_PDL_STATUS_ERROR |0x01UL /**< Bad parameter status code*/
269 } cy_en_pdm_pcm_status_t;
270
271 /** \} group_pdm_pcm_enums_v2 */
272
273
274 /**
275 * \addtogroup group_pdm_pcm_data_structures_v2
276 * \{
277 */
278
279 /******************************************************************************
280 * Global type definitions
281 ******************************************************************************/
282
283 /** PDM-PCM Test Mode configuration */
284 typedef struct
285 {
286 uint8_t drive_delay_hi; /**< Interface drive delay on the high phase of the PDM interface clock.
287 This field specifies when a PDM value is driven expressed in clk_if clock cycles.
288 DRIVE_DELAY should be set in the range [0, IF_CTL.CLOCK_DIV]:
289 "0": Drive PDM value 1 clk_if cycle after the rising edge of clk_pdm.
290 "1": Drive PDM value 2 clk_if cycles after the rising edge of clk_pdm.
291 ...
292 "255": Drive PDM value 256 clk_if cycles after the rising edge of clk_pdm*/
293 uint8_t drive_delay_lo; /**< Interface drive delay on the low phase of the PDM interface clock.
294 This field specifies when a PDM value is driven expressed in clk_if clock cycles.
295 DRIVE_DELAY should be set in the range [0, IF_CTL.CLOCK_DIV]:
296 "0": Drive PDM value 1 clk_if cycle after the rising edge of clk_pdm.
297 "1": Drive PDM value 2 clk_if cycles after the rising edge of clk_pdm.
298 ...
299 "255": Drive PDM value 256 clk_if cycles after the rising edge of clk_pdm*/
300 uint8_t mode_hi; /**< Pattern generator mode on the high phase of the PDM interface clock.
301 This field specifies the type of pattern driven by the generator:
302 "0": constant 0's
303 "1": constant 1's
304 "2": alternating 0's and 1's (clock pattern)
305 "3": sine wave */
306 uint8_t mode_lo; /**< Pattern generator mode on the low phase of the PDM interface clock.
307 This field specifies the type of pattern driven by the generator:
308 "0": constant 0's
309 "1": constant 1's
310 "2": alternating 0's and 1's (clock pattern)
311 "3": sine wave */
312 uint8_t audio_freq_div; /**< Frequency division factor (legal range [3, 13]) to obtain audio frequency
313 from the PDM clock frequency. This field determines the frequency of the sine wave
314 generated by the pattern generator when MODE=3. The formula is below:
315 Sine wave Frequency = PDM clock frequency / 2p*2^(AUDIO_FREQ_DIV) */
316 bool enable; /**< enable*/
317
318
319 }cy_stc_test_config_t;
320
321 /** PDM-PCM fir coeff_data structure */
322 typedef struct
323 {
324
325 int16_t coeff_data0; /**< filter taps coefficients data 0*/
326 int16_t coeff_data1; /**< filter taps coefficients data 1*/
327 }cy_stc_pdm_pcm_fir_coeff_t;
328
329 /** PDM-PCM Channel initialization configuration */
330 typedef struct
331 {
332 uint8_t sampledelay; /**< Interface sample delay. This field specifies when a PDM value is captured. The value that user assigns here will be incremented by 1 and assigned internally */
333
334 cy_en_pdm_pcm_word_size_t wordSize; /**< see #cy_en_pdm_pcm_word_size_t */
335 bool signExtension; /**< Word extension type:
336 - 0: extension by zero
337 - 1: extension by sign bits */
338
339 uint8_t rxFifoTriggerLevel; /**< Fifo interrupt trigger level (in words),
340 range: 0 - 63 */
341
342 bool fir0_enable; /**< FIR 0 filter coefficient enable (does NOT effect FIR filter scaling and FIR filter decimation):
343 - 0: Disabled
344 - 1: Enabled */
345
346
347 cy_en_pdm_pcm_ch_cic_decimcode_t cic_decim_code; /**< CIC filter decimation. The CIC filter PCM frequency is a fraction of the PDM frequency. \ref cy_en_pdm_pcm_ch_cic_decimcode_t */
348
349 cy_en_pdm_pcm_ch_fir0_decimcode_t fir0_decim_code;/**< FIR filter decimation. The FIR filter PCM frequency is a fraction of the CIC filter PCM frequency. \ref cy_en_pdm_pcm_ch_fir0_decimcode_t */
350
351 uint8_t fir0_scale; /**< FIR 0 filter PCM scaling. range 0-31 */
352
353 cy_en_pdm_pcm_ch_fir1_decimcode_t fir1_decim_code;/**< FIR filter decimation. The FIR filter PCM frequency is a fraction of the FIR0 filter PCM frequency. \ref cy_en_pdm_pcm_ch_fir1_decimcode_t */
354
355 uint8_t fir1_scale; /**< FIR 1 filter PCM scaling. range 0 to 31 */
356
357 bool dc_block_disable; /**< Disables DC BLOCK if set to true. This is for debug only. To be used for test modes 0,1 and 2 in test config ie. if the input is constant 0's or constant 1's or alternating 0's and 1's*/
358
359 cy_en_pdm_pcm_ch_dcblock_coef_t dc_block_code; /**< DC blocker coefficient. \ref cy_en_pdm_pcm_ch_dcblock_coef_t*/
360 } cy_stc_pdm_pcm_channel_config_t;
361
362
363 /** PDM-PCM initialization configuration */
364 typedef struct
365 {
366 uint8_t clkDiv; /**< PDM Clock Divider
367 This configures a frequency of PDM CLK. The configured frequency
368 is used to operate PDM core. The value that user assigns here will be incremented by 1 and assigned internally. For example, if the clkDiv value is 0, it is internally incremented by 1.*/
369 cy_en_pdm_pcm_clock_sel_t clksel; /**< Interface clock clk_if selection. \ref cy_en_pdm_pcm_clock_sel_t */
370 cy_en_pdm_pcm_halve_rate_sel_t halverate; /**< Halve rate sampling. \ref cy_en_pdm_pcm_halve_rate_sel_t*/
371 uint8_t route; /**< Specifies what IOSS data input signal "pdm_data[]" is routed to a specific PDM receiver.
372 Each PDM receiver j has a dedicated 1-bit control field: PDM receiver j uses DATA_SEL[j].
373 The 1-bit field DATA_SEL[j] specification is as follows:
374 '0': PDM receiver j uses data input signal "pdm_data[j]".
375 '1': PDM receiver j uses data input signal "pdm_data[j ^ 1]" (the lower bit of the index is inverted)*/
376
377
378 uint8_t fir0_coeff_user_value; /**< FIR 0 filter coefficient enable. User has to configure the coeff values. 0: Disabled. 1: Enabled*/
379
380 uint8_t fir1_coeff_user_value; /**< FIR 1 filter coefficient enable. User has to configure the coeff values. 0: Disabled. 1: Enabled*/
381
382 cy_stc_pdm_pcm_fir_coeff_t fir0_coeff[8]; /**< The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients
383 (in the range [-8192, 8191]) are specified by FIR0_COEFF0, ..., FIR0_COEFF7.
384 The FIR filter coefficients have no default values:
385 the coefficients MUST be programmed BEFORE the filter is enabled.
386 By Default FIR0 is disabled and is only used for 8Khz and 16 Khz sample frequencies*/
387
388 cy_stc_pdm_pcm_fir_coeff_t fir1_coeff[14]; /**< The (symmetric) 55-taps finite impulse response (FIR) filter
389 with 14-bit signed coefficients (in the range [-8192, 8191])
390 are specified by FIR1_COEFF0, ..., FIR1_COEFF13.
391 The (default) FIR filter has built in droop correction.
392 The filter gain (sum of the coefficients) is 13921 and the default
393 coefficients (as specified by FIR1_COEFFx.DATA0/1[13:0]) are:
394 (-2, 21), (26, -17), (-41, 25), (68, -33),
395 (-107, 41), (160, -48), (-230, 54), (325, -56),
396 (-453, 51), (631, -31), (-894, -21), (1326, 172),
397 (-2191, -770), (4859, 8191)*/
398 } cy_stc_pdm_pcm_config_v2_t;
399
400 /** \cond INTERNAL */
401 typedef cy_stc_pdm_pcm_config_v2_t cy_stc_pdm_pcm_config_t;
402 /** \endcond */
403
404 /** \} group_pdm_pcm_data_structures_v2 */
405
406
407 /** \cond INTERNAL */
408 /******************************************************************************
409 * Local definitions
410 *******************************************************************************/
411 /** Define bit mask for all available interrupt sources */
412 #define CY_PDM_PCM_INTR_MASK (CY_PDM_PCM_INTR_RX_TRIGGER | \
413 CY_PDM_PCM_INTR_RX_FIR_OVERFLOW | \
414 CY_PDM_PCM_INTR_RX_OVERFLOW | \
415 CY_PDM_PCM_INTR_RX_IF_OVERFLOW | \
416 CY_PDM_PCM_INTR_RX_UNDERFLOW)
417
418 /* Non-zero default values */
419 #define CY_PDM_PCM_CH_IF_CTL_DEFAULT (0x3U)
420
421 #define CY_PDM_PCM_CLK_DIV_MAX 255
422
423 #define CY_PDM_PCM_CH_CIC_DECIM_CODE_DEFAULT (0x4U)
424 #define CY_PDM_PCM_CH_FIR0_DECIM_CODE_DEFAULT (0x0U)
425 #define CY_PDM_PCM_CH_FIR0_SCALE_DEFAULT (0x0U)
426 #define CY_PDM_PCM_CH_FIR1_DECIM_CODE_DEFAULT (0x1U)
427 #define CY_PDM_PCM_CH_FIR1_SCALE_DEFAULT (0x0FU)
428 #define CY_PDM_PCM_CH_FIR1_ENABLE_DEFAULT (0x1U)
429 #define CY_PDM_PCM_CH_DCBLOCK_CODE_DEFAULT (0x1U)
430 #define CY_PDM_PCM_CH_DCBLOCK_ENABLE_DEFAULT (0x1U)
431
432 #define PDM_TEST_CTL_DRIVE_DELAY_HI_DEFAULT (0x00U)
433 #define PDM_TEST_CTL_DRIVE_DELAY_LO_DEFAULT (0x04U)
434 #define PDM_TEST_CTL_MODE_HI_DEFAULT (0x3U)
435 #define PDM_TEST_CTL_MODE_LO_DEFAULT (0x3U)
436 #define PDM_TEST_CTL_AUDIO_FREQ_DIV_DEFAULT (0x7U)
437 #define PDM_TEST_CTL_CH_ENABLED_DEFAULT (0x0U)
438
439 #define PDM_CLOCK_CTL_CLOCK_DIV_DEFAULT (0x07U)
440 #define PDM_CLOCK_CTL_CLOCK_SEL_DEFAULT (0x3U)
441 #define PDM_CLOCK_CTL_HALVE_DEFAULT (0x0U)
442
443
444 #define CY_PDM_PCM_ENABLE (0x1U)
445 #define CY_PDM_PCM_DISABLE (0x0U)
446
447
448
449 #define CY_PDM_PCM_CH_CTL_WORDSIZE_DEFAULT (0x0U)
450 #define CY_PDM_PCM_CH_CTL_WORDSIGN_EXT_DEFAULT (0x100U)
451 #define CY_PDM_PCM_CH_CTL_CH_ENABLE_DEFAULT (0x00000000U)
452
453 #define CY_PDM_PCM_TEST_CTL_DEFAULT (_VAL2FLD(PDM_TEST_CTL_DRIVE_DELAY_HI, PDM_TEST_CTL_DRIVE_DELAY_HI_DEFAULT) | \
454 _VAL2FLD(PDM_TEST_CTL_DRIVE_DELAY_LO, PDM_TEST_CTL_DRIVE_DELAY_LO_DEFAULT) | \
455 _VAL2FLD(PDM_TEST_CTL_MODE_HI, PDM_TEST_CTL_MODE_HI_DEFAULT) | \
456 _VAL2FLD(PDM_TEST_CTL_MODE_LO, PDM_TEST_CTL_MODE_LO_DEFAULT) | \
457 _VAL2FLD(PDM_TEST_CTL_AUDIO_FREQ_DIV, PDM_TEST_CTL_AUDIO_FREQ_DIV_DEFAULT) | \
458 _VAL2FLD(PDM_TEST_CTL_CH_ENABLED, PDM_TEST_CTL_CH_ENABLED_DEFAULT))
459
460 #define CY_PDM_PCM_CLK_CTL_DEFAULT (_VAL2FLD(PDM_CLOCK_CTL_CLOCK_DIV, PDM_CLOCK_CTL_CLOCK_DIV_DEFAULT) | \
461 _VAL2FLD(PDM_CLOCK_CTL_CLOCK_SEL, PDM_CLOCK_CTL_CLOCK_SEL_DEFAULT) | \
462 _VAL2FLD(PDM_CLOCK_CTL_HALVE, PDM_CLOCK_CTL_HALVE_DEFAULT))
463
464 #define CY_PDM_PCM_CH_CTL_DEFAULT (_VAL2FLD(PDM_CH_CTL_WORD_SIZE, CY_PDM_PCM_CH_CTL_WORDSIZE_DEFAULT) | \
465 _VAL2FLD(PDM_CH_CTL_WORD_SIGN_EXTEND, CY_PDM_PCM_CH_CTL_WORDSIGN_EXT_DEFAULT) | \
466 _VAL2FLD(PDM_CH_CTL_ENABLED, CY_PDM_PCM_CH_CTL_CH_ENABLE_DEFAULT))
467
468 #define CY_PDM_PCM_CH_FIR1_DEFAULT (_VAL2FLD(PDM_CH_FIR1_CTL_DECIM2, CY_PDM_PCM_CH_FIR1_DECIM_CODE_DEFAULT) | \
469 _VAL2FLD(PDM_CH_FIR1_CTL_SCALE, CY_PDM_PCM_CH_FIR1_SCALE_DEFAULT) | \
470 _VAL2FLD(PDM_CH_FIR1_CTL_ENABLED, CY_PDM_PCM_CH_FIR1_ENABLE_DEFAULT))
471
472 #define CY_PDM_PCM_CH_DCBLOCK_DEFAULT (_VAL2FLD(PDM_CH_DC_BLOCK_CTL_CODE, CY_PDM_PCM_CH_DCBLOCK_CODE_DEFAULT) | \
473 _VAL2FLD(PDM_CH_DC_BLOCK_CTL_ENABLED, CY_PDM_PCM_CH_DCBLOCK_ENABLE_DEFAULT))
474
475
476
477 /* Macros for conditions used by CY_ASSERT calls */
478
479 #define CY_PDM_PCM_IS_CLK_DIV_VALID(clkDiv) (((clkDiv) >= 1U) && ((clkDiv) <= CY_PDM_PCM_CLK_DIV_MAX))
480
481 #define CY_PDM_PCM_IS_CLK_SEL_VALID(clksel) (((clksel) == CY_PDM_PCM_SEL_SRSS_CLOCK) || \
482 ((clksel) == CY_PDM_PCM_SEL_PDM_DATA0) || \
483 ((clksel) == CY_PDM_PCM_SEL_PDM_DATA1) || \
484 ((clksel) == CY_PDM_PCM_SEL_OFF))
485
486 #define CY_PDM_PCM_IS_HALVE_RATE_SET_VALID(halverate) (((halverate) == CY_PDM_PCM_RATE_FULL) || \
487 ((halverate) == CY_PDM_PCM_RATE_HALVE))
488
489 #define CY_PDM_PCM_IS_ROUTE_VALID(route) ((route) <= 126)
490
491 #define CY_PDM_PCM_IS_CH_SET_VALID(chanselect) (((chanselect) >= 1U) && ((chanselect) <= 255))
492
493 #define CY_PDM_PCM_IS_SAMPLE_DELAY_VALID(sampledelay) ((sampledelay) <= 255)
494
495 #define CY_PDM_PCM_IS_WORD_SIZE_VALID(wordSize) (((wordSize) == CY_PDM_PCM_WSIZE_8_BIT) || \
496 ((wordSize) == CY_PDM_PCM_WSIZE_10_BIT) || \
497 ((wordSize) == CY_PDM_PCM_WSIZE_12_BIT) || \
498 ((wordSize) == CY_PDM_PCM_WSIZE_14_BIT) || \
499 ((wordSize) == CY_PDM_PCM_WSIZE_16_BIT) || \
500 ((wordSize) == CY_PDM_PCM_WSIZE_18_BIT) || \
501 ((wordSize) == CY_PDM_PCM_WSIZE_20_BIT) || \
502 ((wordSize) == CY_PDM_PCM_WSIZE_24_BIT) || \
503 ((wordSize) == CY_PDM_PCM_WSIZE_32_BIT))
504
505 #define CY_PDM_PCM_IS_SCALE_VALID(scale) ((scale) <= 31)
506
507 #define CY_PDM_PCM_IS_ENABLE_VALID(enable) ((enable == 0)||(enable == 1))
508
509 #define CY_PDM_PCM_IS_SIGNEXTENSION_VALID(signExtension) ((signExtension == 0)||(signExtension == 1))
510
511 #define CY_PDM_PCM_IS_INTR_MASK_VALID(interrupt) (0UL == ((interrupt) & ((uint32_t) ~CY_PDM_PCM_INTR_MASK)))
512 #define CY_PDM_PCM_IS_TRIG_LEVEL(trigLevel) ((trigLevel) <= 63)
513
514 /** \endcond */
515
516 /**
517 * \addtogroup group_pdm_pcm_functions_v2
518 * \{
519 */
520
521 cy_en_pdm_pcm_status_t Cy_PDM_PCM_Channel_Init(PDM_Type * base, cy_stc_pdm_pcm_channel_config_t const * channel_config, uint8_t channel_num);
522 void Cy_PDM_PCM_Channel_DeInit(PDM_Type * base, uint8_t channel_num);
523
524 cy_en_pdm_pcm_status_t Cy_PDM_PCM_Init(PDM_Type * base, cy_stc_pdm_pcm_config_v2_t const * config);
525 void Cy_PDM_PCM_DeInit(PDM_Type * base);
526
527 cy_en_pdm_pcm_status_t Cy_PDM_PCM_test_Init(PDM_Type * base, cy_stc_pdm_pcm_config_v2_t const * config, cy_stc_test_config_t const * test_config);
528
529 __STATIC_INLINE void Cy_PDM_PCM_Activate_Channel(PDM_Type * base, uint8_t channel_num);
530 __STATIC_INLINE void Cy_PDM_PCM_DeActivate_Channel(PDM_Type * base, uint8_t channel_num);
531 __STATIC_INLINE void Cy_PDM_PCM_SetRateSampling(PDM_Type * base, cy_en_pdm_pcm_halve_rate_sel_t rate);
532
533 __STATIC_INLINE void Cy_PDM_PCM_Channel_Enable(PDM_Type * base, uint8_t channel_num);
534 __STATIC_INLINE void Cy_PDM_PCM_Channel_Disable(PDM_Type * base, uint8_t channel_num);
535 __STATIC_INLINE void Cy_PDM_PCM_Channel_Set_Cic_DecimCode(PDM_Type * base, uint8_t channel_num, cy_en_pdm_pcm_ch_cic_decimcode_t decimcode);
536 __STATIC_INLINE void Cy_PDM_PCM_Channel_Set_Fir0(PDM_Type * base, uint8_t channel_num, cy_en_pdm_pcm_ch_fir0_decimcode_t decimcode,uint8_t scale);
537 __STATIC_INLINE void Cy_PDM_PCM_Channel_Set_Fir1(PDM_Type * base, uint8_t channel_num, cy_en_pdm_pcm_ch_fir1_decimcode_t decimcode,uint8_t scale);
538 __STATIC_INLINE void Cy_PDM_PCM_Channel_Set_DCblock(PDM_Type * base, uint8_t channel_num, cy_en_pdm_pcm_ch_dcblock_coef_t coef);
539 __STATIC_INLINE void Cy_PDM_PCM_Channel_SetInterruptMask(PDM_Type * base, uint8_t channel_num, uint32_t interrupt);
540 __STATIC_INLINE uint32_t Cy_PDM_PCM_Channel_GetInterruptMask(PDM_Type const * base, uint8_t channel_num);
541 __STATIC_INLINE uint32_t Cy_PDM_PCM_Channel_GetInterruptStatusMasked(PDM_Type const * base, uint8_t channel_num);
542 __STATIC_INLINE uint32_t Cy_PDM_PCM_Channel_GetInterruptStatus(PDM_Type const * base, uint8_t channel_num);
543 __STATIC_INLINE void Cy_PDM_PCM_Channel_ClearInterrupt(PDM_Type * base, uint8_t channel_num, uint32_t interrupt);
544 __STATIC_INLINE void Cy_PDM_PCM_Channel_SetInterrupt(PDM_Type * base, uint8_t channel_num, uint32_t interrupt);
545 __STATIC_INLINE uint8_t Cy_PDM_PCM_Channel_GetNumInFifo(PDM_Type const * base, uint8_t channel_num);
546 __STATIC_INLINE uint32_t Cy_PDM_PCM_Channel_ReadFifo(PDM_Type const * base, uint8_t channel_num);
547 __STATIC_INLINE void Cy_PDM_PCM_Channel_FreezeFifo(PDM_Type * base, uint8_t channel_num);
548 __STATIC_INLINE void Cy_PDM_PCM_Channel_UnfreezeFifo(PDM_Type * base, uint8_t channel_num);
549 __STATIC_INLINE uint32_t Cy_PDM_PCM_Channel_ReadFifoSilent(PDM_Type const * base, uint8_t channel_num);
550
551
552 /** \} group_pdm_pcm_functions_v2 */
553
554 /**
555 * \addtogroup group_pdm_pcm_functions_v2
556 * \{
557 */
558
559 /******************************************************************************
560 * Function Name: Cy_PDM_PCM_Channel_Enable
561 ***************************************************************************//**
562 *
563 * Enables the PDM-PCM data conversion.
564 *
565 * \param base The pointer to the PDM-PCM instance address.
566 * \param channel_num Channel number to be enabled
567 *
568 * \funcusage
569 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_Enable
570 *
571 ******************************************************************************/
Cy_PDM_PCM_Channel_Enable(PDM_Type * base,uint8_t channel_num)572 __STATIC_INLINE void Cy_PDM_PCM_Channel_Enable(PDM_Type * base, uint8_t channel_num)
573 {
574 PDM_PCM_CH_CTL(base,channel_num) |= PDM_CH_CTL_ENABLED_Msk;
575
576 }
577
578 /******************************************************************************
579 * Function Name: Cy_PDM_PCM_Channel_Disable
580 ***************************************************************************//**
581 *
582 * Disables the PDM-PCM data conversion.
583 *
584 * \param base The pointer to the PDM-PCM instance address.
585 * \param channel_num Channel number to be disabled
586 *
587 * \funcusage
588 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_Disable
589 *
590 ******************************************************************************/
Cy_PDM_PCM_Channel_Disable(PDM_Type * base,uint8_t channel_num)591 __STATIC_INLINE void Cy_PDM_PCM_Channel_Disable(PDM_Type * base, uint8_t channel_num)
592 {
593 PDM_PCM_CH_CTL(base,channel_num) &= (uint32_t) ~PDM_CH_CTL_ENABLED_Msk;
594
595 }
596
597 /******************************************************************************
598 * Function Name: Cy_PDM_PCM_Activate_Channel
599 ***************************************************************************//**
600 *
601 * Activates the PDM-PCM channel.
602 *
603 * \param base The pointer to the PDM-PCM instance address.
604 * \param channel_num Channel number to be activated
605 *
606 * \funcusage
607 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Activate_Channel
608 *
609 ******************************************************************************/
Cy_PDM_PCM_Activate_Channel(PDM_Type * base,uint8_t channel_num)610 __STATIC_INLINE void Cy_PDM_PCM_Activate_Channel(PDM_Type * base, uint8_t channel_num)
611 {
612 PDM_PCM_CTL_SET(base) = (1UL << channel_num);
613 }
614
615 /******************************************************************************
616 * Function Name: Cy_PDM_PCM_DeActivate_Channel
617 ***************************************************************************//**
618 *
619 * DeActivates the PDM-PCM channel.
620 *
621 * \param base The pointer to the PDM-PCM instance address.
622 * \param channel_num Channel number to be deactivated
623 *
624 * \funcusage
625 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_DeActivate_Channel
626 *
627 ******************************************************************************/
Cy_PDM_PCM_DeActivate_Channel(PDM_Type * base,uint8_t channel_num)628 __STATIC_INLINE void Cy_PDM_PCM_DeActivate_Channel(PDM_Type * base, uint8_t channel_num)
629 {
630 PDM_PCM_CTL_CLR(base) = (1UL << channel_num);
631 }
632
633
634 /******************************************************************************
635 * Function Name: Cy_PDM_PCM_Channel_GetCurrentState
636 ***************************************************************************//**
637 *
638 * Returns the current PDM-PCM state (active/stopped).
639 *
640 * \param base The pointer to the PDM-PCM instance address.
641 * \param channel_num Channel number
642 * \return true if channel is active, false when stopped.
643 *
644 * \funcusage
645 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_GetCurrentState
646 *
647 ******************************************************************************/
Cy_PDM_PCM_Channel_GetCurrentState(PDM_Type const * base,uint8_t channel_num)648 __STATIC_INLINE bool Cy_PDM_PCM_Channel_GetCurrentState(PDM_Type const * base, uint8_t channel_num)
649 {
650 return ((bool) (PDM_PCM_CTL(base) & (1UL << channel_num)));
651 }
652
653
654 /******************************************************************************
655 * Function Name: Cy_PDM_PCM_Channel_SetRateSampling
656 ***************************************************************************//**
657 *
658 * Sets Halve rate Sampling rate.
659 *
660 * \param base The pointer to the PDM-PCM instance address.
661 * \param rate Halve rate sampling or Full rate sampling \ref cy_en_pdm_pcm_halve_rate_sel_t.
662 *
663 * \funcusage
664 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_SetRateSampling
665 *
666 ******************************************************************************/
Cy_PDM_PCM_SetRateSampling(PDM_Type * base,cy_en_pdm_pcm_halve_rate_sel_t rate)667 __STATIC_INLINE void Cy_PDM_PCM_SetRateSampling(PDM_Type * base, cy_en_pdm_pcm_halve_rate_sel_t rate)
668 {
669 CY_ASSERT_L2(CY_PDM_PCM_IS_HALVE_RATE_SET_VALID(rate));
670 PDM_PCM_CLOCK_CTL(base) &= ~PDM_CLOCK_CTL_HALVE_Msk;
671 PDM_PCM_CLOCK_CTL(base) |= _VAL2FLD(PDM_CLOCK_CTL_HALVE, rate);
672 }
673
674 /******************************************************************************
675 * Function Name: Cy_PDM_PCM_Channel_SetCicDecimCode
676 ***************************************************************************//**
677 *
678 * Sets PDM-PCM CIC Filter Decimation code.
679 *
680 * \param base The pointer to the PDM-PCM instance address
681 * \param channel_num Channel number for which the CIC filter Decimation code to be set
682 * \param decimcode decimation code value to be set. \ref cy_en_pdm_pcm_ch_cic_decimcode_t.
683 *
684 * \funcusage
685 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_Set_Cic_DecimCode
686 *
687 ******************************************************************************/
Cy_PDM_PCM_Channel_Set_Cic_DecimCode(PDM_Type * base,uint8_t channel_num,cy_en_pdm_pcm_ch_cic_decimcode_t decimcode)688 __STATIC_INLINE void Cy_PDM_PCM_Channel_Set_Cic_DecimCode(PDM_Type * base, uint8_t channel_num, cy_en_pdm_pcm_ch_cic_decimcode_t decimcode)
689 {
690 PDM_PCM_CH_CIC_CTL(base, channel_num) = (uint32_t)decimcode;
691 }
692
693
694 /******************************************************************************
695 * Function Name: Cy_PDM_PCM_Channel_Set_Fir0
696 ***************************************************************************//**
697 *
698 * Sets PDM-PCM FIR0 Filter Decim code and Scale.
699 * The FIR filter coefficients have no default values:
700 * the coefficients MUST be programmed BEFORE the filter is enabled.
701 * By Default FIR0 is disabled and is only used for 8Khz and 16 Khz sample frequencies.
702 * For other frequencies it is a pass through.
703 *
704 * \param base The pointer to the PDM-PCM instance address
705 * \param channel_num Channel number for which the FIR0 Decimation code and the filter to be set.
706 * \param decimcode Decimation code value to be set. \ref cy_en_pdm_pcm_ch_fir0_decimcode_t.
707 * \param scale Scale value to be set.
708 *
709 * \funcusage
710 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_Set_Fir0
711 *
712 ******************************************************************************/
Cy_PDM_PCM_Channel_Set_Fir0(PDM_Type * base,uint8_t channel_num,cy_en_pdm_pcm_ch_fir0_decimcode_t decimcode,uint8_t scale)713 __STATIC_INLINE void Cy_PDM_PCM_Channel_Set_Fir0(PDM_Type * base, uint8_t channel_num, cy_en_pdm_pcm_ch_fir0_decimcode_t decimcode,uint8_t scale)
714 {
715 CY_ASSERT_L2(CY_PDM_PCM_IS_SCALE_VALID(scale));
716 PDM_PCM_CH_FIR0_CTL(base, channel_num) &= ~(PDM_CH_FIR0_CTL_DECIM3_Msk | PDM_CH_FIR0_CTL_SCALE_Msk);
717 PDM_PCM_CH_FIR0_CTL(base, channel_num) |= _VAL2FLD(PDM_CH_FIR0_CTL_DECIM3, decimcode) |
718 _VAL2FLD(PDM_CH_FIR0_CTL_SCALE, scale);
719 }
720
721 /******************************************************************************
722 * Function Name: Cy_PDM_PCM_Channel_Set_Fir1
723 ***************************************************************************//**
724 *
725 * Sets PDM-PCM FIR1 Filter Decimation code and Scale.
726 *
727 * \param base The pointer to the PDM-PCM instance address
728 * \param channel_num Channel number for which the FIR1 Decimation code and the filter to be set.
729 * \param decimcode Decimation code value to be set. \ref cy_en_pdm_pcm_ch_fir1_decimcode_t.
730 * \param scale Scale value to be set.
731 *
732 * \funcusage
733 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_Set_Fir1
734 *
735 ******************************************************************************/
Cy_PDM_PCM_Channel_Set_Fir1(PDM_Type * base,uint8_t channel_num,cy_en_pdm_pcm_ch_fir1_decimcode_t decimcode,uint8_t scale)736 __STATIC_INLINE void Cy_PDM_PCM_Channel_Set_Fir1(PDM_Type * base, uint8_t channel_num, cy_en_pdm_pcm_ch_fir1_decimcode_t decimcode,uint8_t scale)
737 {
738 CY_ASSERT_L2(CY_PDM_PCM_IS_SCALE_VALID(scale));
739 PDM_PCM_CH_FIR1_CTL(base, channel_num) &= ~(PDM_CH_FIR1_CTL_DECIM2_Msk | PDM_CH_FIR1_CTL_SCALE_Msk);
740 PDM_PCM_CH_FIR1_CTL(base, channel_num) |= _VAL2FLD(PDM_CH_FIR1_CTL_DECIM2, decimcode) |
741 _VAL2FLD(PDM_CH_FIR1_CTL_SCALE, scale);
742 }
743
744
745
746 /******************************************************************************
747 * Function Name: Cy_PDM_PCM_Channel_Set_DCblock
748 ***************************************************************************//**
749 *
750 * Sets the DC blocker filter with programmable coefficient.
751 * The filter is used to remove a DC component.
752 *
753 * \param base The pointer to the PDM-PCM instance address
754 * \param channel_num Channel number for which DC block coef to be set.
755 * \param coef coef value to be set. \ref cy_en_pdm_pcm_ch_dcblock_coef_t.
756 *
757 * \funcusage
758 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_Set_DCblock
759 *
760 ******************************************************************************/
Cy_PDM_PCM_Channel_Set_DCblock(PDM_Type * base,uint8_t channel_num,cy_en_pdm_pcm_ch_dcblock_coef_t coef)761 __STATIC_INLINE void Cy_PDM_PCM_Channel_Set_DCblock(PDM_Type * base, uint8_t channel_num, cy_en_pdm_pcm_ch_dcblock_coef_t coef)
762 {
763 PDM_PCM_CH_DC_BLOCK_CTL(base, channel_num) &= ~(PDM_CH_DC_BLOCK_CTL_CODE_Msk);
764 PDM_PCM_CH_DC_BLOCK_CTL(base, channel_num) |= _VAL2FLD(PDM_CH_DC_BLOCK_CTL_CODE, coef);
765 }
766
767 /******************************************************************************
768 * Function Name: Cy_PDM_PCM_Channel_SetInterruptMask
769 ***************************************************************************//**
770 *
771 * Sets one or more PDM-PCM interrupt factor bits (sets the INTR_MASK register).
772 *
773 * \param base The pointer to the PDM-PCM instance address
774 * \param channel_num Channel number
775 * \param interrupt Interrupt bit mask
776 * \ref group_pdm_pcm_macros_interrupt_masks_v2.
777 *
778 * \funcusage
779 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_SetInterruptMask
780 *
781 ******************************************************************************/
Cy_PDM_PCM_Channel_SetInterruptMask(PDM_Type * base,uint8_t channel_num,uint32_t interrupt)782 __STATIC_INLINE void Cy_PDM_PCM_Channel_SetInterruptMask(PDM_Type * base, uint8_t channel_num, uint32_t interrupt)
783 {
784 CY_ASSERT_L2(CY_PDM_PCM_IS_INTR_MASK_VALID(interrupt));
785 PDM_PCM_INTR_RX_MASK(base, channel_num) = interrupt;
786 }
787
788
789 /******************************************************************************
790 * Function Name: Cy_PDM_PCM_Channel_GetInterruptMask
791 ***************************************************************************//**
792 *
793 * Returns the PDM-PCM interrupt mask (a content of the INTR_MASK register).
794 *
795 * \param base The pointer to the PDM-PCM instance address.
796 * \param channel_num Channel number
797 * \return The interrupt bit mask \ref group_pdm_pcm_macros_interrupt_masks_v2.
798 *
799 ******************************************************************************/
Cy_PDM_PCM_Channel_GetInterruptMask(PDM_Type const * base,uint8_t channel_num)800 __STATIC_INLINE uint32_t Cy_PDM_PCM_Channel_GetInterruptMask(PDM_Type const * base, uint8_t channel_num)
801 {
802 return (PDM_PCM_INTR_RX_MASK(base, channel_num));
803 }
804
805
806 /******************************************************************************
807 * Function Name: Cy_PDM_PCM_Channel_GetInterruptStatusMasked
808 ***************************************************************************//**
809 *
810 * Reports the status of enabled (masked) PDM-PCM interrupt sources.
811 * (an INTR_MASKED register).
812 *
813 * \param base The pointer to the PDM-PCM instance address.
814 * \param channel_num Channel number
815 * \return The interrupt bit mask \ref group_pdm_pcm_macros_interrupt_masks_v2.
816 *
817 * \funcusage
818 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_ReadFifo
819 *
820 *****************************************************************************/
Cy_PDM_PCM_Channel_GetInterruptStatusMasked(PDM_Type const * base,uint8_t channel_num)821 __STATIC_INLINE uint32_t Cy_PDM_PCM_Channel_GetInterruptStatusMasked(PDM_Type const * base, uint8_t channel_num)
822 {
823 return (PDM_PCM_INTR_RX_MASKED(base, channel_num));
824 }
825
826
827 /******************************************************************************
828 * Function Name: Cy_PDM_PCM_Channel_GetInterruptStatus
829 ***************************************************************************//**
830 *
831 * Reports the status of PDM-PCM interrupt sources (an INTR register).
832 *
833 * \param base The pointer to the PDM-PCM instance address.
834 * \param channel_num Channel number
835 * \return The interrupt bit mask \ref group_pdm_pcm_macros_interrupt_masks_v2.
836 *
837 * \funcusage
838 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_ReadFifo
839 *
840 ******************************************************************************/
Cy_PDM_PCM_Channel_GetInterruptStatus(PDM_Type const * base,uint8_t channel_num)841 __STATIC_INLINE uint32_t Cy_PDM_PCM_Channel_GetInterruptStatus(PDM_Type const * base, uint8_t channel_num)
842 {
843 return (PDM_PCM_INTR_RX(base, channel_num));
844 }
845
846
847 /******************************************************************************
848 * Function Name: Cy_PDM_PCM_Channel_ClearInterrupt
849 ***************************************************************************//**
850 *
851 * Clears one or more PDM-PCM interrupt statuses (sets an INTR register's bits).
852 *
853 * \param base The pointer to the PDM-PCM instance address
854 * \param channel_num Channel number
855 * \param interrupt
856 * The interrupt bit mask \ref group_pdm_pcm_macros_interrupt_masks_v2.
857 *
858 * \funcusage
859 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_ClearInterrupt
860 *
861 ******************************************************************************/
Cy_PDM_PCM_Channel_ClearInterrupt(PDM_Type * base,uint8_t channel_num,uint32_t interrupt)862 __STATIC_INLINE void Cy_PDM_PCM_Channel_ClearInterrupt(PDM_Type * base, uint8_t channel_num, uint32_t interrupt)
863 {
864 CY_ASSERT_L2(CY_PDM_PCM_IS_INTR_MASK_VALID(interrupt));
865 PDM_PCM_INTR_RX(base, channel_num) = interrupt;
866 /* This dummy reading is necessary here. It provides a guarantee that interrupt is cleared at returning from this function. */
867 (void) PDM_PCM_INTR_RX(base, channel_num);
868 }
869
870
871 /******************************************************************************
872 * Function Name: Cy_PDM_PCM_Channel_SetInterrupt
873 ***************************************************************************//**
874 *
875 * Sets one or more interrupt source statuses (sets an INTR_SET register).
876 *
877 * \param base The pointer to the PDM-PCM instance address.
878 * \param channel_num Channel number
879 * \param interrupt
880 * The interrupt bit mask \ref group_pdm_pcm_macros_interrupt_masks_v2.
881 *
882 ******************************************************************************/
Cy_PDM_PCM_Channel_SetInterrupt(PDM_Type * base,uint8_t channel_num,uint32_t interrupt)883 __STATIC_INLINE void Cy_PDM_PCM_Channel_SetInterrupt(PDM_Type * base, uint8_t channel_num, uint32_t interrupt)
884 {
885 CY_ASSERT_L2(CY_PDM_PCM_IS_INTR_MASK_VALID(interrupt));
886 PDM_PCM_INTR_RX_SET(base, channel_num) = interrupt;
887 }
888
889
890 /******************************************************************************
891 * Function Name: Cy_PDM_PCM_Channel_GetNumInFifo
892 ***************************************************************************//**
893 *
894 * Reports the current number of used words in the output data FIFO.
895 *
896 * \param base The pointer to the PDM-PCM instance address.
897 * \param channel_num Channel number
898 * \return The current number of used FIFO words (range is 0 - 63).
899 *
900 * \funcusage
901 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_GetNumInFifo
902 *
903 ******************************************************************************/
Cy_PDM_PCM_Channel_GetNumInFifo(PDM_Type const * base,uint8_t channel_num)904 __STATIC_INLINE uint8_t Cy_PDM_PCM_Channel_GetNumInFifo(PDM_Type const * base, uint8_t channel_num)
905 {
906 return (uint8_t) (_FLD2VAL(PDM_CH_RX_FIFO_STATUS_USED, PDM_PCM_RX_FIFO_STATUS(base, channel_num)));
907 }
908
909
910 /******************************************************************************
911 * Function Name: Cy_PDM_PCM_Channel_ReadFifo
912 ***************************************************************************//**
913 *
914 * Reads ("pops") one word from the output data FIFO.
915 *
916 * \param base The pointer to the PDM-PCM instance address.
917 * \param channel_num Channel number
918 * \return The data word read from the FIFO is returned.
919 *
920 * \funcusage
921 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_ReadFifo
922 *
923 ******************************************************************************/
Cy_PDM_PCM_Channel_ReadFifo(PDM_Type const * base,uint8_t channel_num)924 __STATIC_INLINE uint32_t Cy_PDM_PCM_Channel_ReadFifo(PDM_Type const * base, uint8_t channel_num)
925 {
926 return (PDM_PCM_RX_FIFO_RD(base, channel_num));
927 }
928
929 /******************************************************************************
930 * Function Name: Cy_PDM_PCM_Channel_FreezeFifo
931 ***************************************************************************//**
932 *
933 * Freezes the RX FIFO (Debug purpose).
934 *
935 * \param base The pointer to the PDM-PCM instance address.
936 * \param channel_num Channel number
937 *
938 * \funcusage
939 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_FreezeFifo
940 *
941 ******************************************************************************/
Cy_PDM_PCM_Channel_FreezeFifo(PDM_Type * base,uint8_t channel_num)942 __STATIC_INLINE void Cy_PDM_PCM_Channel_FreezeFifo(PDM_Type * base, uint8_t channel_num)
943 {
944 PDM_PCM_RX_FIFO_CTL(base, channel_num) |= PDM_CH_RX_FIFO_CTL_FREEZE_Msk;
945 }
946
947
948 /******************************************************************************
949 * Function Name: Cy_PDM_PCM_Channel_UnfreezeFifo
950 ***************************************************************************//**
951 *
952 * Unfreezes the RX FIFO (Debug purpose).
953 *
954 * \param base The pointer to the PDM-PCM instance address.
955 * \param channel_num Channel number
956 *
957 * \funcusage
958 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_UnfreezeFifo
959 *
960 ******************************************************************************/
Cy_PDM_PCM_Channel_UnfreezeFifo(PDM_Type * base,uint8_t channel_num)961 __STATIC_INLINE void Cy_PDM_PCM_Channel_UnfreezeFifo(PDM_Type * base, uint8_t channel_num)
962 {
963 PDM_PCM_RX_FIFO_CTL(base, channel_num) &= (uint32_t) ~PDM_CH_RX_FIFO_CTL_FREEZE_Msk;
964 }
965
966
967 /******************************************************************************
968 * Function Name: Cy_PDM_PCM_Channel_ReadFifoSilent
969 ***************************************************************************//**
970 *
971 * Reads the RX FIFO silent (without touching the FIFO function).
972 *
973 * \param base Pointer to PDM-PCM instance address.
974 * \param channel_num Channel number
975 * \return Silent FIFO value is read and returned.
976 *
977 * \funcusage
978 * \snippet pdm_pcmv2/snippet/main.c snippet_Cy_PDM_PCM_Channel_ReadFifoSilent
979 *
980 ******************************************************************************/
Cy_PDM_PCM_Channel_ReadFifoSilent(PDM_Type const * base,uint8_t channel_num)981 __STATIC_INLINE uint32_t Cy_PDM_PCM_Channel_ReadFifoSilent(PDM_Type const * base, uint8_t channel_num)
982 {
983 return (PDM_PCM_RX_FIFO_RD_SILENT(base, channel_num));
984 }
985
986 /** \} group_pdm_pcm_functions_v2 */
987
988 #ifdef __cplusplus
989 }
990 #endif /* of __cplusplus */
991
992 #endif /* CY_IP_MXPDM */
993
994 #endif /* CY_PDM_PCM_V2_H__ */
995
996 /** \} group_pdm_pcm_v2 */
997
998
999 /* [] END OF FILE */
1000
