1################################################################################
2# \file cy8c6xx7_cm4_dual.mk
3# \version 2.95.1
4#
5# \brief
6# Specifies the starting address and the size of the segments in the output
7# file.
8#
9# \note The section definitions in this file are generic and handle all common
10# use cases.
11#
12################################################################################
13# \copyright
14# Copyright 2018-2021 Cypress Semiconductor Corporation
15# SPDX-License-Identifier: Apache-2.0
16#
17# Licensed under the Apache License, Version 2.0 (the "License");
18# you may not use this file except in compliance with the License.
19# You may obtain a copy of the License at
20#
21#     http://www.apache.org/licenses/LICENSE-2.0
22#
23# Unless required by applicable law or agreed to in writing, software
24# distributed under the License is distributed on an "AS IS" BASIS,
25# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
26# See the License for the specific language governing permissions and
27# limitations under the License.
28################################################################################
29
30### CM0P ###
31export HEAP_SIZE_CM0P     := 0x400
32export VECT_BASE_CM0P     := 0x10000000
33export RAM_VECT_BASE_CM0P := 0x08000000
34export VECT_SIZE_CM0P     := 0x000000C0
35export TEXT_BASE_CM0P     := 0x100000C0
36export TEXT_SIZE_CM0P     := 0x00002000
37export RAM_BASE_CM0P      := 0x080000C0
38export RAM_SIZE_CM0P      := 0x00002000
39export CYMETA_BASE_CM0P   := 0x90500000
40export STACK_SIZE_CM0P    := 0x2000
41
42STACK_ADDRESS_TOP_CM0P    := $(shell printf "0x%x" $$(($(RAM_VECT_BASE_CM0P) + $(RAM_SIZE_CM0P))))
43STACK_ADDRESS_BOTTOM_CM0P := $(shell printf "0x%x" $$(($(STACK_ADDRESS_TOP_CM0P) - $(STACK_SIZE_CM0P))))
44TOOLCHAIN_VECT_BASE_CM0   := $(VECT_BASE_CM0P)
45
46SECTIONS_CM0P := \
47    -segaddr __VECT $(VECT_BASE_CM0P) \
48    -segaddr __TEXT $(TEXT_BASE_CM0P) \
49    -segaddr __DATA $(RAM_BASE_CM0P) \
50    -segaddr __RAMVECTORS $(RAM_VECT_BASE_CM0P) \
51    -segaddr __CYMETA $(CYMETA_BASE_CM0P) \
52    -segaddr __STACK $(STACK_ADDRESS_TOP_CM0P)
53
54### CM4 ###
55export HEAP_SIZE_CM4     := 0x400
56export VECT_BASE_CM4     := 0x10002000
57export RAM_VECT_BASE_CM4 := 0x08002000
58export VECT_SIZE_CM4     := 0x0000028C
59export TEXT_BASE_CM4     := 0x1000228C
60export TEXT_SIZE_CM4     := 0x000FE000
61export RAM_BASE_CM4      := 0x0800228C
62export RAM_SIZE_CM4      := 0x00045800
63export CYMETA_BASE_CM4   := 0x90500000
64export STACK_SIZE_CM4    := 0x2000
65STACK_ADDRESS_TOP_CM4    := $(shell printf "0x%x" $$(($(RAM_VECT_BASE_CM4) + $(RAM_SIZE_CM4))))
66STACK_ADDRESS_BOTTOM_CM4 := $(shell printf "0x%x" $$(($(STACK_ADDRESS_TOP_CM4) - $(STACK_SIZE_CM4))))
67TOOLCHAIN_VECT_BASE_CM4  := $(VECT_BASE_CM4)
68
69SECTIONS_CM4 := \
70    -segaddr __CY_M0P_IMAGE $(VECT_BASE_CM0P) \
71    -segaddr __VECT $(VECT_BASE_CM4) \
72    -segaddr __TEXT $(TEXT_BASE_CM4) \
73    -segaddr __DATA $(RAM_BASE_CM4) \
74    -segaddr __RAMVECTORS $(RAM_VECT_BASE_CM4) \
75    -segaddr __CYMETA $(CYMETA_BASE_CM4) \
76    -segaddr __STACK $(STACK_ADDRESS_TOP_CM4)
77
78# Pass section addresses to the linker
79ifeq ($(MTB_RECIPE__CORE),CM4)
80ACLANG_MEM_LDFLAGS += \
81    -segalign 4 \
82    $(SECTIONS_CM4)
83else ifeq ($(MTB_RECIPE__CORE),CM0P)
84ACLANG_MEM_LDFLAGS += \
85    -segalign 4 \
86    $(SECTIONS_CM0P)
87endif
88
89# EOF
90