1/***************************************************************************//**
2* \file cy8c6xx7_cm4.ld
3* \version 2.95.1
4*
5* Linker file for the GNU C compiler.
6*
7* The main purpose of the linker script is to describe how the sections in the
8* input files should be mapped into the output file, and to control the memory
9* layout of the output file.
10*
11* \note The entry point location is fixed and starts at 0x10000000. The valid
12* application image should be placed there.
13*
14* \note The linker files included with the PDL template projects must be generic
15* and handle all common use cases. Your project may not use every section
16* defined in the linker files. In that case you may see warnings during the
17* build process. In your project, you can simply comment out or remove the
18* relevant code in the linker file.
19*
20********************************************************************************
21* \copyright
22* Copyright 2016-2021 Cypress Semiconductor Corporation
23* SPDX-License-Identifier: Apache-2.0
24*
25* Licensed under the Apache License, Version 2.0 (the "License");
26* you may not use this file except in compliance with the License.
27* You may obtain a copy of the License at
28*
29*     http://www.apache.org/licenses/LICENSE-2.0
30*
31* Unless required by applicable law or agreed to in writing, software
32* distributed under the License is distributed on an "AS IS" BASIS,
33* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
34* See the License for the specific language governing permissions and
35* limitations under the License.
36*******************************************************************************/
37
38OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
39SEARCH_DIR(.)
40GROUP(-lgcc -lc -lnosys)
41ENTRY(Reset_Handler)
42
43/* The size of the stack section at the end of CM4 SRAM */
44STACK_SIZE = 0x1000;
45
46/* Force symbol to be entered in the output file as an undefined symbol. Doing
47* this may, for example, trigger linking of additional modules from standard
48* libraries. You may list several symbols for each EXTERN, and you may use
49* EXTERN multiple times. This command has the same effect as the -u command-line
50* option.
51*/
52EXTERN(Reset_Handler)
53
54/* The MEMORY section below describes the location and size of blocks of memory in the target.
55* Use this section to specify the memory regions available for allocation.
56*/
57MEMORY
58{
59    /* The ram and flash regions control RAM and flash memory allocation for the CM4 core.
60     * Note that 2176 bytes of RAM (at the end of the SRAM) are reserved for system use.
61     * Using this memory region for other purposes will lead to unexpected behavior.
62     */
63    ram               (rwx)   : ORIGIN = 0x08000000, LENGTH = 0x47780
64    flash             (rx)    : ORIGIN = 0x10000000, LENGTH = 0x100000
65
66    /* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
67     * You can assign sections to this memory region for only one of the cores.
68     * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
69     * Therefore, repurposing this memory region will prevent such middleware from operation.
70     */
71    em_eeprom         (rx)    : ORIGIN = 0x14000000, LENGTH = 0x8000       /*  32 KB */
72
73    /* The following regions define device specific memory regions and must not be changed. */
74    sflash_user_data  (rx)    : ORIGIN = 0x16000800, LENGTH = 0x800        /* Supervisory flash: User data */
75    sflash_nar        (rx)    : ORIGIN = 0x16001A00, LENGTH = 0x200        /* Supervisory flash: Normal Access Restrictions (NAR) */
76    sflash_public_key (rx)    : ORIGIN = 0x16005A00, LENGTH = 0xC00        /* Supervisory flash: Public Key */
77    sflash_toc_2      (rx)    : ORIGIN = 0x16007C00, LENGTH = 0x200        /* Supervisory flash: Table of Content # 2 */
78    sflash_rtoc_2     (rx)    : ORIGIN = 0x16007E00, LENGTH = 0x200        /* Supervisory flash: Table of Content # 2 Copy */
79    xip               (rx)    : ORIGIN = 0x18000000, LENGTH = 0x8000000    /* 128 MB */
80    efuse             (r)     : ORIGIN = 0x90700000, LENGTH = 0x100000     /*   1 MB */
81}
82
83/* Library configurations */
84GROUP(libgcc.a libc.a libm.a libnosys.a)
85
86/* Linker script to place sections and symbol values. Should be used together
87 * with other linker script that defines memory regions FLASH and RAM.
88 * It references following symbols, which must be defined in code:
89 *   Reset_Handler : Entry of reset handler
90 *
91 * It defines following symbols, which code can use without definition:
92 *   __exidx_start
93 *   __exidx_end
94 *   __copy_table_start__
95 *   __copy_table_end__
96 *   __zero_table_start__
97 *   __zero_table_end__
98 *   __etext
99 *   __data_start__
100 *   __preinit_array_start
101 *   __preinit_array_end
102 *   __init_array_start
103 *   __init_array_end
104 *   __fini_array_start
105 *   __fini_array_end
106 *   __data_end__
107 *   __bss_start__
108 *   __bss_end__
109 *   __end__
110 *   end
111 *   __HeapLimit
112 *   __StackLimit
113 *   __StackTop
114 *   __stack
115 *   __Vectors_End
116 *   __Vectors_Size
117 */
118
119
120SECTIONS
121{
122    /* Cortex-M4 application flash area */
123    .text :
124    {
125        /* Cortex-M4 flash vector table */
126        __Vectors = . ;
127        KEEP(*(.vectors))
128        . = ALIGN(4);
129        __Vectors_End = .;
130        __Vectors_Size = __Vectors_End - __Vectors;
131        __end__ = .;
132
133        . = ALIGN(4);
134        *(.text*)
135
136        KEEP(*(.init))
137        KEEP(*(.fini))
138
139        /* .ctors */
140        *crtbegin.o(.ctors)
141        *crtbegin?.o(.ctors)
142        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
143        *(SORT(.ctors.*))
144        *(.ctors)
145
146        /* .dtors */
147        *crtbegin.o(.dtors)
148        *crtbegin?.o(.dtors)
149        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
150        *(SORT(.dtors.*))
151        *(.dtors)
152
153        /* Read-only code (constants). */
154        *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
155
156        KEEP(*(.eh_frame*))
157    } > flash
158
159
160    .ARM.extab :
161    {
162        *(.ARM.extab* .gnu.linkonce.armextab.*)
163    } > flash
164
165    __exidx_start = .;
166
167    .ARM.exidx :
168    {
169        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
170    } > flash
171    __exidx_end = .;
172
173
174    /* To copy multiple ROM to RAM sections,
175     * uncomment .copy.table section and,
176     * define __STARTUP_COPY_MULTIPLE in startup_psoc6_01_cm4.S */
177    .copy.table :
178    {
179        . = ALIGN(4);
180        __copy_table_start__ = .;
181
182        /* Copy interrupt vectors from flash to RAM */
183        LONG (__Vectors)                                    /* From */
184        LONG (__ram_vectors_start__)                        /* To   */
185        LONG (__Vectors_End - __Vectors)                    /* Size */
186
187        /* Copy data section to RAM */
188        LONG (__etext)                                      /* From */
189        LONG (__data_start__)                               /* To   */
190        LONG (__data_end__ - __data_start__)                /* Size */
191
192        __copy_table_end__ = .;
193    } > flash
194
195
196    /* To clear multiple BSS sections,
197     * uncomment .zero.table section and,
198     * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_psoc6_01_cm4.S */
199    .zero.table :
200    {
201        . = ALIGN(4);
202        __zero_table_start__ = .;
203        LONG (__bss_start__)
204        LONG (__bss_end__ - __bss_start__)
205        __zero_table_end__ = .;
206    } > flash
207
208    __etext =  . ;
209
210
211    .ramVectors (NOLOAD) : ALIGN(8)
212    {
213        __ram_vectors_start__ = .;
214        KEEP(*(.ram_vectors))
215        __ram_vectors_end__   = .;
216    } > ram
217
218
219    .data __ram_vectors_end__ :
220    {
221        . = ALIGN(4);
222        __data_start__ = .;
223
224        *(vtable)
225        *(.data*)
226
227        . = ALIGN(4);
228        /* preinit data */
229        PROVIDE_HIDDEN (__preinit_array_start = .);
230        KEEP(*(.preinit_array))
231        PROVIDE_HIDDEN (__preinit_array_end = .);
232
233        . = ALIGN(4);
234        /* init data */
235        PROVIDE_HIDDEN (__init_array_start = .);
236        KEEP(*(SORT(.init_array.*)))
237        KEEP(*(.init_array))
238        PROVIDE_HIDDEN (__init_array_end = .);
239
240        . = ALIGN(4);
241        /* finit data */
242        PROVIDE_HIDDEN (__fini_array_start = .);
243        KEEP(*(SORT(.fini_array.*)))
244        KEEP(*(.fini_array))
245        PROVIDE_HIDDEN (__fini_array_end = .);
246
247        KEEP(*(.jcr*))
248        . = ALIGN(4);
249
250        KEEP(*(.cy_ramfunc*))
251        . = ALIGN(4);
252
253        __data_end__ = .;
254
255    } > ram AT>flash
256
257
258    /* Place variables in the section that should not be initialized during the
259    *  device startup.
260    */
261    .noinit (NOLOAD) : ALIGN(8)
262    {
263      KEEP(*(.noinit))
264    } > ram
265
266
267    /* The uninitialized global or static variables are placed in this section.
268    *
269    * The NOLOAD attribute tells linker that .bss section does not consume
270    * any space in the image. The NOLOAD attribute changes the .bss type to
271    * NOBITS, and that  makes linker to A) not allocate section in memory, and
272    * A) put information to clear the section with all zeros during application
273    * loading.
274    *
275    * Without the NOLOAD attribute, the .bss section might get PROGBITS type.
276    * This  makes linker to A) allocate zeroed section in memory, and B) copy
277    * this section to RAM during application loading.
278    */
279    .bss (NOLOAD):
280    {
281        . = ALIGN(4);
282        __bss_start__ = .;
283        *(.bss*)
284        *(COMMON)
285        . = ALIGN(4);
286        __bss_end__ = .;
287    } > ram
288
289
290    .heap (NOLOAD):
291    {
292        __HeapBase = .;
293        __end__ = .;
294        end = __end__;
295        KEEP(*(.heap*))
296        . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE;
297        __HeapLimit = .;
298    } > ram
299
300
301    /* .stack_dummy section doesn't contains any symbols. It is only
302     * used for linker to calculate size of stack sections, and assign
303     * values to stack symbols later */
304    .stack_dummy (NOLOAD):
305    {
306        KEEP(*(.stack*))
307    } > ram
308
309
310    /* Set stack top to end of RAM, and stack limit move down by
311     * size of stack_dummy section */
312    __StackTop = ORIGIN(ram) + LENGTH(ram);
313    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
314    PROVIDE(__stack = __StackTop);
315
316    /* Check if data + heap + stack exceeds RAM limit */
317    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
318
319
320    /* Used for the digital signature of the secure application and the Bootloader SDK application.
321    * The size of the section depends on the required data size. */
322    .cy_app_signature ORIGIN(flash) + LENGTH(flash) - 256 :
323    {
324        KEEP(*(.cy_app_signature))
325    } > flash
326
327
328    /* Emulated EEPROM Flash area */
329    .cy_em_eeprom :
330    {
331        KEEP(*(.cy_em_eeprom))
332    } > em_eeprom
333
334
335    /* Supervisory Flash: User data */
336    .cy_sflash_user_data :
337    {
338        KEEP(*(.cy_sflash_user_data))
339    } > sflash_user_data
340
341
342    /* Supervisory Flash: Normal Access Restrictions (NAR) */
343    .cy_sflash_nar :
344    {
345        KEEP(*(.cy_sflash_nar))
346    } > sflash_nar
347
348
349    /* Supervisory Flash: Public Key */
350    .cy_sflash_public_key :
351    {
352        KEEP(*(.cy_sflash_public_key))
353    } > sflash_public_key
354
355
356    /* Supervisory Flash: Table of Content # 2 */
357    .cy_toc_part2 :
358    {
359        KEEP(*(.cy_toc_part2))
360    } > sflash_toc_2
361
362
363    /* Supervisory Flash: Table of Content # 2 Copy */
364    .cy_rtoc_part2 :
365    {
366        KEEP(*(.cy_rtoc_part2))
367    } > sflash_rtoc_2
368
369
370    /* Places the code in the Execute in Place (XIP) section. See the smif driver
371    *  documentation for details.
372    */
373    cy_xip :
374    {
375        __cy_xip_start = .;
376        KEEP(*(.cy_xip))
377        __cy_xip_end = .;
378    } > xip
379
380
381    /* eFuse */
382    .cy_efuse :
383    {
384        KEEP(*(.cy_efuse))
385    } > efuse
386
387
388    /* These sections are used for additional metadata (silicon revision,
389    *  Silicon/JTAG ID, etc.) storage.
390    */
391    .cymeta         0x90500000 : { KEEP(*(.cymeta)) } :NONE
392}
393
394
395/* The following symbols used by the cymcuelftool. */
396/* Flash */
397__cy_memory_0_start    = 0x10000000;
398__cy_memory_0_length   = 0x00100000;
399__cy_memory_0_row_size = 0x200;
400
401/* Emulated EEPROM Flash area */
402__cy_memory_1_start    = 0x14000000;
403__cy_memory_1_length   = 0x8000;
404__cy_memory_1_row_size = 0x200;
405
406/* Supervisory Flash */
407__cy_memory_2_start    = 0x16000000;
408__cy_memory_2_length   = 0x8000;
409__cy_memory_2_row_size = 0x200;
410
411/* XIP */
412__cy_memory_3_start    = 0x18000000;
413__cy_memory_3_length   = 0x08000000;
414__cy_memory_3_row_size = 0x200;
415
416/* eFuse */
417__cy_memory_4_start    = 0x90700000;
418__cy_memory_4_length   = 0x100000;
419__cy_memory_4_row_size = 1;
420
421/* EOF */
422