1 /*
2 * Copyright (c) 2023 TOKITA Hiroshi
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <hardware/timer.h>
8
9 #include <zephyr/drivers/counter.h>
10 #include <zephyr/drivers/clock_control.h>
11 #include <zephyr/drivers/reset.h>
12 #include <zephyr/sys/atomic.h>
13 #include <zephyr/irq.h>
14 #include <cmsis_core.h>
15
16 #define LOG_LEVEL CONFIG_COUNTER_LOG_LEVEL
17 #include <zephyr/logging/log.h>
18
19 LOG_MODULE_REGISTER(counter_rpi_pico_timer, LOG_LEVEL);
20
21 #define DT_DRV_COMPAT raspberrypi_pico_timer
22
23 struct counter_rpi_pico_timer_ch_data {
24 counter_alarm_callback_t callback;
25 void *user_data;
26 };
27
28 struct counter_rpi_pico_timer_data {
29 struct counter_rpi_pico_timer_ch_data *ch_data;
30 uint32_t guard_period;
31 };
32
33 struct counter_rpi_pico_timer_config {
34 struct counter_config_info info;
35 timer_hw_t *timer;
36 void (*irq_config)();
37 const struct device *clk_dev;
38 clock_control_subsys_t clk_id;
39 const struct reset_dt_spec reset;
40 };
41
counter_rpi_pico_timer_start(const struct device * dev)42 static int counter_rpi_pico_timer_start(const struct device *dev)
43 {
44 const struct counter_rpi_pico_timer_config *config = dev->config;
45
46 config->timer->pause = 0;
47
48 return 0;
49 }
50
counter_rpi_pico_timer_stop(const struct device * dev)51 static int counter_rpi_pico_timer_stop(const struct device *dev)
52 {
53 const struct counter_rpi_pico_timer_config *config = dev->config;
54
55 config->timer->pause = 1u;
56 config->timer->timelw = 0;
57 config->timer->timehw = 0;
58
59 return 0;
60 }
61
counter_rpi_pico_timer_get_top_value(const struct device * dev)62 static uint32_t counter_rpi_pico_timer_get_top_value(const struct device *dev)
63 {
64 const struct counter_rpi_pico_timer_config *config = dev->config;
65
66 return config->info.max_top_value;
67 }
68
counter_rpi_pico_timer_get_value(const struct device * dev,uint32_t * ticks)69 static int counter_rpi_pico_timer_get_value(const struct device *dev, uint32_t *ticks)
70 {
71 *ticks = time_us_32();
72 return 0;
73 }
74
counter_rpi_pico_timer_set_alarm(const struct device * dev,uint8_t id,const struct counter_alarm_cfg * alarm_cfg)75 static int counter_rpi_pico_timer_set_alarm(const struct device *dev, uint8_t id,
76 const struct counter_alarm_cfg *alarm_cfg)
77 {
78 const struct counter_rpi_pico_timer_config *config = dev->config;
79 struct counter_rpi_pico_timer_data *data = dev->data;
80 struct counter_rpi_pico_timer_ch_data *chdata = &data->ch_data[id];
81 uint64_t target = (alarm_cfg->flags & COUNTER_ALARM_CFG_ABSOLUTE) ? 0 : alarm_cfg->ticks;
82 absolute_time_t alarm_at;
83 bool missed;
84
85 update_us_since_boot(&alarm_at, config->timer->timerawl + target);
86
87 if (alarm_cfg->ticks > counter_rpi_pico_timer_get_top_value(dev)) {
88 return -EINVAL;
89 }
90
91 if (chdata->callback) {
92 return -EBUSY;
93 }
94
95 chdata->callback = alarm_cfg->callback;
96 chdata->user_data = alarm_cfg->user_data;
97
98 missed = hardware_alarm_set_target(id, alarm_at);
99
100 if (missed) {
101 if (alarm_cfg->flags & COUNTER_ALARM_CFG_EXPIRE_WHEN_LATE) {
102 hardware_alarm_force_irq(id);
103 }
104 chdata->callback = NULL;
105 chdata->user_data = NULL;
106 return -ETIME;
107 }
108
109 return 0;
110 }
111
counter_rpi_pico_timer_cancel_alarm(const struct device * dev,uint8_t id)112 static int counter_rpi_pico_timer_cancel_alarm(const struct device *dev, uint8_t id)
113 {
114 struct counter_rpi_pico_timer_data *data = dev->data;
115 struct counter_rpi_pico_timer_ch_data *chdata = &data->ch_data[id];
116
117 chdata->callback = NULL;
118 chdata->user_data = NULL;
119 hardware_alarm_cancel(id);
120
121 return 0;
122 }
123
counter_rpi_pico_timer_set_top_value(const struct device * dev,const struct counter_top_cfg * cfg)124 static int counter_rpi_pico_timer_set_top_value(const struct device *dev,
125 const struct counter_top_cfg *cfg)
126 {
127 ARG_UNUSED(dev);
128 ARG_UNUSED(cfg);
129
130 return -ENOTSUP;
131 }
132
counter_rpi_pico_timer_get_pending_int(const struct device * dev)133 static uint32_t counter_rpi_pico_timer_get_pending_int(const struct device *dev)
134 {
135 return 0;
136 }
137
counter_rpi_pico_timer_get_guard_period(const struct device * dev,uint32_t flags)138 static uint32_t counter_rpi_pico_timer_get_guard_period(const struct device *dev, uint32_t flags)
139 {
140 struct counter_rpi_pico_timer_data *data = dev->data;
141
142 return data->guard_period;
143 }
144
counter_rpi_pico_timer_set_guard_period(const struct device * dev,uint32_t guard,uint32_t flags)145 static int counter_rpi_pico_timer_set_guard_period(const struct device *dev, uint32_t guard,
146 uint32_t flags)
147 {
148 struct counter_rpi_pico_timer_data *data = dev->data;
149
150 __ASSERT_NO_MSG(guard < counter_rpi_pico_timer_get_top_value(dev));
151
152 data->guard_period = guard;
153
154 return 0;
155 }
156
counter_rpi_pico_irq_handle(uint32_t ch,void * arg)157 static void counter_rpi_pico_irq_handle(uint32_t ch, void *arg)
158 {
159 struct device *dev = arg;
160 struct counter_rpi_pico_timer_data *data = dev->data;
161 counter_alarm_callback_t cb = data->ch_data[ch].callback;
162 void *user_data = data->ch_data[ch].user_data;
163
164 if (cb) {
165 data->ch_data[ch].callback = NULL;
166 data->ch_data[ch].user_data = NULL;
167 cb(dev, ch, time_us_32(), user_data);
168 }
169 }
170
counter_rpi_pico_timer_init(const struct device * dev)171 static int counter_rpi_pico_timer_init(const struct device *dev)
172 {
173 const struct counter_rpi_pico_timer_config *config = dev->config;
174 int ret;
175
176 ret = clock_control_on(config->clk_dev, config->clk_id);
177 if (ret < 0) {
178 return ret;
179 }
180
181 ret = reset_line_toggle_dt(&config->reset);
182 if (ret < 0) {
183 return ret;
184 }
185
186 config->irq_config();
187
188 return 0;
189 }
190
191 static const struct counter_driver_api counter_rpi_pico_driver_api = {
192 .start = counter_rpi_pico_timer_start,
193 .stop = counter_rpi_pico_timer_stop,
194 .get_value = counter_rpi_pico_timer_get_value,
195 .set_alarm = counter_rpi_pico_timer_set_alarm,
196 .cancel_alarm = counter_rpi_pico_timer_cancel_alarm,
197 .set_top_value = counter_rpi_pico_timer_set_top_value,
198 .get_pending_int = counter_rpi_pico_timer_get_pending_int,
199 .get_top_value = counter_rpi_pico_timer_get_top_value,
200 .get_guard_period = counter_rpi_pico_timer_get_guard_period,
201 .set_guard_period = counter_rpi_pico_timer_set_guard_period,
202 };
203
204 #define RPI_PICO_TIMER_IRQ_ENABLE(node_id, name, idx) \
205 do { \
206 hardware_alarm_set_callback(idx, counter_rpi_pico_irq_handle); \
207 IRQ_CONNECT((DT_IRQ_BY_IDX(node_id, idx, irq)), \
208 (DT_IRQ_BY_IDX(node_id, idx, priority)), hardware_alarm_irq_handler, \
209 (DEVICE_DT_GET(node_id)), 0); \
210 irq_enable((DT_IRQ_BY_IDX(node_id, idx, irq))); \
211 } while (false);
212
213 #define COUNTER_RPI_PICO_TIMER(inst) \
214 static void counter_irq_config##inst(void) \
215 { \
216 DT_INST_FOREACH_PROP_ELEM(inst, interrupt_names, RPI_PICO_TIMER_IRQ_ENABLE); \
217 } \
218 static struct counter_rpi_pico_timer_ch_data \
219 ch_data##inst[DT_NUM_IRQS(DT_DRV_INST(inst))]; \
220 static struct counter_rpi_pico_timer_data counter_##inst##_data = { \
221 .ch_data = ch_data##inst, \
222 }; \
223 static const struct counter_rpi_pico_timer_config counter_##inst##_config = { \
224 .timer = (timer_hw_t *)DT_INST_REG_ADDR(inst), \
225 .irq_config = counter_irq_config##inst, \
226 .info = \
227 { \
228 .max_top_value = UINT32_MAX, \
229 .freq = 1000000, \
230 .flags = COUNTER_CONFIG_INFO_COUNT_UP, \
231 .channels = ARRAY_SIZE(ch_data##inst), \
232 }, \
233 .clk_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(inst)), \
234 .clk_id = (clock_control_subsys_t)DT_INST_PHA_BY_IDX(inst, clocks, 0, clk_id), \
235 .reset = RESET_DT_SPEC_INST_GET(inst), \
236 }; \
237 DEVICE_DT_INST_DEFINE(inst, counter_rpi_pico_timer_init, NULL, &counter_##inst##_data, \
238 &counter_##inst##_config, PRE_KERNEL_1, \
239 CONFIG_COUNTER_INIT_PRIORITY, &counter_rpi_pico_driver_api);
240
241 DT_INST_FOREACH_STATUS_OKAY(COUNTER_RPI_PICO_TIMER)
242
