1 /** 2 * 3 * Copyright (c) 2019 Microchip Technology Inc. and its subsidiaries. 4 * 5 * \asf_license_start 6 * 7 * \page License 8 * 9 * SPDX-License-Identifier: Apache-2.0 10 * 11 * Licensed under the Apache License, Version 2.0 (the "License"); you may 12 * not use this file except in compliance with the License. 13 * You may obtain a copy of the Licence at 14 * 15 * http://www.apache.org/licenses/LICENSE-2.0 16 * 17 * Unless required by applicable law or agreed to in writing, software 18 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 19 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 20 * See the License for the specific language governing permissions and 21 * limitations under the License. 22 * 23 * \asf_license_stop 24 * 25 */ 26 27 /** @file mailbox.h 28 *MEC1501 Mailbox Registers 29 */ 30 /** @defgroup MEC1501 Peripherals MBOX 31 */ 32 33 #ifndef _MAILBOX_H 34 #define _MAILBOX_H 35 36 #include <stdint.h> 37 #include <stddef.h> 38 39 #include "regaccess.h" 40 41 /* =========================================================================*/ 42 /* ================ MAILBOX ================ */ 43 /* =========================================================================*/ 44 45 #define MCHP_MBOX_BASE_ADDR 0x400f0000u 46 47 /* 48 * KBC interrupts 49 */ 50 #define MCHP_MBOX_GIRQ 15u 51 #define MCHP_MBOX_GIRQ_NVIC 7u 52 #define MCHP_MBOX_NVIC_DIRECT 60u 53 54 #define MCHP_KBC_MBOX_GIRQ_POS 20u 55 #define MCHP_KBC_MBOX_GIRQ (1u << 20u) 56 57 /* 58 * SMI Source register 59 */ 60 #define MCHP_MBOX_SMI_SRC_EC_WR_POS 0u 61 #define MCHP_MBOX_SMI_SRC_EC_WR (1u << (MCHP_MBOX_SMI_SRC_WR_POS)) 62 #define MCHP_MBOX_SMI_SRC_SWI_POS 1u 63 #define MCHP_MBOX_SMI_SRC_SWI_MASK0 0x7fu 64 #define MCHP_MBOX_SMI_SRC_SWI_MASK 0xfeu 65 #define MCHP_MBOX_SMI_SRC_SWI0 (1u << 1) 66 #define MCHP_MBOX_SMI_SRC_SWI1 (1u << 2) 67 #define MCHP_MBOX_SMI_SRC_SWI2 (1u << 3) 68 #define MCHP_MBOX_SMI_SRC_SWI3 (1u << 4) 69 #define MCHP_MBOX_SMI_SRC_SWI4 (1u << 5) 70 #define MCHP_MBOX_SMI_SRC_SWI5 (1u << 6) 71 #define MCHP_MBOX_SMI_SRC_SWI6 (1u << 7) 72 73 /* 74 * SMI Mask register 75 */ 76 #define MCHP_MBOX_SMI_MASK_WR_EN_POS 0u 77 #define MCHP_MBOX_SMI_MASK_WR_EN (1u << (MCHP_MBOX_SMI_MASK_WR_EN_POS)) 78 #define MCHP_MBOX_SMI_SWI_EN_POS 1u 79 #define MCHP_MBOX_SMI_SWI_EN_MASK0 0x7fu 80 #define MCHP_MBOX_SMI_SWI_EN_MASK 0xfeu 81 #define MCHP_MBOX_SMI_SRC_EN_SWI0 (1u << 1) 82 #define MCHP_MBOX_SMI_SRC_EN_SWI1 (1u << 2) 83 #define MCHP_MBOX_SMI_SRC_EN_SWI2 (1u << 3) 84 #define MCHP_MBOX_SMI_SRC_EN_SWI3 (1u << 4) 85 #define MCHP_MBOX_SMI_SRC_EN_SWI4 (1u << 5) 86 #define MCHP_MBOX_SMI_SRC_EN_SWI5 (1u << 6) 87 #define MCHP_MBOX_SMI_SRC_EN_SWI6 (1u << 7) 88 89 /** 90 * @brief Mailbox Registers (MBOX) 91 */ 92 typedef struct mbox_regs 93 { 94 __IOM uint8_t OS_IDX; /*!< (@ 0x0000) OS Index */ 95 __IOM uint8_t OS_DATA; /*!< (@ 0x0001) OS Data */ 96 uint8_t RSVD1[0x100u - 0x02u]; 97 __IOM uint32_t HOST_TO_EC; /*!< (@ 0x0100) Host to EC */ 98 __IOM uint32_t EC_TO_HOST; /*!< (@ 0x0104) EC to Host */ 99 __IOM uint32_t SMI_SRC; /*!< (@ 0x0108) SMI Source */ 100 __IOM uint32_t SMI_MASK; /*!< (@ 0x010c) SMI Mask */ 101 __IOM uint32_t MBX_0_3; /*!< (@ 0x0110) Mailboxes 0 - 3 */ 102 __IOM uint32_t MBX_4_7; /*!< (@ 0x0114) Mailboxes 4 - 7 */ 103 __IOM uint32_t MBX_8_11; /*!< (@ 0x0118) Mailboxes 8 - 11 */ 104 __IOM uint32_t MBX_12_15; /*!< (@ 0x011c) Mailboxes 12 - 15 */ 105 __IOM uint32_t MBX_16_19; /*!< (@ 0x0120) Mailboxes 16 - 19 */ 106 __IOM uint32_t MBX_20_23; /*!< (@ 0x0124) Mailboxes 20 - 23 */ 107 __IOM uint32_t MBX_24_27; /*!< (@ 0x0128) Mailboxes 24 - 27 */ 108 __IOM uint32_t MBX_28_31; /*!< (@ 0x012c) Mailboxes 28 - 31 */ 109 } MBOX_Type; 110 111 #endif /* #ifndef _MAILBOX_H */ 112 /* end mailbox.h */ 113 /** @} 114 */ 115
