1 /*
2 * Copyright 2023 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT nxp_s32_clock
8
9 #include <zephyr/drivers/clock_control.h>
10
11 #include <Clock_Ip.h>
12
13 #define NXP_S32_CLOCK_CONFIG_IDX CONFIG_CLOCK_CONTROL_NXP_S32_CLOCK_CONFIG_IDX
14
15 BUILD_ASSERT(CLOCK_IP_GET_FREQUENCY_API == STD_ON,
16 "Clock Get Frequency API must be enabled");
17
nxp_s32_clock_on(const struct device * dev,clock_control_subsys_t sub_system)18 static int nxp_s32_clock_on(const struct device *dev,
19 clock_control_subsys_t sub_system)
20 {
21 Clock_Ip_NameType clock_name = (Clock_Ip_NameType)sub_system;
22
23 if ((clock_name <= CLOCK_IS_OFF) || (clock_name >= RESERVED_CLK)) {
24 return -EINVAL;
25 }
26
27 Clock_Ip_EnableModuleClock(clock_name);
28
29 return 0;
30 }
31
nxp_s32_clock_off(const struct device * dev,clock_control_subsys_t sub_system)32 static int nxp_s32_clock_off(const struct device *dev,
33 clock_control_subsys_t sub_system)
34 {
35 Clock_Ip_NameType clock_name = (Clock_Ip_NameType)sub_system;
36
37 if ((clock_name <= CLOCK_IS_OFF) || (clock_name >= RESERVED_CLK)) {
38 return -EINVAL;
39 }
40
41 Clock_Ip_DisableModuleClock(clock_name);
42
43 return 0;
44 }
45
nxp_s32_clock_get_rate(const struct device * dev,clock_control_subsys_t sub_system,uint32_t * rate)46 static int nxp_s32_clock_get_rate(const struct device *dev,
47 clock_control_subsys_t sub_system,
48 uint32_t *rate)
49 {
50 Clock_Ip_NameType clock_name = (Clock_Ip_NameType)sub_system;
51
52 if ((clock_name <= CLOCK_IS_OFF) || (clock_name >= RESERVED_CLK)) {
53 return -EINVAL;
54 }
55
56 *rate = Clock_Ip_GetClockFrequency(clock_name);
57
58 return 0;
59 }
60
nxp_s32_clock_init(const struct device * dev)61 static int nxp_s32_clock_init(const struct device *dev)
62 {
63 Clock_Ip_StatusType status;
64
65 status = Clock_Ip_Init(&Clock_Ip_aClockConfig[NXP_S32_CLOCK_CONFIG_IDX]);
66
67 return (status == CLOCK_IP_SUCCESS ? 0 : -EIO);
68 }
69
70 static const struct clock_control_driver_api nxp_s32_clock_driver_api = {
71 .on = nxp_s32_clock_on,
72 .off = nxp_s32_clock_off,
73 .get_rate = nxp_s32_clock_get_rate,
74 };
75
76 DEVICE_DT_INST_DEFINE(0,
77 &nxp_s32_clock_init,
78 NULL, NULL, NULL,
79 PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY,
80 &nxp_s32_clock_driver_api);
81
