1 /******************************************************************************
2 * Filename: clkctl.h
3 *
4 * Description: Defines and prototypes for the Clock Control (CLKCTL).
5 *
6 * Copyright (c) 2024 Texas Instruments Incorporated
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1) Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the following disclaimer.
13 *
14 * 2) Redistributions in binary form must reproduce the above copyright notice,
15 * this list of conditions and the following disclaimer in the documentation
16 * and/or other materials provided with the distribution.
17 *
18 * 3) Neither the name of the copyright holder nor the names of its
19 * contributors may be used to endorse or promote products derived from this
20 * software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 * POSSIBILITY OF SUCH DAMAGE.
33 *
34 ******************************************************************************/
35
36 #ifndef __CLKCTL_H__
37 #define __CLKCTL_H__
38
39 //*****************************************************************************
40 //
41 //! \addtogroup peripheral_group
42 //! @{
43 //! \addtogroup clkctl_api
44 //! @{
45 //
46 //*****************************************************************************
47
48 //*****************************************************************************
49 //
50 // If building with a C++ compiler, make all of the definitions in this header
51 // have a C binding.
52 //
53 //*****************************************************************************
54 #ifdef __cplusplus
55 extern "C" {
56 #endif
57
58 #include <stdbool.h>
59 #include <stdint.h>
60 #include "../inc/hw_ints.h"
61 #include "../inc/hw_memmap.h"
62 #include "../inc/hw_types.h"
63 #include "../inc/hw_clkctl.h"
64 #include "debug.h"
65 #include "interrupt.h"
66
67 //*****************************************************************************
68 //
69 // Values that can be passed to CLKCTLEnable() and CLKCTLDisable().
70 //
71 //*****************************************************************************
72 #define CLKCTL_LGPT3 CLKCTL_CLKENSET0_LGPT3 //!< Configure LGPT3 clock enable
73 #define CLKCTL_LGPT2 CLKCTL_CLKENSET0_LGPT2 //!< Configure LGPT2 clock enable
74 #define CLKCTL_LGPT1 CLKCTL_CLKENSET0_LGPT1 //!< Configure LGPT1 clock enable
75 #define CLKCTL_LGPT0 CLKCTL_CLKENSET0_LGPT0 //!< Configure LGPT0 clock enable
76 #define CLKCTL_DMA CLKCTL_CLKENSET0_DMA //!< Configure DMA clock enable
77 #define CLKCTL_LAES CLKCTL_CLKENSET0_LAES //!< Configure LAES clock enable
78 #define CLKCTL_ADC0 CLKCTL_CLKENSET0_ADC0 //!< Configure ADC0 clock enable
79 #define CLKCTL_SPI0 CLKCTL_CLKENSET0_SPI0 //!< Configure SPI0 clock enable
80 #define CLKCTL_I2C0 CLKCTL_CLKENSET0_I2C0 //!< Configure I2C0 clock enable
81 #define CLKCTL_UART0 CLKCTL_CLKENSET0_UART0 //!< Configure UART0 clock enable
82 #define CLKCTL_LRFD CLKCTL_CLKENSET0_LRFD //!< Configure LRFD clock enable
83 #define CLKCTL_GPIO CLKCTL_CLKENSET0_GPIO //!< Configure GPIO clock enable
84
85 //*****************************************************************************
86 //
87 // API Functions and prototypes.
88 //
89 //*****************************************************************************
90
91 #ifdef DRIVERLIB_DEBUG
92 //*****************************************************************************
93 //
94 //! \internal
95 //!
96 //! \brief Checks clock control base address.
97 //!
98 //! This function determines if a clock controle base address is valid.
99 //!
100 //! \param base specifies the clock control base address.
101 //!
102 //! \return Returns \c true if the base address is valid and \c false
103 //! otherwise.
104 //
105 //*****************************************************************************
CLKCTLBaseValid(uint32_t base)106 static bool CLKCTLBaseValid(uint32_t base)
107 {
108 return (base == CLKCTL_BASE);
109 }
110 #endif
111
112 //*****************************************************************************
113 //
114 //! \brief Enables the clock for a peripheral.
115 //!
116 //! This function enables the clock for a peripheral.
117 //!
118 //! \param base specifies the clock control base address.
119 //! \param peripheral specifies the peripheral.
120 //! The parameter can be one of the following values:
121 //! - \ref CLKCTL_LGPT3
122 //! - \ref CLKCTL_LGPT2
123 //! - \ref CLKCTL_LGPT1
124 //! - \ref CLKCTL_LGPT0
125 //! - \ref CLKCTL_DMA
126 //! - \ref CLKCTL_LAES
127 //! - \ref CLKCTL_ADC0
128 //! - \ref CLKCTL_SPI0
129 //! - \ref CLKCTL_I2C0
130 //! - \ref CLKCTL_UART0
131 //! - \ref CLKCTL_LRFD
132 //! - \ref CLKCTL_GPIO
133 //!
134 //! \return None
135 //
136 //*****************************************************************************
CLKCTLEnable(uint32_t base,uint32_t peripheral)137 __STATIC_INLINE void CLKCTLEnable(uint32_t base, uint32_t peripheral)
138 {
139 // Check the arguments
140 ASSERT(CLKCTLBaseValid(base));
141
142 // Read-modify-write the set bit
143 HWREG(base + CLKCTL_O_CLKENSET0) |= peripheral;
144 }
145
146 //*****************************************************************************
147 //
148 //! \brief Disables the clock for a peripheral.
149 //!
150 //! This function disables the clock for a peripheral.
151 //!
152 //! \param base specifies the clock control base address.
153 //! \param peripheral specifies the peripheral.
154 //! The parameter can be one of the following values:
155 //! - \ref CLKCTL_LGPT3
156 //! - \ref CLKCTL_LGPT2
157 //! - \ref CLKCTL_LGPT1
158 //! - \ref CLKCTL_LGPT0
159 //! - \ref CLKCTL_DMA
160 //! - \ref CLKCTL_LAES
161 //! - \ref CLKCTL_ADC0
162 //! - \ref CLKCTL_SPI0
163 //! - \ref CLKCTL_I2C0
164 //! - \ref CLKCTL_UART0
165 //! - \ref CLKCTL_LRFD
166 //! - \ref CLKCTL_GPIO
167 //!
168 //! \return None
169 //
170 //*****************************************************************************
CLKCTLDisable(uint32_t base,uint32_t peripheral)171 __STATIC_INLINE void CLKCTLDisable(uint32_t base, uint32_t peripheral)
172 {
173 // Check the arguments
174 ASSERT(CLKCTLBaseValid(base));
175
176 // Read-modify-write the clear bit
177 HWREG(base + CLKCTL_O_CLKENCLR0) |= peripheral;
178 }
179
180 //*****************************************************************************
181 //
182 // Mark the end of the C bindings section for C++ compilers.
183 //
184 //*****************************************************************************
185 #ifdef __cplusplus
186 }
187 #endif
188
189 //*****************************************************************************
190 //
191 //! Close the Doxygen group.
192 //! @}
193 //! @}
194 //
195 //*****************************************************************************
196
197 #endif // __CLKCTL_H__
198
