1/*
2 * Copyright (c) 2018-2020 Nordic Semiconductor ASA
3 * Copyright (c) 2020 Circuit Dojo LLC
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7#include "circuitdojo_feather_nrf9160_common-pinctrl.dtsi"
8#include <zephyr/dt-bindings/input/input-event-codes.h>
9
10/ {
11	model = "Circuit Dojo nRF9160 Feather";
12	compatible = "circuitdojo,feather-nrf9160";
13
14	chosen {
15		zephyr,console = &uart0;
16		zephyr,shell-uart = &uart0;
17		zephyr,uart-mcumgr = &uart0;
18	};
19
20	leds {
21		compatible = "gpio-leds";
22		blue_led: led_0 {
23			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
24			label = "Blue LED (D7)";
25		};
26	};
27
28	pwmleds {
29		compatible = "pwm-leds";
30		pwm_led0: pwm_led_0 {
31			pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
32		};
33	};
34
35	buttons {
36		compatible = "gpio-keys";
37		button0: button_0 {
38			gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
39			label = "Switch 1";
40			zephyr,code = <INPUT_KEY_0>;
41		};
42	};
43
44	/* These aliases are provided for compatibility with samples */
45	aliases {
46		led0 = &blue_led;
47		bootloader-led0 = &blue_led;
48		pwm-led0 = &pwm_led0;
49		sw0 = &button0;
50		mcuboot-button0 = &button0;
51		mcuboot-led0 = &blue_led;
52		watchdog0 = &wdt0;
53		accel0 = &lis2dh;
54	};
55
56	/* Used for accessing other pins */
57	feather_header: feather_connector {
58		compatible = "adafruit-feather-header";
59		#gpio-cells = <2>;
60		gpio-map-mask = <0xffffffff 0xffffffc0>;
61		gpio-map-pass-thru = <0 0x3f>;
62		gpio-map = <12 0 &gpio0 26 0>,  /* SDA */
63				<13 0 &gpio0 27 0>,  /* SCL */
64				<14 0 &gpio0 29 0>,  /* PWM3 */
65				<15 0 &gpio0 30 0>,  /* PWM3 */
66				<16 0 &gpio0 0 0>,   /* PWM1 */
67				<17 0 &gpio0 1 0>,   /* PWM1 */
68				<18 0 &gpio0 2 0>,   /* PWM1 */
69				<19 0 &gpio0 3 0>,   /* PWM0 */
70				<20 0 &gpio0 4 0>,   /* PWM1 */
71				/* 11 not connected */
72				<10 0 &gpio0 24 0>,  /* TX */
73				<9 0 &gpio0 23 0>,   /* RX */
74				<8 0 &gpio0 22 0>,   /* MISO */
75				<7 0 &gpio0 21 0>,   /* MOSI */
76				<6 0 &gpio0 19 0>,   /* SCK */
77				<5 0 &gpio0 18 0>,   /* SS */
78				<4 0 &gpio0 17 0>,   /* ADC4 = AIN6 */
79				<3 0 &gpio0 16 0>,   /* ADC3 = AIN5 */
80				<2 0 &gpio0 15 0>,   /* ADC2 = AIN4 */
81				<1 0 &gpio0 14 0>,   /* ADC1 = AIN2 */
82				<0 0 &gpio0 13 0>;   /* ADC0 = AIN1 */
83	};
84
85	nrf-ps-en {
86		compatible = "regulator-fixed";
87		regulator-name = "nrf_ps_en";
88		enable-gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
89		regulator-boot-on;
90	};
91};
92
93&adc {
94	status = "okay";
95};
96
97&gpiote {
98	status = "okay";
99};
100
101&gpio0 {
102	status = "okay";
103};
104
105&uart0 {
106	status = "okay";
107	current-speed = <115200>;
108	pinctrl-0 = <&uart0_default>;
109	pinctrl-1 = <&uart0_sleep>;
110	pinctrl-names = "default", "sleep";
111};
112
113&uart1 {
114	current-speed = <115200>;
115	pinctrl-0 = <&uart1_default>;
116	pinctrl-1 = <&uart1_sleep>;
117	pinctrl-names = "default", "sleep";
118};
119
120&uart2 {
121	pinctrl-0 = <&uart2_default>;
122	pinctrl-1 = <&uart2_sleep>;
123	pinctrl-names = "default", "sleep";
124};
125
126&i2c1 {
127	compatible = "nordic,nrf-twim";
128	status = "okay";
129
130	pinctrl-0 = <&i2c1_default>;
131	pinctrl-1 = <&i2c1_sleep>;
132	pinctrl-names = "default", "sleep";
133	pcf85063a@51 {
134		compatible = "nxp,pcf85063a";
135		reg = <0x51>;
136	};
137
138	lis2dh: lis2dh@18 {
139		compatible = "st,lis2dh";
140		reg = <0x18>;
141		irq-gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
142		disconnect-sdo-sa0-pull-up;
143	};
144
145};
146
147&pwm0 {
148	status = "okay";
149	pinctrl-0 = <&pwm0_default>;
150	pinctrl-1 = <&pwm0_sleep>;
151	pinctrl-names = "default", "sleep";
152};
153
154&spi3 {
155	compatible = "nordic,nrf-spim";
156	status = "okay";
157	cs-gpios = < &gpio0 7 GPIO_ACTIVE_LOW >;
158	pinctrl-0 = <&spi3_default>;
159	pinctrl-1 = <&spi3_sleep>;
160	pinctrl-names = "default", "sleep";
161	w25q32jv: w25q32jv@0 {
162		compatible = "jedec,spi-nor";
163		reg = < 0 >;
164		spi-max-frequency = < 40000000 >;
165		wp-gpios = < &gpio0 8 GPIO_ACTIVE_LOW >;
166		hold-gpios = < &gpio0 10 GPIO_ACTIVE_LOW >;
167		size = < 0x2000000 >;
168		has-dpd;
169		t-enter-dpd = < 3000 >;
170		t-exit-dpd = < 30000 >;
171		jedec-id = [ ef 40 16  ];
172	};
173};
174
175/ {
176	vbatt {
177		compatible = "voltage-divider";
178		io-channels = <&adc 7>;
179		output-ohms = <100000>;
180		full-ohms = <(100000 + 100000)>;
181		power-gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
182	};
183};
184
185/* Include default memory partition configuration file */
186#include <common/nordic/nrf91xx_partition.dtsi>
187