1/*
2 * Copyright (c) 2022 Vaishnav Achath
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <zephyr/dt-bindings/pinctrl/cc13xx_cc26xx-pinctrl.h>
8
9&pinctrl {
10	/* UART0 */
11	uart0_tx_default: uart0_tx_default {
12		pinmux = <3 IOC_PORT_MCU_UART0_TX>;
13		bias-disable;
14	};
15	uart0_rx_default: uart0_rx_default {
16		pinmux = <2 IOC_PORT_MCU_UART0_RX>;
17		bias-disable;
18		input-enable;
19	};
20
21	/* I2C0 */
22	i2c0_scl_default: i2c0_scl_default {
23		pinmux = <4 IOC_PORT_MCU_I2C_MSSCL>;
24		bias-pull-up;
25		drive-open-drain;
26		input-enable;
27	};
28	i2c0_sda_default: i2c0_sda_default {
29		pinmux = <5 IOC_PORT_MCU_I2C_MSSDA>;
30		bias-pull-up;
31		drive-open-drain;
32		input-enable;
33	};
34	i2c0_scl_sleep: i2c0_scl_sleep {
35		pinmux = <4 IOC_PORT_GPIO>;
36		bias-disable;
37	};
38	i2c0_sda_sleep: i2c0_sda_sleep {
39		pinmux = <5 IOC_PORT_GPIO>;
40		bias-disable;
41	};
42
43	/* SPI0 */
44	spi0_sck_default: spi0_sck_default {
45		pinmux = <10 IOC_PORT_MCU_SSI0_CLK>;
46		bias-disable;
47	};
48	spi0_mosi_default: spi0_mosi_default {
49		pinmux = <9 IOC_PORT_MCU_SSI0_TX>;
50		bias-disable;
51	};
52	spi0_miso_default: spi0_miso_default {
53		pinmux = <8 IOC_PORT_MCU_SSI0_RX>;
54		bias-disable;
55		input-enable;
56	};
57	spi0_cs_default: spi0_cs_default {
58		pinmux = <11 IOC_PORT_MCU_SSI0_FSS>;
59		bias-disable;
60	};
61};
62