1/*
2 * Copyright (c) 2023 STMicroelectronics
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8#include <st/h5/stm32h573Xi.dtsi>
9#include <st/h5/stm32h573iikxq-pinctrl.dtsi>
10#include "arduino_r3_connector.dtsi"
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12#include <zephyr/dt-bindings/memory-attr/memory-attr.h>
13#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
14/ {
15	model = "STMicroelectronics STM32H573I DISCOVERY KIT board";
16	compatible = "st,stm32h573i-dk";
17
18	chosen {
19		zephyr,console = &usart1;
20		zephyr,shell-uart = &usart1;
21		zephyr,sram = &sram1;
22		zephyr,flash = &flash0;
23		zephyr,code-partition = &slot0_partition;
24		zephyr,canbus = &fdcan1;
25	};
26
27	leds {
28		compatible = "gpio-leds";
29		green_led_0: led_1 {
30			gpios = <&gpioi 9 GPIO_ACTIVE_LOW>;
31			label = "User LD1";
32		};
33		orange_led_0: led_2 {
34			gpios = <&gpioi 8 GPIO_ACTIVE_LOW>;
35			label = "User LD2";
36		};
37		red_led_0: led_3 {
38			gpios = <&gpiof 1 GPIO_ACTIVE_LOW>;
39			label = "User LD3";
40		};
41		blue_led_0: led_4 {
42			gpios = <&gpiof 4 GPIO_ACTIVE_LOW>;
43			label = "User LD4";
44		};
45	};
46
47	gpio_keys {
48		compatible = "gpio-keys";
49		user_button: button {
50			label = "User";
51			gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
52			zephyr,code = <INPUT_KEY_0>;
53		};
54	};
55
56	aliases {
57		led0 = &blue_led_0;
58		sw0 = &user_button;
59		watchdog0 = &iwdg;
60		die-temp0 = &die_temp;
61		die-temp1 = &digi_die_temp;
62		volt-sensor0 = &vref;
63		volt-sensor1 = &vbat;
64	};
65
66	ext_memory: memory@90000000 {
67		compatible = "zephyr,memory-region";
68		reg = <0x90000000 DT_SIZE_M(64)>;
69		zephyr,memory-region = "EXTMEM";
70		/* The ATTR_MPU_EXTMEM attribut causing a MPU FAULT */
71		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
72	};
73};
74
75&clk_hsi48 {
76	status = "okay";
77};
78
79&clk_lse {
80	status = "okay";
81};
82
83&clk_hse {
84	clock-frequency = <DT_FREQ_M(25)>;
85	hse-bypass; /* X3 is a 25MHz oscillator on PH0 */
86	status = "okay";
87};
88
89&pll {
90	div-m = <5>;
91	mul-n = <96>;
92	div-p = <2>;
93	div-q = <6>;
94	div-r = <2>;
95	clocks = <&clk_hse>;
96	status = "okay";
97};
98
99&rcc {
100	clocks = <&pll>;
101	clock-frequency = <DT_FREQ_M(240)>;
102	ahb-prescaler = <1>;
103	apb1-prescaler = <2>;
104	apb2-prescaler = <1>;
105	apb3-prescaler = <1>;
106};
107
108&i2c1 {
109	pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
110	pinctrl-names = "default";
111	clock-frequency = <I2C_BITRATE_FAST>;
112	status = "okay";
113};
114
115&i2c2 {
116	pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb11>;
117	pinctrl-names = "default";
118	clock-frequency = <I2C_BITRATE_FAST>;
119	status = "okay";
120};
121
122&usart1 {
123	pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
124	pinctrl-names = "default";
125	current-speed = <115200>;
126	status = "okay";
127};
128
129&timers2 {
130	st,prescaler = <10000>;
131	status = "okay";
132
133	pwm2: pwm {
134		status = "okay";
135		pinctrl-0 = <&tim2_ch4_pa3>;
136		pinctrl-names = "default";
137	};
138};
139
140&timers3 {
141	st,prescaler = <10000>;
142	status = "okay";
143
144	pwm3: pwm {
145		status = "okay";
146		pinctrl-0 = <&tim3_ch2_pb5>;
147		pinctrl-names = "default";
148	};
149};
150
151&aes {
152	status = "okay";
153};
154
155&rng {
156	status = "okay";
157};
158
159&mac {
160	status = "okay";
161	pinctrl-0 = <&eth_rxd0_pc4
162		     &eth_rxd1_pc5
163		     &eth_ref_clk_pa1
164		     &eth_crs_dv_pa7
165		     &eth_tx_en_pg11
166		     &eth_txd0_pg13
167		     &eth_txd1_pg12>;
168	pinctrl-names = "default";
169};
170
171&mdio {
172	status = "okay";
173	pinctrl-0 = <&eth_mdio_pa2 &eth_mdc_pc1>;
174	pinctrl-names = "default";
175
176	ethernet-phy@0 {
177		compatible = "ethernet-phy";
178		reg = <0x00>;
179		status = "okay";
180	};
181};
182
183&flash0 {
184	partitions {
185		compatible = "fixed-partitions";
186		#address-cells = <1>;
187		#size-cells = <1>;
188
189		/* Set the partitions with first MB to make use of the whole Bank1 */
190		boot_partition: partition@0 {
191			label = "mcuboot";
192			reg = <0x00000000 DT_SIZE_K(64)>;
193		};
194		slot0_partition: partition@10000 {
195			label = "image-0";
196			reg = <0x00010000 DT_SIZE_K(416)>;
197		};
198		slot1_partition: partition@78000 {
199			label = "image-1";
200			reg = <0x00078000 DT_SIZE_K(416)>;
201		};
202		scratch_partition: partition@e0000 {
203			label = "image-scratch";
204			reg = <0x000e0000 DT_SIZE_K(64)>;
205		};
206		/* Set 64KB of storage at the end of Bank1 */
207		storage_partition: partition@f0000 {
208			label = "storage";
209			reg = <0x000f0000 DT_SIZE_K(64)>;
210		};
211	};
212};
213
214&rtc {
215	clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00200000>,
216		 <&rcc STM32_SRC_LSE RTC_SEL(1)>;
217	status = "okay";
218};
219
220&iwdg {
221	status = "okay";
222};
223
224&gpdma1 {
225	status = "okay";
226};
227
228&gpdma2 {
229	status = "okay";
230};
231
232&dac1 {
233	/* only 2 output channels : out1 on pa4 or out2 on pa5 */
234	pinctrl-0 = <&dac1_out1_pa4>;  /* Arduino A1 */
235	pinctrl-names = "default";
236	status = "okay";
237};
238
239&adc1 {
240	clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000400>,
241		 <&rcc STM32_SRC_HCLK ADCDAC_SEL(0)>;
242	pinctrl-0 = <&adc1_inp6_pf12>; /* Arduino A5 */
243	pinctrl-names = "default";
244	st,adc-clock-source = "ASYNC";
245	st,adc-prescaler = <6>;
246	status = "okay";
247};
248
249&spi2 {
250	pinctrl-0 = <&spi2_nss_pa3 &spi2_sck_pi1
251		     &spi2_miso_pi2 &spi2_mosi_pb15>;
252	pinctrl-names = "default";
253	status = "okay";
254};
255
256&fdcan1 {
257	clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000200>,
258		<&rcc STM32_SRC_PLL1_Q FDCAN_SEL(1)>;
259	pinctrl-0 = <&fdcan1_rx_pa11 &fdcan1_tx_pa12>;
260	pinctrl-names = "default";
261	status = "okay";
262};
263
264&xspi1 {
265	pinctrl-0 = <&octospi1_io0_pb1 &octospi1_io1_pd12
266		     &octospi1_io2_pc2 &octospi1_io3_pd13
267		     &octospi1_io4_ph2 &octospi1_io5_ph3
268		     &octospi1_io6_pg9 &octospi1_io7_pc0
269		     &octospi1_clk_pf10 &octospi1_ncs_pg6
270		     &octospi1_dqs_pb2>;
271	pinctrl-names = "default";
272
273	status = "okay";
274
275	mx25lm51245: ospi-nor-flash@90000000 {
276		compatible = "st,stm32-xspi-nor";
277		reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
278		ospi-max-frequency = <DT_FREQ_M(50)>;
279		spi-bus-width = <XSPI_OCTO_MODE>;
280		data-rate = <XSPI_DTR_TRANSFER>;
281		four-byte-opcodes;
282		status = "okay";
283
284		partitions {
285			   compatible = "fixed-partitions";
286			   #address-cells = <1>;
287			   #size-cells = <1>;
288
289			   partition@0 {
290			       label = "nor";
291			       reg = <0x00000000 DT_SIZE_M(64)>;
292			   };
293		};
294	};
295};
296
297&sdmmc1 {
298	pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9
299		     &sdmmc1_d2_pc10 &sdmmc1_d3_pc11
300		     &sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>;
301	pinctrl-names = "default";
302	cd-gpios = <&gpioh 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
303	status = "okay";
304};
305
306
307zephyr_udc0: &usb {
308	pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
309	pinctrl-names = "default";
310	status = "okay";
311};
312
313&die_temp {
314	status = "okay";
315};
316
317&digi_die_temp {
318	status = "okay";
319};
320
321&vref {
322	status = "okay";
323};
324
325&vbat {
326	status = "okay";
327};
328