1/*
2 * Copyright (c) 2019 Laird Connectivity
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8#include <nordic/nrf52840_qiaa.dtsi>
9#include "pinnacle_100_dvk-pinctrl.dtsi"
10#include <zephyr/dt-bindings/input/input-event-codes.h>
11
12/ {
13	model = "Pinnacle 100 Dev Kit";
14	compatible = "lairdconnect,pinnacle-100-dvk";
15
16	chosen {
17		zephyr,console = &uart0;
18		zephyr,shell-uart = &uart0;
19		zephyr,uart-mcumgr = &uart0;
20		zephyr,bt-mon-uart = &uart0;
21		zephyr,sram = &sram0;
22		zephyr,flash = &flash0;
23		zephyr,code-partition = &slot0_partition;
24		zephyr,ieee802154 = &ieee802154;
25	};
26
27	leds {
28		compatible = "gpio-leds";
29		led1: led_1 {
30			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
31			label = "Blue LED 1";
32		};
33		led2: led_2 {
34			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
35			label = "Green LED 2";
36		};
37		led3: led_3 {
38			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
39			label = "Red LED 3";
40		};
41		led4: led_4 {
42			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
43			label = "Green LED 4";
44		};
45	};
46
47	buttons {
48		compatible = "gpio-keys";
49		button1: button_1 {
50			gpios = <&gpio0 31 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
51			label = "Push button switch 1";
52			zephyr,code = <INPUT_KEY_0>;
53		};
54		button2: button_2 {
55			gpios = <&gpio0 3 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
56			label = "Push button switch 2";
57			zephyr,code = <INPUT_KEY_1>;
58		};
59		button3: button_3 {
60			gpios = <&gpio0 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
61			label = "Push button switch 3";
62			zephyr,code = <INPUT_KEY_2>;
63		};
64		button4: button_4 {
65			gpios = <&gpio0 2 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
66			label = "Push button switch 4";
67			zephyr,code = <INPUT_KEY_3>;
68		};
69	};
70
71	/* These aliases are provided for compatibility with samples */
72	aliases {
73		led0 = &led1;
74		led1 = &led2;
75		led2 = &led3;
76		led3 = &led4;
77		sw0 = &button1;
78		sw1 = &button2;
79		sw2 = &button3;
80		sw3 = &button4;
81		mcuboot-button0 = &button1;
82		mcuboot-led0 = &led1;
83		watchdog0 = &wdt0;
84	};
85};
86
87&adc {
88	status ="okay";
89};
90
91&uicr {
92	gpio-as-nreset;
93};
94
95&gpiote {
96	status ="okay";
97};
98
99&gpio0 {
100	status ="okay";
101};
102
103&gpio1 {
104	status ="okay";
105};
106
107&uart0 {
108	compatible = "nordic,nrf-uart";
109	status = "okay";
110	current-speed = <115200>;
111	pinctrl-0 = <&uart0_default>;
112	pinctrl-1 = <&uart0_sleep>;
113	pinctrl-names = "default", "sleep";
114};
115
116&uart1 {
117	compatible = "nordic,nrf-uarte";
118	status = "okay";
119	current-speed = <115200>;
120	hw-flow-control;
121	pinctrl-0 = <&uart1_default>;
122	pinctrl-1 = <&uart1_sleep>;
123	pinctrl-names = "default", "sleep";
124	hl7800 {
125		compatible = "swir,hl7800";
126		status = "okay";
127		mdm-reset-gpios = <&gpio1 15 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
128		mdm-wake-gpios = <&gpio1 13 (GPIO_OPEN_SOURCE | GPIO_ACTIVE_HIGH)>;
129		mdm-pwr-on-gpios = <&gpio1 2 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
130		mdm-fast-shutd-gpios = <&gpio1 14 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
131		mdm-vgpio-gpios = <&gpio1 11 0>;
132		mdm-uart-dsr-gpios = <&gpio0 25 0>;
133		mdm-uart-cts-gpios = <&gpio0 15 0>;
134		mdm-gpio6-gpios = <&gpio1 12 0>;
135	};
136};
137
138&i2c0 {
139	compatible = "nordic,nrf-twi";
140	status = "okay";
141
142	pinctrl-0 = <&i2c0_default>;
143	pinctrl-1 = <&i2c0_sleep>;
144	pinctrl-names = "default", "sleep";
145	bme680@76 {
146		compatible = "bosch,bme680";
147		status = "okay";
148		reg = <0x76>;
149	};
150};
151
152&spi0 {
153	compatible = "nordic,nrf-spi";
154	/* Cannot be used together with i2c0. */
155	/* status = "okay"; */
156	pinctrl-0 = <&spi0_default>;
157	pinctrl-1 = <&spi0_sleep>;
158	pinctrl-names = "default", "sleep";
159};
160
161&spi1 {
162	compatible = "nordic,nrf-spi";
163	status = "okay";
164	pinctrl-0 = <&spi1_default>;
165	pinctrl-1 = <&spi1_sleep>;
166	pinctrl-names = "default", "sleep";
167};
168
169&qspi {
170	status = "okay";
171	pinctrl-0 = <&qspi_default>;
172	pinctrl-1 = <&qspi_sleep>;
173	pinctrl-names = "default", "sleep";
174	mx25r64: mx25r6435f@0 {
175		compatible = "nordic,qspi-nor";
176		reg = <0>;
177		writeoc = "pp4io";
178		readoc = "read4io";
179		sck-frequency = <8000000>;
180		jedec-id = [c2 28 17];
181		size = <67108864>;
182		has-dpd;
183		t-enter-dpd = <10000>;
184		t-exit-dpd = <35000>;
185	};
186};
187
188&ieee802154 {
189	status = "okay";
190};
191
192&flash0 {
193	partitions {
194		compatible = "fixed-partitions";
195		#address-cells = <1>;
196		#size-cells = <1>;
197
198		/* 96K */
199		boot_partition: partition@0 {
200			label = "mcuboot";
201			reg = <0x00000000 0x00018000>;
202		};
203		/* 896K */
204		slot0_partition: partition@18000 {
205			label = "image-0";
206			reg = <0x00018000 0x000E0000>;
207		};
208
209		/*
210		 * The flash starting at 0x000f8000 and ending at
211		 * 0x000fffff is reserved for use by the application.
212		 */
213
214		/*
215		 * Storage partition will be used by FCB/NVS
216		 * if enabled. 32K
217		 */
218		storage_partition: partition@f8000 {
219			label = "storage";
220			reg = <0x000f8000 0x00008000>;
221		};
222	};
223};
224
225&mx25r64 {
226	partitions {
227		compatible = "fixed-partitions";
228		#address-cells = <1>;
229		#size-cells = <1>;
230
231		/* 896K */
232		slot1_partition: partition@0 {
233			label = "image-1";
234			reg = <0x00000000 0x000E0000>;
235		};
236		/* 128K */
237		scratch_partition: partition@E0000 {
238			label = "image-scratch";
239			reg = <0x000E0000 0x00020000>;
240		};
241		/* 7MB */
242		lfs_partition: partition@100000 {
243			label = "lfs_storage";
244			reg = <0x00100000 0x00700000>;
245		};
246	};
247};
248
249zephyr_udc0: &usbd {
250	compatible = "nordic,nrf-usbd";
251	status = "okay";
252};
253