1 /** 2 * \file bn_mul.h 3 * 4 * \brief Multi-precision integer library 5 */ 6 /* 7 * Copyright The Mbed TLS Contributors 8 * SPDX-License-Identifier: Apache-2.0 9 * 10 * Licensed under the Apache License, Version 2.0 (the "License"); you may 11 * not use this file except in compliance with the License. 12 * You may obtain a copy of the License at 13 * 14 * http://www.apache.org/licenses/LICENSE-2.0 15 * 16 * Unless required by applicable law or agreed to in writing, software 17 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT 18 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 19 * See the License for the specific language governing permissions and 20 * limitations under the License. 21 */ 22 /* 23 * Multiply source vector [s] with b, add result 24 * to destination vector [d] and set carry c. 25 * 26 * Currently supports: 27 * 28 * . IA-32 (386+) . AMD64 / EM64T 29 * . IA-32 (SSE2) . Motorola 68000 30 * . PowerPC, 32-bit . MicroBlaze 31 * . PowerPC, 64-bit . TriCore 32 * . SPARC v8 . ARM v3+ 33 * . Alpha . MIPS32 34 * . C, longlong . C, generic 35 */ 36 #ifndef MBEDTLS_BN_MUL_H 37 #define MBEDTLS_BN_MUL_H 38 39 #include "mbedtls/build_info.h" 40 41 #include "mbedtls/bignum.h" 42 43 44 /* 45 * Conversion macros for embedded constants: 46 * build lists of mbedtls_mpi_uint's from lists of unsigned char's grouped by 8, 4 or 2 47 */ 48 #if defined(MBEDTLS_HAVE_INT32) 49 50 #define MBEDTLS_BYTES_TO_T_UINT_4(a, b, c, d) \ 51 ((mbedtls_mpi_uint) (a) << 0) | \ 52 ((mbedtls_mpi_uint) (b) << 8) | \ 53 ((mbedtls_mpi_uint) (c) << 16) | \ 54 ((mbedtls_mpi_uint) (d) << 24) 55 56 #define MBEDTLS_BYTES_TO_T_UINT_2(a, b) \ 57 MBEDTLS_BYTES_TO_T_UINT_4(a, b, 0, 0) 58 59 #define MBEDTLS_BYTES_TO_T_UINT_8(a, b, c, d, e, f, g, h) \ 60 MBEDTLS_BYTES_TO_T_UINT_4(a, b, c, d), \ 61 MBEDTLS_BYTES_TO_T_UINT_4(e, f, g, h) 62 63 #else /* 64-bits */ 64 65 #define MBEDTLS_BYTES_TO_T_UINT_8(a, b, c, d, e, f, g, h) \ 66 ((mbedtls_mpi_uint) (a) << 0) | \ 67 ((mbedtls_mpi_uint) (b) << 8) | \ 68 ((mbedtls_mpi_uint) (c) << 16) | \ 69 ((mbedtls_mpi_uint) (d) << 24) | \ 70 ((mbedtls_mpi_uint) (e) << 32) | \ 71 ((mbedtls_mpi_uint) (f) << 40) | \ 72 ((mbedtls_mpi_uint) (g) << 48) | \ 73 ((mbedtls_mpi_uint) (h) << 56) 74 75 #define MBEDTLS_BYTES_TO_T_UINT_4(a, b, c, d) \ 76 MBEDTLS_BYTES_TO_T_UINT_8(a, b, c, d, 0, 0, 0, 0) 77 78 #define MBEDTLS_BYTES_TO_T_UINT_2(a, b) \ 79 MBEDTLS_BYTES_TO_T_UINT_8(a, b, 0, 0, 0, 0, 0, 0) 80 81 #endif /* bits in mbedtls_mpi_uint */ 82 83 /* *INDENT-OFF* */ 84 #if defined(MBEDTLS_HAVE_ASM) 85 86 /* armcc5 --gnu defines __GNUC__ but doesn't support GNU's extended asm */ 87 #if defined(__GNUC__) && \ 88 ( !defined(__ARMCC_VERSION) || __ARMCC_VERSION >= 6000000 ) 89 90 /* 91 * GCC < 5.0 treated the x86 ebx (which is used for the GOT) as a 92 * fixed reserved register when building as PIC, leading to errors 93 * like: bn_mul.h:46:13: error: PIC register clobbered by 'ebx' in 'asm' 94 * 95 * This is fixed by an improved register allocator in GCC 5+. From the 96 * release notes: 97 * Register allocation improvements: Reuse of the PIC hard register, 98 * instead of using a fixed register, was implemented on x86/x86-64 99 * targets. This improves generated PIC code performance as more hard 100 * registers can be used. 101 */ 102 #if defined(__GNUC__) && __GNUC__ < 5 && defined(__PIC__) 103 #define MULADDC_CANNOT_USE_EBX 104 #endif 105 106 /* 107 * Disable use of the i386 assembly code below if option -O0, to disable all 108 * compiler optimisations, is passed, detected with __OPTIMIZE__ 109 * This is done as the number of registers used in the assembly code doesn't 110 * work with the -O0 option. 111 */ 112 #if defined(__i386__) && defined(__OPTIMIZE__) && !defined(MULADDC_CANNOT_USE_EBX) 113 114 #define MULADDC_X1_INIT \ 115 { mbedtls_mpi_uint t; \ 116 asm( \ 117 "movl %%ebx, %0 \n\t" \ 118 "movl %5, %%esi \n\t" \ 119 "movl %6, %%edi \n\t" \ 120 "movl %7, %%ecx \n\t" \ 121 "movl %8, %%ebx \n\t" 122 123 #define MULADDC_X1_CORE \ 124 "lodsl \n\t" \ 125 "mull %%ebx \n\t" \ 126 "addl %%ecx, %%eax \n\t" \ 127 "adcl $0, %%edx \n\t" \ 128 "addl (%%edi), %%eax \n\t" \ 129 "adcl $0, %%edx \n\t" \ 130 "movl %%edx, %%ecx \n\t" \ 131 "stosl \n\t" 132 133 #define MULADDC_X1_STOP \ 134 "movl %4, %%ebx \n\t" \ 135 "movl %%ecx, %1 \n\t" \ 136 "movl %%edi, %2 \n\t" \ 137 "movl %%esi, %3 \n\t" \ 138 : "=m" (t), "=m" (c), "=m" (d), "=m" (s) \ 139 : "m" (t), "m" (s), "m" (d), "m" (c), "m" (b) \ 140 : "eax", "ebx", "ecx", "edx", "esi", "edi" \ 141 ); } 142 143 #if defined(MBEDTLS_HAVE_SSE2) 144 145 #define MULADDC_X8_INIT MULADDC_X1_INIT 146 147 #define MULADDC_X8_CORE \ 148 "movd %%ecx, %%mm1 \n\t" \ 149 "movd %%ebx, %%mm0 \n\t" \ 150 "movd (%%edi), %%mm3 \n\t" \ 151 "paddq %%mm3, %%mm1 \n\t" \ 152 "movd (%%esi), %%mm2 \n\t" \ 153 "pmuludq %%mm0, %%mm2 \n\t" \ 154 "movd 4(%%esi), %%mm4 \n\t" \ 155 "pmuludq %%mm0, %%mm4 \n\t" \ 156 "movd 8(%%esi), %%mm6 \n\t" \ 157 "pmuludq %%mm0, %%mm6 \n\t" \ 158 "movd 12(%%esi), %%mm7 \n\t" \ 159 "pmuludq %%mm0, %%mm7 \n\t" \ 160 "paddq %%mm2, %%mm1 \n\t" \ 161 "movd 4(%%edi), %%mm3 \n\t" \ 162 "paddq %%mm4, %%mm3 \n\t" \ 163 "movd 8(%%edi), %%mm5 \n\t" \ 164 "paddq %%mm6, %%mm5 \n\t" \ 165 "movd 12(%%edi), %%mm4 \n\t" \ 166 "paddq %%mm4, %%mm7 \n\t" \ 167 "movd %%mm1, (%%edi) \n\t" \ 168 "movd 16(%%esi), %%mm2 \n\t" \ 169 "pmuludq %%mm0, %%mm2 \n\t" \ 170 "psrlq $32, %%mm1 \n\t" \ 171 "movd 20(%%esi), %%mm4 \n\t" \ 172 "pmuludq %%mm0, %%mm4 \n\t" \ 173 "paddq %%mm3, %%mm1 \n\t" \ 174 "movd 24(%%esi), %%mm6 \n\t" \ 175 "pmuludq %%mm0, %%mm6 \n\t" \ 176 "movd %%mm1, 4(%%edi) \n\t" \ 177 "psrlq $32, %%mm1 \n\t" \ 178 "movd 28(%%esi), %%mm3 \n\t" \ 179 "pmuludq %%mm0, %%mm3 \n\t" \ 180 "paddq %%mm5, %%mm1 \n\t" \ 181 "movd 16(%%edi), %%mm5 \n\t" \ 182 "paddq %%mm5, %%mm2 \n\t" \ 183 "movd %%mm1, 8(%%edi) \n\t" \ 184 "psrlq $32, %%mm1 \n\t" \ 185 "paddq %%mm7, %%mm1 \n\t" \ 186 "movd 20(%%edi), %%mm5 \n\t" \ 187 "paddq %%mm5, %%mm4 \n\t" \ 188 "movd %%mm1, 12(%%edi) \n\t" \ 189 "psrlq $32, %%mm1 \n\t" \ 190 "paddq %%mm2, %%mm1 \n\t" \ 191 "movd 24(%%edi), %%mm5 \n\t" \ 192 "paddq %%mm5, %%mm6 \n\t" \ 193 "movd %%mm1, 16(%%edi) \n\t" \ 194 "psrlq $32, %%mm1 \n\t" \ 195 "paddq %%mm4, %%mm1 \n\t" \ 196 "movd 28(%%edi), %%mm5 \n\t" \ 197 "paddq %%mm5, %%mm3 \n\t" \ 198 "movd %%mm1, 20(%%edi) \n\t" \ 199 "psrlq $32, %%mm1 \n\t" \ 200 "paddq %%mm6, %%mm1 \n\t" \ 201 "movd %%mm1, 24(%%edi) \n\t" \ 202 "psrlq $32, %%mm1 \n\t" \ 203 "paddq %%mm3, %%mm1 \n\t" \ 204 "movd %%mm1, 28(%%edi) \n\t" \ 205 "addl $32, %%edi \n\t" \ 206 "addl $32, %%esi \n\t" \ 207 "psrlq $32, %%mm1 \n\t" \ 208 "movd %%mm1, %%ecx \n\t" 209 210 #define MULADDC_X8_STOP \ 211 "emms \n\t" \ 212 "movl %4, %%ebx \n\t" \ 213 "movl %%ecx, %1 \n\t" \ 214 "movl %%edi, %2 \n\t" \ 215 "movl %%esi, %3 \n\t" \ 216 : "=m" (t), "=m" (c), "=m" (d), "=m" (s) \ 217 : "m" (t), "m" (s), "m" (d), "m" (c), "m" (b) \ 218 : "eax", "ebx", "ecx", "edx", "esi", "edi" \ 219 ); } \ 220 221 #endif /* SSE2 */ 222 223 #endif /* i386 */ 224 225 #if defined(__amd64__) || defined (__x86_64__) 226 227 #define MULADDC_X1_INIT \ 228 asm( \ 229 "xorq %%r8, %%r8\n" 230 231 #define MULADDC_X1_CORE \ 232 "movq (%%rsi), %%rax\n" \ 233 "mulq %%rbx\n" \ 234 "addq $8, %%rsi\n" \ 235 "addq %%rcx, %%rax\n" \ 236 "movq %%r8, %%rcx\n" \ 237 "adcq $0, %%rdx\n" \ 238 "nop \n" \ 239 "addq %%rax, (%%rdi)\n" \ 240 "adcq %%rdx, %%rcx\n" \ 241 "addq $8, %%rdi\n" 242 243 #define MULADDC_X1_STOP \ 244 : "+c" (c), "+D" (d), "+S" (s), "+m" (*(uint64_t (*)[16]) d) \ 245 : "b" (b), "m" (*(const uint64_t (*)[16]) s) \ 246 : "rax", "rdx", "r8" \ 247 ); 248 249 #endif /* AMD64 */ 250 251 #if defined(__aarch64__) 252 253 #define MULADDC_X1_INIT \ 254 asm( 255 256 #define MULADDC_X1_CORE \ 257 "ldr x4, [%2], #8 \n\t" \ 258 "ldr x5, [%1] \n\t" \ 259 "mul x6, x4, %4 \n\t" \ 260 "umulh x7, x4, %4 \n\t" \ 261 "adds x5, x5, x6 \n\t" \ 262 "adc x7, x7, xzr \n\t" \ 263 "adds x5, x5, %0 \n\t" \ 264 "adc %0, x7, xzr \n\t" \ 265 "str x5, [%1], #8 \n\t" 266 267 #define MULADDC_X1_STOP \ 268 : "+r" (c), "+r" (d), "+r" (s), "+m" (*(uint64_t (*)[16]) d) \ 269 : "r" (b), "m" (*(const uint64_t (*)[16]) s) \ 270 : "x4", "x5", "x6", "x7", "cc" \ 271 ); 272 273 #endif /* Aarch64 */ 274 275 #if defined(__mc68020__) || defined(__mcpu32__) 276 277 #define MULADDC_X1_INIT \ 278 asm( \ 279 "movl %3, %%a2 \n\t" \ 280 "movl %4, %%a3 \n\t" \ 281 "movl %5, %%d3 \n\t" \ 282 "movl %6, %%d2 \n\t" \ 283 "moveq #0, %%d0 \n\t" 284 285 #define MULADDC_X1_CORE \ 286 "movel %%a2@+, %%d1 \n\t" \ 287 "mulul %%d2, %%d4:%%d1 \n\t" \ 288 "addl %%d3, %%d1 \n\t" \ 289 "addxl %%d0, %%d4 \n\t" \ 290 "moveq #0, %%d3 \n\t" \ 291 "addl %%d1, %%a3@+ \n\t" \ 292 "addxl %%d4, %%d3 \n\t" 293 294 #define MULADDC_X1_STOP \ 295 "movl %%d3, %0 \n\t" \ 296 "movl %%a3, %1 \n\t" \ 297 "movl %%a2, %2 \n\t" \ 298 : "=m" (c), "=m" (d), "=m" (s) \ 299 : "m" (s), "m" (d), "m" (c), "m" (b) \ 300 : "d0", "d1", "d2", "d3", "d4", "a2", "a3" \ 301 ); 302 303 #define MULADDC_X8_INIT MULADDC_X1_INIT 304 305 #define MULADDC_X8_CORE \ 306 "movel %%a2@+, %%d1 \n\t" \ 307 "mulul %%d2, %%d4:%%d1 \n\t" \ 308 "addxl %%d3, %%d1 \n\t" \ 309 "addxl %%d0, %%d4 \n\t" \ 310 "addl %%d1, %%a3@+ \n\t" \ 311 "movel %%a2@+, %%d1 \n\t" \ 312 "mulul %%d2, %%d3:%%d1 \n\t" \ 313 "addxl %%d4, %%d1 \n\t" \ 314 "addxl %%d0, %%d3 \n\t" \ 315 "addl %%d1, %%a3@+ \n\t" \ 316 "movel %%a2@+, %%d1 \n\t" \ 317 "mulul %%d2, %%d4:%%d1 \n\t" \ 318 "addxl %%d3, %%d1 \n\t" \ 319 "addxl %%d0, %%d4 \n\t" \ 320 "addl %%d1, %%a3@+ \n\t" \ 321 "movel %%a2@+, %%d1 \n\t" \ 322 "mulul %%d2, %%d3:%%d1 \n\t" \ 323 "addxl %%d4, %%d1 \n\t" \ 324 "addxl %%d0, %%d3 \n\t" \ 325 "addl %%d1, %%a3@+ \n\t" \ 326 "movel %%a2@+, %%d1 \n\t" \ 327 "mulul %%d2, %%d4:%%d1 \n\t" \ 328 "addxl %%d3, %%d1 \n\t" \ 329 "addxl %%d0, %%d4 \n\t" \ 330 "addl %%d1, %%a3@+ \n\t" \ 331 "movel %%a2@+, %%d1 \n\t" \ 332 "mulul %%d2, %%d3:%%d1 \n\t" \ 333 "addxl %%d4, %%d1 \n\t" \ 334 "addxl %%d0, %%d3 \n\t" \ 335 "addl %%d1, %%a3@+ \n\t" \ 336 "movel %%a2@+, %%d1 \n\t" \ 337 "mulul %%d2, %%d4:%%d1 \n\t" \ 338 "addxl %%d3, %%d1 \n\t" \ 339 "addxl %%d0, %%d4 \n\t" \ 340 "addl %%d1, %%a3@+ \n\t" \ 341 "movel %%a2@+, %%d1 \n\t" \ 342 "mulul %%d2, %%d3:%%d1 \n\t" \ 343 "addxl %%d4, %%d1 \n\t" \ 344 "addxl %%d0, %%d3 \n\t" \ 345 "addl %%d1, %%a3@+ \n\t" \ 346 "addxl %%d0, %%d3 \n\t" 347 348 #define MULADDC_X8_STOP MULADDC_X1_STOP 349 350 #endif /* MC68000 */ 351 352 #if defined(__powerpc64__) || defined(__ppc64__) 353 354 #if defined(__MACH__) && defined(__APPLE__) 355 356 #define MULADDC_X1_INIT \ 357 asm( \ 358 "ld r3, %3 \n\t" \ 359 "ld r4, %4 \n\t" \ 360 "ld r5, %5 \n\t" \ 361 "ld r6, %6 \n\t" \ 362 "addi r3, r3, -8 \n\t" \ 363 "addi r4, r4, -8 \n\t" \ 364 "addic r5, r5, 0 \n\t" 365 366 #define MULADDC_X1_CORE \ 367 "ldu r7, 8(r3) \n\t" \ 368 "mulld r8, r7, r6 \n\t" \ 369 "mulhdu r9, r7, r6 \n\t" \ 370 "adde r8, r8, r5 \n\t" \ 371 "ld r7, 8(r4) \n\t" \ 372 "addze r5, r9 \n\t" \ 373 "addc r8, r8, r7 \n\t" \ 374 "stdu r8, 8(r4) \n\t" 375 376 #define MULADDC_X1_STOP \ 377 "addze r5, r5 \n\t" \ 378 "addi r4, r4, 8 \n\t" \ 379 "addi r3, r3, 8 \n\t" \ 380 "std r5, %0 \n\t" \ 381 "std r4, %1 \n\t" \ 382 "std r3, %2 \n\t" \ 383 : "=m" (c), "=m" (d), "=m" (s) \ 384 : "m" (s), "m" (d), "m" (c), "m" (b) \ 385 : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \ 386 ); 387 388 389 #else /* __MACH__ && __APPLE__ */ 390 391 #define MULADDC_X1_INIT \ 392 asm( \ 393 "ld %%r3, %3 \n\t" \ 394 "ld %%r4, %4 \n\t" \ 395 "ld %%r5, %5 \n\t" \ 396 "ld %%r6, %6 \n\t" \ 397 "addi %%r3, %%r3, -8 \n\t" \ 398 "addi %%r4, %%r4, -8 \n\t" \ 399 "addic %%r5, %%r5, 0 \n\t" 400 401 #define MULADDC_X1_CORE \ 402 "ldu %%r7, 8(%%r3) \n\t" \ 403 "mulld %%r8, %%r7, %%r6 \n\t" \ 404 "mulhdu %%r9, %%r7, %%r6 \n\t" \ 405 "adde %%r8, %%r8, %%r5 \n\t" \ 406 "ld %%r7, 8(%%r4) \n\t" \ 407 "addze %%r5, %%r9 \n\t" \ 408 "addc %%r8, %%r8, %%r7 \n\t" \ 409 "stdu %%r8, 8(%%r4) \n\t" 410 411 #define MULADDC_X1_STOP \ 412 "addze %%r5, %%r5 \n\t" \ 413 "addi %%r4, %%r4, 8 \n\t" \ 414 "addi %%r3, %%r3, 8 \n\t" \ 415 "std %%r5, %0 \n\t" \ 416 "std %%r4, %1 \n\t" \ 417 "std %%r3, %2 \n\t" \ 418 : "=m" (c), "=m" (d), "=m" (s) \ 419 : "m" (s), "m" (d), "m" (c), "m" (b) \ 420 : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \ 421 ); 422 423 #endif /* __MACH__ && __APPLE__ */ 424 425 #elif defined(__powerpc__) || defined(__ppc__) /* end PPC64/begin PPC32 */ 426 427 #if defined(__MACH__) && defined(__APPLE__) 428 429 #define MULADDC_X1_INIT \ 430 asm( \ 431 "lwz r3, %3 \n\t" \ 432 "lwz r4, %4 \n\t" \ 433 "lwz r5, %5 \n\t" \ 434 "lwz r6, %6 \n\t" \ 435 "addi r3, r3, -4 \n\t" \ 436 "addi r4, r4, -4 \n\t" \ 437 "addic r5, r5, 0 \n\t" 438 439 #define MULADDC_X1_CORE \ 440 "lwzu r7, 4(r3) \n\t" \ 441 "mullw r8, r7, r6 \n\t" \ 442 "mulhwu r9, r7, r6 \n\t" \ 443 "adde r8, r8, r5 \n\t" \ 444 "lwz r7, 4(r4) \n\t" \ 445 "addze r5, r9 \n\t" \ 446 "addc r8, r8, r7 \n\t" \ 447 "stwu r8, 4(r4) \n\t" 448 449 #define MULADDC_X1_STOP \ 450 "addze r5, r5 \n\t" \ 451 "addi r4, r4, 4 \n\t" \ 452 "addi r3, r3, 4 \n\t" \ 453 "stw r5, %0 \n\t" \ 454 "stw r4, %1 \n\t" \ 455 "stw r3, %2 \n\t" \ 456 : "=m" (c), "=m" (d), "=m" (s) \ 457 : "m" (s), "m" (d), "m" (c), "m" (b) \ 458 : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \ 459 ); 460 461 #else /* __MACH__ && __APPLE__ */ 462 463 #define MULADDC_X1_INIT \ 464 asm( \ 465 "lwz %%r3, %3 \n\t" \ 466 "lwz %%r4, %4 \n\t" \ 467 "lwz %%r5, %5 \n\t" \ 468 "lwz %%r6, %6 \n\t" \ 469 "addi %%r3, %%r3, -4 \n\t" \ 470 "addi %%r4, %%r4, -4 \n\t" \ 471 "addic %%r5, %%r5, 0 \n\t" 472 473 #define MULADDC_X1_CORE \ 474 "lwzu %%r7, 4(%%r3) \n\t" \ 475 "mullw %%r8, %%r7, %%r6 \n\t" \ 476 "mulhwu %%r9, %%r7, %%r6 \n\t" \ 477 "adde %%r8, %%r8, %%r5 \n\t" \ 478 "lwz %%r7, 4(%%r4) \n\t" \ 479 "addze %%r5, %%r9 \n\t" \ 480 "addc %%r8, %%r8, %%r7 \n\t" \ 481 "stwu %%r8, 4(%%r4) \n\t" 482 483 #define MULADDC_X1_STOP \ 484 "addze %%r5, %%r5 \n\t" \ 485 "addi %%r4, %%r4, 4 \n\t" \ 486 "addi %%r3, %%r3, 4 \n\t" \ 487 "stw %%r5, %0 \n\t" \ 488 "stw %%r4, %1 \n\t" \ 489 "stw %%r3, %2 \n\t" \ 490 : "=m" (c), "=m" (d), "=m" (s) \ 491 : "m" (s), "m" (d), "m" (c), "m" (b) \ 492 : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \ 493 ); 494 495 #endif /* __MACH__ && __APPLE__ */ 496 497 #endif /* PPC32 */ 498 499 /* 500 * The Sparc(64) assembly is reported to be broken. 501 * Disable it for now, until we're able to fix it. 502 */ 503 #if 0 && defined(__sparc__) 504 #if defined(__sparc64__) 505 506 #define MULADDC_X1_INIT \ 507 asm( \ 508 "ldx %3, %%o0 \n\t" \ 509 "ldx %4, %%o1 \n\t" \ 510 "ld %5, %%o2 \n\t" \ 511 "ld %6, %%o3 \n\t" 512 513 #define MULADDC_X1_CORE \ 514 "ld [%%o0], %%o4 \n\t" \ 515 "inc 4, %%o0 \n\t" \ 516 "ld [%%o1], %%o5 \n\t" \ 517 "umul %%o3, %%o4, %%o4 \n\t" \ 518 "addcc %%o4, %%o2, %%o4 \n\t" \ 519 "rd %%y, %%g1 \n\t" \ 520 "addx %%g1, 0, %%g1 \n\t" \ 521 "addcc %%o4, %%o5, %%o4 \n\t" \ 522 "st %%o4, [%%o1] \n\t" \ 523 "addx %%g1, 0, %%o2 \n\t" \ 524 "inc 4, %%o1 \n\t" 525 526 #define MULADDC_X1_STOP \ 527 "st %%o2, %0 \n\t" \ 528 "stx %%o1, %1 \n\t" \ 529 "stx %%o0, %2 \n\t" \ 530 : "=m" (c), "=m" (d), "=m" (s) \ 531 : "m" (s), "m" (d), "m" (c), "m" (b) \ 532 : "g1", "o0", "o1", "o2", "o3", "o4", \ 533 "o5" \ 534 ); 535 536 #else /* __sparc64__ */ 537 538 #define MULADDC_X1_INIT \ 539 asm( \ 540 "ld %3, %%o0 \n\t" \ 541 "ld %4, %%o1 \n\t" \ 542 "ld %5, %%o2 \n\t" \ 543 "ld %6, %%o3 \n\t" 544 545 #define MULADDC_X1_CORE \ 546 "ld [%%o0], %%o4 \n\t" \ 547 "inc 4, %%o0 \n\t" \ 548 "ld [%%o1], %%o5 \n\t" \ 549 "umul %%o3, %%o4, %%o4 \n\t" \ 550 "addcc %%o4, %%o2, %%o4 \n\t" \ 551 "rd %%y, %%g1 \n\t" \ 552 "addx %%g1, 0, %%g1 \n\t" \ 553 "addcc %%o4, %%o5, %%o4 \n\t" \ 554 "st %%o4, [%%o1] \n\t" \ 555 "addx %%g1, 0, %%o2 \n\t" \ 556 "inc 4, %%o1 \n\t" 557 558 #define MULADDC_X1_STOP \ 559 "st %%o2, %0 \n\t" \ 560 "st %%o1, %1 \n\t" \ 561 "st %%o0, %2 \n\t" \ 562 : "=m" (c), "=m" (d), "=m" (s) \ 563 : "m" (s), "m" (d), "m" (c), "m" (b) \ 564 : "g1", "o0", "o1", "o2", "o3", "o4", \ 565 "o5" \ 566 ); 567 568 #endif /* __sparc64__ */ 569 #endif /* __sparc__ */ 570 571 #if defined(__microblaze__) || defined(microblaze) 572 573 #define MULADDC_X1_INIT \ 574 asm( \ 575 "lwi r3, %3 \n\t" \ 576 "lwi r4, %4 \n\t" \ 577 "lwi r5, %5 \n\t" \ 578 "lwi r6, %6 \n\t" \ 579 "andi r7, r6, 0xffff \n\t" \ 580 "bsrli r6, r6, 16 \n\t" 581 582 #if(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__) 583 #define MULADDC_LHUI \ 584 "lhui r9, r3, 0 \n\t" \ 585 "addi r3, r3, 2 \n\t" \ 586 "lhui r8, r3, 0 \n\t" 587 #else 588 #define MULADDC_LHUI \ 589 "lhui r8, r3, 0 \n\t" \ 590 "addi r3, r3, 2 \n\t" \ 591 "lhui r9, r3, 0 \n\t" 592 #endif 593 594 #define MULADDC_X1_CORE \ 595 MULADDC_LHUI \ 596 "addi r3, r3, 2 \n\t" \ 597 "mul r10, r9, r6 \n\t" \ 598 "mul r11, r8, r7 \n\t" \ 599 "mul r12, r9, r7 \n\t" \ 600 "mul r13, r8, r6 \n\t" \ 601 "bsrli r8, r10, 16 \n\t" \ 602 "bsrli r9, r11, 16 \n\t" \ 603 "add r13, r13, r8 \n\t" \ 604 "add r13, r13, r9 \n\t" \ 605 "bslli r10, r10, 16 \n\t" \ 606 "bslli r11, r11, 16 \n\t" \ 607 "add r12, r12, r10 \n\t" \ 608 "addc r13, r13, r0 \n\t" \ 609 "add r12, r12, r11 \n\t" \ 610 "addc r13, r13, r0 \n\t" \ 611 "lwi r10, r4, 0 \n\t" \ 612 "add r12, r12, r10 \n\t" \ 613 "addc r13, r13, r0 \n\t" \ 614 "add r12, r12, r5 \n\t" \ 615 "addc r5, r13, r0 \n\t" \ 616 "swi r12, r4, 0 \n\t" \ 617 "addi r4, r4, 4 \n\t" 618 619 #define MULADDC_X1_STOP \ 620 "swi r5, %0 \n\t" \ 621 "swi r4, %1 \n\t" \ 622 "swi r3, %2 \n\t" \ 623 : "=m" (c), "=m" (d), "=m" (s) \ 624 : "m" (s), "m" (d), "m" (c), "m" (b) \ 625 : "r3", "r4", "r5", "r6", "r7", "r8", \ 626 "r9", "r10", "r11", "r12", "r13" \ 627 ); 628 629 #endif /* MicroBlaze */ 630 631 #if defined(__tricore__) 632 633 #define MULADDC_X1_INIT \ 634 asm( \ 635 "ld.a %%a2, %3 \n\t" \ 636 "ld.a %%a3, %4 \n\t" \ 637 "ld.w %%d4, %5 \n\t" \ 638 "ld.w %%d1, %6 \n\t" \ 639 "xor %%d5, %%d5 \n\t" 640 641 #define MULADDC_X1_CORE \ 642 "ld.w %%d0, [%%a2+] \n\t" \ 643 "madd.u %%e2, %%e4, %%d0, %%d1 \n\t" \ 644 "ld.w %%d0, [%%a3] \n\t" \ 645 "addx %%d2, %%d2, %%d0 \n\t" \ 646 "addc %%d3, %%d3, 0 \n\t" \ 647 "mov %%d4, %%d3 \n\t" \ 648 "st.w [%%a3+], %%d2 \n\t" 649 650 #define MULADDC_X1_STOP \ 651 "st.w %0, %%d4 \n\t" \ 652 "st.a %1, %%a3 \n\t" \ 653 "st.a %2, %%a2 \n\t" \ 654 : "=m" (c), "=m" (d), "=m" (s) \ 655 : "m" (s), "m" (d), "m" (c), "m" (b) \ 656 : "d0", "d1", "e2", "d4", "a2", "a3" \ 657 ); 658 659 #endif /* TriCore */ 660 661 /* 662 * Note, gcc -O0 by default uses r7 for the frame pointer, so it complains about 663 * our use of r7 below, unless -fomit-frame-pointer is passed. 664 * 665 * On the other hand, -fomit-frame-pointer is implied by any -Ox options with 666 * x !=0, which we can detect using __OPTIMIZE__ (which is also defined by 667 * clang and armcc5 under the same conditions). 668 * 669 * So, only use the optimized assembly below for optimized build, which avoids 670 * the build error and is pretty reasonable anyway. 671 */ 672 #if defined(__GNUC__) && !defined(__OPTIMIZE__) 673 #define MULADDC_CANNOT_USE_R7 674 #endif 675 676 #if defined(__arm__) && !defined(MULADDC_CANNOT_USE_R7) 677 678 #if defined(__thumb__) && !defined(__thumb2__) 679 680 #define MULADDC_X1_INIT \ 681 asm( \ 682 "ldr r0, %3 \n\t" \ 683 "ldr r1, %4 \n\t" \ 684 "ldr r2, %5 \n\t" \ 685 "ldr r3, %6 \n\t" \ 686 "lsr r7, r3, #16 \n\t" \ 687 "mov r9, r7 \n\t" \ 688 "lsl r7, r3, #16 \n\t" \ 689 "lsr r7, r7, #16 \n\t" \ 690 "mov r8, r7 \n\t" 691 692 #define MULADDC_X1_CORE \ 693 "ldmia r0!, {r6} \n\t" \ 694 "lsr r7, r6, #16 \n\t" \ 695 "lsl r6, r6, #16 \n\t" \ 696 "lsr r6, r6, #16 \n\t" \ 697 "mov r4, r8 \n\t" \ 698 "mul r4, r6 \n\t" \ 699 "mov r3, r9 \n\t" \ 700 "mul r6, r3 \n\t" \ 701 "mov r5, r9 \n\t" \ 702 "mul r5, r7 \n\t" \ 703 "mov r3, r8 \n\t" \ 704 "mul r7, r3 \n\t" \ 705 "lsr r3, r6, #16 \n\t" \ 706 "add r5, r5, r3 \n\t" \ 707 "lsr r3, r7, #16 \n\t" \ 708 "add r5, r5, r3 \n\t" \ 709 "add r4, r4, r2 \n\t" \ 710 "mov r2, #0 \n\t" \ 711 "adc r5, r2 \n\t" \ 712 "lsl r3, r6, #16 \n\t" \ 713 "add r4, r4, r3 \n\t" \ 714 "adc r5, r2 \n\t" \ 715 "lsl r3, r7, #16 \n\t" \ 716 "add r4, r4, r3 \n\t" \ 717 "adc r5, r2 \n\t" \ 718 "ldr r3, [r1] \n\t" \ 719 "add r4, r4, r3 \n\t" \ 720 "adc r2, r5 \n\t" \ 721 "stmia r1!, {r4} \n\t" 722 723 #define MULADDC_X1_STOP \ 724 "str r2, %0 \n\t" \ 725 "str r1, %1 \n\t" \ 726 "str r0, %2 \n\t" \ 727 : "=m" (c), "=m" (d), "=m" (s) \ 728 : "m" (s), "m" (d), "m" (c), "m" (b) \ 729 : "r0", "r1", "r2", "r3", "r4", "r5", \ 730 "r6", "r7", "r8", "r9", "cc" \ 731 ); 732 733 #elif (__ARM_ARCH >= 6) && \ 734 defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1) 735 736 #define MULADDC_X1_INIT \ 737 { \ 738 mbedtls_mpi_uint tmp_a, tmp_b; \ 739 asm volatile ( 740 741 #define MULADDC_X1_CORE \ 742 ".p2align 2 \n\t" \ 743 "ldr %[a], [%[in]], #4 \n\t" \ 744 "ldr %[b], [%[acc]] \n\t" \ 745 "umaal %[b], %[carry], %[scalar], %[a] \n\t" \ 746 "str %[b], [%[acc]], #4 \n\t" 747 748 #define MULADDC_X1_STOP \ 749 : [a] "=&r" (tmp_a), \ 750 [b] "=&r" (tmp_b), \ 751 [in] "+r" (s), \ 752 [acc] "+r" (d), \ 753 [carry] "+l" (c) \ 754 : [scalar] "r" (b) \ 755 : "memory" \ 756 ); \ 757 } 758 759 #define MULADDC_X2_INIT \ 760 { \ 761 mbedtls_mpi_uint tmp_a0, tmp_b0; \ 762 mbedtls_mpi_uint tmp_a1, tmp_b1; \ 763 asm volatile ( 764 765 /* - Make sure loop is 4-byte aligned to avoid stalls 766 * upon repeated non-word aligned instructions in 767 * some microarchitectures. 768 * - Don't use ldm with post-increment or back-to-back 769 * loads with post-increment and same address register 770 * to avoid stalls on some microarchitectures. 771 * - Bunch loads and stores to reduce latency on some 772 * microarchitectures. E.g., on Cortex-M4, the first 773 * in a series of load/store operations has latency 774 * 2 cycles, while subsequent loads/stores are single-cycle. */ 775 #define MULADDC_X2_CORE \ 776 ".p2align 2 \n\t" \ 777 "ldr %[a0], [%[in]], #+8 \n\t" \ 778 "ldr %[b0], [%[acc]], #+8 \n\t" \ 779 "ldr %[a1], [%[in], #-4] \n\t" \ 780 "ldr %[b1], [%[acc], #-4] \n\t" \ 781 "umaal %[b0], %[carry], %[scalar], %[a0] \n\t" \ 782 "umaal %[b1], %[carry], %[scalar], %[a1] \n\t" \ 783 "str %[b0], [%[acc], #-8] \n\t" \ 784 "str %[b1], [%[acc], #-4] \n\t" 785 786 #define MULADDC_X2_STOP \ 787 : [a0] "=&r" (tmp_a0), \ 788 [b0] "=&r" (tmp_b0), \ 789 [a1] "=&r" (tmp_a1), \ 790 [b1] "=&r" (tmp_b1), \ 791 [in] "+r" (s), \ 792 [acc] "+r" (d), \ 793 [carry] "+l" (c) \ 794 : [scalar] "r" (b) \ 795 : "memory" \ 796 ); \ 797 } 798 799 #else 800 801 #define MULADDC_X1_INIT \ 802 asm( \ 803 "ldr r0, %3 \n\t" \ 804 "ldr r1, %4 \n\t" \ 805 "ldr r2, %5 \n\t" \ 806 "ldr r3, %6 \n\t" 807 808 #define MULADDC_X1_CORE \ 809 "ldr r4, [r0], #4 \n\t" \ 810 "mov r5, #0 \n\t" \ 811 "ldr r6, [r1] \n\t" \ 812 "umlal r2, r5, r3, r4 \n\t" \ 813 "adds r7, r6, r2 \n\t" \ 814 "adc r2, r5, #0 \n\t" \ 815 "str r7, [r1], #4 \n\t" 816 817 #define MULADDC_X1_STOP \ 818 "str r2, %0 \n\t" \ 819 "str r1, %1 \n\t" \ 820 "str r0, %2 \n\t" \ 821 : "=m" (c), "=m" (d), "=m" (s) \ 822 : "m" (s), "m" (d), "m" (c), "m" (b) \ 823 : "r0", "r1", "r2", "r3", "r4", "r5", \ 824 "r6", "r7", "cc" \ 825 ); 826 827 #endif /* Thumb */ 828 829 #endif /* ARMv3 */ 830 831 #if defined(__alpha__) 832 833 #define MULADDC_X1_INIT \ 834 asm( \ 835 "ldq $1, %3 \n\t" \ 836 "ldq $2, %4 \n\t" \ 837 "ldq $3, %5 \n\t" \ 838 "ldq $4, %6 \n\t" 839 840 #define MULADDC_X1_CORE \ 841 "ldq $6, 0($1) \n\t" \ 842 "addq $1, 8, $1 \n\t" \ 843 "mulq $6, $4, $7 \n\t" \ 844 "umulh $6, $4, $6 \n\t" \ 845 "addq $7, $3, $7 \n\t" \ 846 "cmpult $7, $3, $3 \n\t" \ 847 "ldq $5, 0($2) \n\t" \ 848 "addq $7, $5, $7 \n\t" \ 849 "cmpult $7, $5, $5 \n\t" \ 850 "stq $7, 0($2) \n\t" \ 851 "addq $2, 8, $2 \n\t" \ 852 "addq $6, $3, $3 \n\t" \ 853 "addq $5, $3, $3 \n\t" 854 855 #define MULADDC_X1_STOP \ 856 "stq $3, %0 \n\t" \ 857 "stq $2, %1 \n\t" \ 858 "stq $1, %2 \n\t" \ 859 : "=m" (c), "=m" (d), "=m" (s) \ 860 : "m" (s), "m" (d), "m" (c), "m" (b) \ 861 : "$1", "$2", "$3", "$4", "$5", "$6", "$7" \ 862 ); 863 #endif /* Alpha */ 864 865 #if defined(__mips__) && !defined(__mips64) 866 867 #define MULADDC_X1_INIT \ 868 asm( \ 869 "lw $10, %3 \n\t" \ 870 "lw $11, %4 \n\t" \ 871 "lw $12, %5 \n\t" \ 872 "lw $13, %6 \n\t" 873 874 #define MULADDC_X1_CORE \ 875 "lw $14, 0($10) \n\t" \ 876 "multu $13, $14 \n\t" \ 877 "addi $10, $10, 4 \n\t" \ 878 "mflo $14 \n\t" \ 879 "mfhi $9 \n\t" \ 880 "addu $14, $12, $14 \n\t" \ 881 "lw $15, 0($11) \n\t" \ 882 "sltu $12, $14, $12 \n\t" \ 883 "addu $15, $14, $15 \n\t" \ 884 "sltu $14, $15, $14 \n\t" \ 885 "addu $12, $12, $9 \n\t" \ 886 "sw $15, 0($11) \n\t" \ 887 "addu $12, $12, $14 \n\t" \ 888 "addi $11, $11, 4 \n\t" 889 890 #define MULADDC_X1_STOP \ 891 "sw $12, %0 \n\t" \ 892 "sw $11, %1 \n\t" \ 893 "sw $10, %2 \n\t" \ 894 : "=m" (c), "=m" (d), "=m" (s) \ 895 : "m" (s), "m" (d), "m" (c), "m" (b) \ 896 : "$9", "$10", "$11", "$12", "$13", "$14", "$15", "lo", "hi" \ 897 ); 898 899 #endif /* MIPS */ 900 #endif /* GNUC */ 901 902 #if (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__) 903 904 #define MULADDC_X1_INIT \ 905 __asm mov esi, s \ 906 __asm mov edi, d \ 907 __asm mov ecx, c \ 908 __asm mov ebx, b 909 910 #define MULADDC_X1_CORE \ 911 __asm lodsd \ 912 __asm mul ebx \ 913 __asm add eax, ecx \ 914 __asm adc edx, 0 \ 915 __asm add eax, [edi] \ 916 __asm adc edx, 0 \ 917 __asm mov ecx, edx \ 918 __asm stosd 919 920 #define MULADDC_X1_STOP \ 921 __asm mov c, ecx \ 922 __asm mov d, edi \ 923 __asm mov s, esi 924 925 #if defined(MBEDTLS_HAVE_SSE2) 926 927 #define EMIT __asm _emit 928 929 #define MULADDC_X8_INIT MULADDC_X1_INIT 930 931 #define MULADDC_X8_CORE \ 932 EMIT 0x0F EMIT 0x6E EMIT 0xC9 \ 933 EMIT 0x0F EMIT 0x6E EMIT 0xC3 \ 934 EMIT 0x0F EMIT 0x6E EMIT 0x1F \ 935 EMIT 0x0F EMIT 0xD4 EMIT 0xCB \ 936 EMIT 0x0F EMIT 0x6E EMIT 0x16 \ 937 EMIT 0x0F EMIT 0xF4 EMIT 0xD0 \ 938 EMIT 0x0F EMIT 0x6E EMIT 0x66 EMIT 0x04 \ 939 EMIT 0x0F EMIT 0xF4 EMIT 0xE0 \ 940 EMIT 0x0F EMIT 0x6E EMIT 0x76 EMIT 0x08 \ 941 EMIT 0x0F EMIT 0xF4 EMIT 0xF0 \ 942 EMIT 0x0F EMIT 0x6E EMIT 0x7E EMIT 0x0C \ 943 EMIT 0x0F EMIT 0xF4 EMIT 0xF8 \ 944 EMIT 0x0F EMIT 0xD4 EMIT 0xCA \ 945 EMIT 0x0F EMIT 0x6E EMIT 0x5F EMIT 0x04 \ 946 EMIT 0x0F EMIT 0xD4 EMIT 0xDC \ 947 EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x08 \ 948 EMIT 0x0F EMIT 0xD4 EMIT 0xEE \ 949 EMIT 0x0F EMIT 0x6E EMIT 0x67 EMIT 0x0C \ 950 EMIT 0x0F EMIT 0xD4 EMIT 0xFC \ 951 EMIT 0x0F EMIT 0x7E EMIT 0x0F \ 952 EMIT 0x0F EMIT 0x6E EMIT 0x56 EMIT 0x10 \ 953 EMIT 0x0F EMIT 0xF4 EMIT 0xD0 \ 954 EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ 955 EMIT 0x0F EMIT 0x6E EMIT 0x66 EMIT 0x14 \ 956 EMIT 0x0F EMIT 0xF4 EMIT 0xE0 \ 957 EMIT 0x0F EMIT 0xD4 EMIT 0xCB \ 958 EMIT 0x0F EMIT 0x6E EMIT 0x76 EMIT 0x18 \ 959 EMIT 0x0F EMIT 0xF4 EMIT 0xF0 \ 960 EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x04 \ 961 EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ 962 EMIT 0x0F EMIT 0x6E EMIT 0x5E EMIT 0x1C \ 963 EMIT 0x0F EMIT 0xF4 EMIT 0xD8 \ 964 EMIT 0x0F EMIT 0xD4 EMIT 0xCD \ 965 EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x10 \ 966 EMIT 0x0F EMIT 0xD4 EMIT 0xD5 \ 967 EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x08 \ 968 EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ 969 EMIT 0x0F EMIT 0xD4 EMIT 0xCF \ 970 EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x14 \ 971 EMIT 0x0F EMIT 0xD4 EMIT 0xE5 \ 972 EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x0C \ 973 EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ 974 EMIT 0x0F EMIT 0xD4 EMIT 0xCA \ 975 EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x18 \ 976 EMIT 0x0F EMIT 0xD4 EMIT 0xF5 \ 977 EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x10 \ 978 EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ 979 EMIT 0x0F EMIT 0xD4 EMIT 0xCC \ 980 EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x1C \ 981 EMIT 0x0F EMIT 0xD4 EMIT 0xDD \ 982 EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x14 \ 983 EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ 984 EMIT 0x0F EMIT 0xD4 EMIT 0xCE \ 985 EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x18 \ 986 EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ 987 EMIT 0x0F EMIT 0xD4 EMIT 0xCB \ 988 EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x1C \ 989 EMIT 0x83 EMIT 0xC7 EMIT 0x20 \ 990 EMIT 0x83 EMIT 0xC6 EMIT 0x20 \ 991 EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ 992 EMIT 0x0F EMIT 0x7E EMIT 0xC9 993 994 #define MULADDC_X8_STOP \ 995 EMIT 0x0F EMIT 0x77 \ 996 __asm mov c, ecx \ 997 __asm mov d, edi \ 998 __asm mov s, esi 999 1000 #endif /* SSE2 */ 1001 #endif /* MSVC */ 1002 1003 #endif /* MBEDTLS_HAVE_ASM */ 1004 1005 #if !defined(MULADDC_X1_CORE) 1006 #if defined(MBEDTLS_HAVE_UDBL) 1007 1008 #define MULADDC_X1_INIT \ 1009 { \ 1010 mbedtls_t_udbl r; \ 1011 mbedtls_mpi_uint r0, r1; 1012 1013 #define MULADDC_X1_CORE \ 1014 r = *(s++) * (mbedtls_t_udbl) b; \ 1015 r0 = (mbedtls_mpi_uint) r; \ 1016 r1 = (mbedtls_mpi_uint)( r >> biL ); \ 1017 r0 += c; r1 += (r0 < c); \ 1018 r0 += *d; r1 += (r0 < *d); \ 1019 c = r1; *(d++) = r0; 1020 1021 #define MULADDC_X1_STOP \ 1022 } 1023 1024 #else /* MBEDTLS_HAVE_UDBL */ 1025 1026 #define MULADDC_X1_INIT \ 1027 { \ 1028 mbedtls_mpi_uint s0, s1, b0, b1; \ 1029 mbedtls_mpi_uint r0, r1, rx, ry; \ 1030 b0 = ( b << biH ) >> biH; \ 1031 b1 = ( b >> biH ); 1032 1033 #define MULADDC_X1_CORE \ 1034 s0 = ( *s << biH ) >> biH; \ 1035 s1 = ( *s >> biH ); s++; \ 1036 rx = s0 * b1; r0 = s0 * b0; \ 1037 ry = s1 * b0; r1 = s1 * b1; \ 1038 r1 += ( rx >> biH ); \ 1039 r1 += ( ry >> biH ); \ 1040 rx <<= biH; ry <<= biH; \ 1041 r0 += rx; r1 += (r0 < rx); \ 1042 r0 += ry; r1 += (r0 < ry); \ 1043 r0 += c; r1 += (r0 < c); \ 1044 r0 += *d; r1 += (r0 < *d); \ 1045 c = r1; *(d++) = r0; 1046 1047 #define MULADDC_X1_STOP \ 1048 } 1049 1050 #endif /* C (longlong) */ 1051 #endif /* C (generic) */ 1052 1053 #if !defined(MULADDC_X2_CORE) 1054 #define MULADDC_X2_INIT MULADDC_X1_INIT 1055 #define MULADDC_X2_STOP MULADDC_X1_STOP 1056 #define MULADDC_X2_CORE MULADDC_X1_CORE MULADDC_X1_CORE 1057 #endif /* MULADDC_X2_CORE */ 1058 1059 #if !defined(MULADDC_X4_CORE) 1060 #define MULADDC_X4_INIT MULADDC_X2_INIT 1061 #define MULADDC_X4_STOP MULADDC_X2_STOP 1062 #define MULADDC_X4_CORE MULADDC_X2_CORE MULADDC_X2_CORE 1063 #endif /* MULADDC_X4_CORE */ 1064 1065 #if !defined(MULADDC_X8_CORE) 1066 #define MULADDC_X8_INIT MULADDC_X4_INIT 1067 #define MULADDC_X8_STOP MULADDC_X4_STOP 1068 #define MULADDC_X8_CORE MULADDC_X4_CORE MULADDC_X4_CORE 1069 #endif /* MULADDC_X8_CORE */ 1070 1071 /* *INDENT-ON* */ 1072 #endif /* bn_mul.h */ 1073
