1 /* Bosch BMP388 pressure sensor 2 * 3 * Copyright (c) 2020 Facebook, Inc. and its affiliates 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 * 7 * Datasheet: 8 * https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bmp388-ds001.pdf 9 */ 10 11 #ifndef __BMP388_H 12 #define __BMP388_H 13 14 #include <zephyr/device.h> 15 #include <zephyr/devicetree.h> 16 #include <zephyr/drivers/spi.h> 17 #include <zephyr/drivers/i2c.h> 18 #include <zephyr/drivers/gpio.h> 19 #include <zephyr/drivers/sensor.h> 20 #include <zephyr/sys/util.h> 21 22 #define DT_DRV_COMPAT bosch_bmp388 23 24 #define BMP388_BUS_SPI DT_ANY_INST_ON_BUS_STATUS_OKAY(spi) 25 #define BMP388_BUS_I2C DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c) 26 27 union bmp388_bus { 28 #if BMP388_BUS_SPI 29 struct spi_dt_spec spi; 30 #endif 31 #if BMP388_BUS_I2C 32 struct i2c_dt_spec i2c; 33 #endif 34 }; 35 36 typedef int (*bmp388_bus_check_fn)(const union bmp388_bus *bus); 37 typedef int (*bmp388_reg_read_fn)(const union bmp388_bus *bus, 38 uint8_t start, uint8_t *buf, int size); 39 typedef int (*bmp388_reg_write_fn)(const union bmp388_bus *bus, 40 uint8_t reg, uint8_t val); 41 42 struct bmp388_bus_io { 43 bmp388_bus_check_fn check; 44 bmp388_reg_read_fn read; 45 bmp388_reg_write_fn write; 46 }; 47 48 #if BMP388_BUS_SPI 49 #define BMP388_SPI_OPERATION (SPI_WORD_SET(8) | SPI_TRANSFER_MSB | \ 50 SPI_MODE_CPOL | SPI_MODE_CPHA) 51 extern const struct bmp388_bus_io bmp388_bus_io_spi; 52 #endif 53 54 #if BMP388_BUS_I2C 55 extern const struct bmp388_bus_io bmp388_bus_io_i2c; 56 #endif 57 58 /* registers */ 59 #define BMP388_REG_CHIPID 0x00 60 #define BMP388_REG_ERR_REG 0x02 61 #define BMP388_REG_STATUS 0x03 62 #define BMP388_REG_DATA0 0x04 63 #define BMP388_REG_DATA1 0x05 64 #define BMP388_REG_DATA2 0x06 65 #define BMP388_REG_DATA3 0x07 66 #define BMP388_REG_DATA4 0x08 67 #define BMP388_REG_DATA5 0x09 68 #define BMP388_REG_SENSORTIME0 0x0C 69 #define BMP388_REG_SENSORTIME1 0x0D 70 #define BMP388_REG_SENSORTIME2 0x0E 71 #define BMP388_REG_SENSORTIME3 0x0F 72 #define BMP388_REG_EVENT 0x10 73 #define BMP388_REG_INT_STATUS 0x11 74 #define BMP388_REG_FIFO_LENGTH0 0x12 75 #define BMP388_REG_FIFO_LENGTH1 0x13 76 #define BMP388_REG_FIFO_DATA 0x14 77 #define BMP388_REG_FIFO_WTM0 0x15 78 #define BMP388_REG_FIFO_WTM1 0x16 79 #define BMP388_REG_FIFO_CONFIG1 0x17 80 #define BMP388_REG_FIFO_CONFIG2 0x18 81 #define BMP388_REG_INT_CTRL 0x19 82 #define BMP388_REG_IF_CONF 0x1A 83 #define BMP388_REG_PWR_CTRL 0x1B 84 #define BMP388_REG_OSR 0x1C 85 #define BMP388_REG_ODR 0x1D 86 #define BMP388_REG_CONFIG 0x1F 87 #define BMP388_REG_CALIB0 0x31 88 #define BMP388_REG_CMD 0x7E 89 90 /* BMP388_REG_CHIPID */ 91 #define BMP388_CHIP_ID 0x50 92 93 /* BMP388_REG_STATUS */ 94 #define BMP388_STATUS_FATAL_ERR BIT(0) 95 #define BMP388_STATUS_CMD_ERR BIT(1) 96 #define BMP388_STATUS_CONF_ERR BIT(2) 97 #define BMP388_STATUS_CMD_RDY BIT(4) 98 #define BMP388_STATUS_DRDY_PRESS BIT(5) 99 #define BMP388_STATUS_DRDY_TEMP BIT(6) 100 101 /* BMP388_REG_INT_CTRL */ 102 #define BMP388_INT_CTRL_DRDY_EN_POS 6 103 #define BMP388_INT_CTRL_DRDY_EN_MASK BIT(6) 104 105 /* BMP388_REG_PWR_CTRL */ 106 #define BMP388_PWR_CTRL_PRESS_EN BIT(0) 107 #define BMP388_PWR_CTRL_TEMP_EN BIT(1) 108 #define BMP388_PWR_CTRL_MODE_POS 4 109 #define BMP388_PWR_CTRL_MODE_MASK (0x03 << BMP388_PWR_CTRL_MODE_POS) 110 #define BMP388_PWR_CTRL_MODE_SLEEP (0x00 << BMP388_PWR_CTRL_MODE_POS) 111 #define BMP388_PWR_CTRL_MODE_FORCED (0x01 << BMP388_PWR_CTRL_MODE_POS) 112 #define BMP388_PWR_CTRL_MODE_NORMAL (0x03 << BMP388_PWR_CTRL_MODE_POS) 113 114 /* BMP388_REG_OSR */ 115 #define BMP388_ODR_POS 0 116 #define BMP388_ODR_MASK 0x1F 117 118 /* BMP388_REG_ODR */ 119 #define BMP388_OSR_PRESSURE_POS 0 120 #define BMP388_OSR_PRESSURE_MASK (0x07 << BMP388_OSR_PRESSURE_POS) 121 #define BMP388_OSR_TEMP_POS 3 122 #define BMP388_OSR_TEMP_MASK (0x07 << BMP388_OSR_TEMP_POS) 123 124 /* BMP388_REG_CONFIG */ 125 #define BMP388_IIR_FILTER_POS 1 126 #define BMP388_IIR_FILTER_MASK (0x7 << BMP388_IIR_FILTER_POS) 127 128 /* BMP388_REG_CMD */ 129 #define BMP388_CMD_FIFO_FLUSH 0xB0 130 #define BMP388_CMD_SOFT_RESET 0xB6 131 132 /* default PWR_CTRL settings */ 133 #define BMP388_PWR_CTRL_ON \ 134 (BMP388_PWR_CTRL_PRESS_EN | \ 135 BMP388_PWR_CTRL_TEMP_EN | \ 136 BMP388_PWR_CTRL_MODE_NORMAL) 137 #define BMP388_PWR_CTRL_OFF 0 138 139 #define BMP388_SAMPLE_BUFFER_SIZE (6) 140 141 struct bmp388_cal_data { 142 uint16_t t1; 143 uint16_t t2; 144 int8_t t3; 145 int16_t p1; 146 int16_t p2; 147 int8_t p3; 148 int8_t p4; 149 uint16_t p5; 150 uint16_t p6; 151 int8_t p7; 152 int8_t p8; 153 int16_t p9; 154 int8_t p10; 155 int8_t p11; 156 } __packed; 157 158 struct bmp388_sample { 159 uint32_t press; 160 uint32_t raw_temp; 161 int64_t comp_temp; 162 }; 163 164 struct bmp388_config { 165 union bmp388_bus bus; 166 const struct bmp388_bus_io *bus_io; 167 168 #ifdef CONFIG_BMP388_TRIGGER 169 struct gpio_dt_spec gpio_int; 170 #endif 171 172 uint8_t iir_filter; 173 }; 174 175 struct bmp388_data { 176 uint8_t odr; 177 uint8_t osr_pressure; 178 uint8_t osr_temp; 179 struct bmp388_cal_data cal; 180 181 #if defined(CONFIG_BMP388_TRIGGER) 182 struct gpio_callback gpio_cb; 183 #endif 184 185 struct bmp388_sample sample; 186 187 #ifdef CONFIG_BMP388_TRIGGER_OWN_THREAD 188 struct k_sem sem; 189 #endif 190 191 #ifdef CONFIG_BMP388_TRIGGER_GLOBAL_THREAD 192 struct k_work work; 193 #endif 194 195 #if defined(CONFIG_BMP388_TRIGGER_GLOBAL_THREAD) || \ 196 defined(CONFIG_BMP388_TRIGGER_DIRECT) 197 const struct device *dev; 198 #endif 199 200 #ifdef CONFIG_BMP388_TRIGGER 201 sensor_trigger_handler_t handler_drdy; 202 const struct sensor_trigger *trig_drdy; 203 #endif /* CONFIG_BMP388_TRIGGER */ 204 }; 205 206 int bmp388_trigger_mode_init(const struct device *dev); 207 int bmp388_trigger_set(const struct device *dev, 208 const struct sensor_trigger *trig, 209 sensor_trigger_handler_t handler); 210 int bmp388_reg_field_update(const struct device *dev, 211 uint8_t reg, 212 uint8_t mask, 213 uint8_t val); 214 215 #endif /* __BMP388_H */ 216