1 /*
2  * Macros for asm code.  AArch64 version.
3  *
4  * Copyright (c) 2019-2023, Arm Limited.
5  * SPDX-License-Identifier: MIT
6  */
7 
8 #ifndef _ASMDEFS_H
9 #define _ASMDEFS_H
10 
11 /* Branch Target Identitication support.  */
12 #define BTI_C		hint	34
13 #define BTI_J		hint	36
14 /* Return address signing support (pac-ret).  */
15 #define PACIASP		hint	25; .cfi_window_save
16 #define AUTIASP		hint	29; .cfi_window_save
17 
18 /* GNU_PROPERTY_AARCH64_* macros from elf.h.  */
19 #define FEATURE_1_AND 0xc0000000
20 #define FEATURE_1_BTI 1
21 #define FEATURE_1_PAC 2
22 
23 /* Add a NT_GNU_PROPERTY_TYPE_0 note.  */
24 #ifdef __ILP32__
25 #define GNU_PROPERTY(type, value)	\
26   .section .note.gnu.property, "a";	\
27   .p2align 2;				\
28   .word 4;				\
29   .word 12;				\
30   .word 5;				\
31   .asciz "GNU";				\
32   .word type;				\
33   .word 4;				\
34   .word value;				\
35   .text
36 #else
37 #define GNU_PROPERTY(type, value)	\
38   .section .note.gnu.property, "a";	\
39   .p2align 3;				\
40   .word 4;				\
41   .word 16;				\
42   .word 5;				\
43   .asciz "GNU";				\
44   .word type;				\
45   .word 4;				\
46   .word value;				\
47   .word 0;				\
48   .text
49 #endif
50 
51 /* If set then the GNU Property Note section will be added to
52    mark objects to support BTI and PAC-RET.  */
53 #ifndef WANT_GNU_PROPERTY
54 #define WANT_GNU_PROPERTY 1
55 #endif
56 
57 #if WANT_GNU_PROPERTY
58 /* Add property note with supported features to all asm files.  */
59 GNU_PROPERTY (FEATURE_1_AND, FEATURE_1_BTI|FEATURE_1_PAC)
60 #endif
61 
62 #define ENTRY_ALIGN(name, alignment)	\
63   .global name;		\
64   .type name,%function;	\
65   .align alignment;		\
66   name:			\
67   .cfi_startproc;	\
68   BTI_C;
69 
70 #define ENTRY(name)	ENTRY_ALIGN(name, 6)
71 
72 #define ENTRY_ALIAS(name)	\
73   .global name;		\
74   .type name,%function;	\
75   name:
76 
77 #define END(name)	\
78   .cfi_endproc;		\
79   .size name, .-name;
80 
81 #define L(l) .L ## l
82 
83 #ifdef __ILP32__
84   /* Sanitize padding bits of pointer arguments as per aapcs64 */
85 #define PTR_ARG(n)  mov w##n, w##n
86 #else
87 #define PTR_ARG(n)
88 #endif
89 
90 #ifdef __ILP32__
91   /* Sanitize padding bits of size arguments as per aapcs64 */
92 #define SIZE_ARG(n)  mov w##n, w##n
93 #else
94 #define SIZE_ARG(n)
95 #endif
96 
97 /* Compiler supports SVE instructions  */
98 #ifndef HAVE_SVE
99 # if __aarch64__ && (__GNUC__ >= 8 || __clang_major__ >= 5)
100 #   define HAVE_SVE 1
101 # else
102 #   define HAVE_SVE 0
103 # endif
104 #endif
105 
106 #endif
107