1 /* ----------------------------------------------------------------------
2  * Project:      CMSIS DSP Library
3  * Title:        arm_mve_tables.h
4  * Description:  common tables like fft twiddle factors, Bitreverse, reciprocal etc
5  *               used for MVE implementation only
6  *
7  * @version  V1.9.0
8  * @date     23 April 2021
9  *
10  * Target Processor: Cortex-M and Cortex-A cores
11  * -------------------------------------------------------------------- */
12 /*
13  * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14  *
15  * SPDX-License-Identifier: Apache-2.0
16  *
17  * Licensed under the Apache License, Version 2.0 (the License); you may
18  * not use this file except in compliance with the License.
19  * You may obtain a copy of the License at
20  *
21  * www.apache.org/licenses/LICENSE-2.0
22  *
23  * Unless required by applicable law or agreed to in writing, software
24  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
25  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
26  * See the License for the specific language governing permissions and
27  * limitations under the License.
28  */
29 
30  #ifndef _ARM_MVE_TABLES_H
31  #define _ARM_MVE_TABLES_H
32 
33 #include "arm_math_types.h"
34 
35 #ifdef   __cplusplus
36 extern "C"
37 {
38 #endif
39 
40 
41 
42 
43 #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
44 
45 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
46 
47 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
48 
49 extern uint32_t rearranged_twiddle_tab_stride1_arr_16_f32[2];
50 extern uint32_t rearranged_twiddle_tab_stride2_arr_16_f32[2];
51 extern uint32_t rearranged_twiddle_tab_stride3_arr_16_f32[2];
52 extern float32_t rearranged_twiddle_stride1_16_f32[8];
53 extern float32_t rearranged_twiddle_stride2_16_f32[8];
54 extern float32_t rearranged_twiddle_stride3_16_f32[8];
55 #endif
56 
57 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
58 
59 extern uint32_t rearranged_twiddle_tab_stride1_arr_64_f32[3];
60 extern uint32_t rearranged_twiddle_tab_stride2_arr_64_f32[3];
61 extern uint32_t rearranged_twiddle_tab_stride3_arr_64_f32[3];
62 extern float32_t rearranged_twiddle_stride1_64_f32[40];
63 extern float32_t rearranged_twiddle_stride2_64_f32[40];
64 extern float32_t rearranged_twiddle_stride3_64_f32[40];
65 #endif
66 
67 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
68 
69 extern uint32_t rearranged_twiddle_tab_stride1_arr_256_f32[4];
70 extern uint32_t rearranged_twiddle_tab_stride2_arr_256_f32[4];
71 extern uint32_t rearranged_twiddle_tab_stride3_arr_256_f32[4];
72 extern float32_t rearranged_twiddle_stride1_256_f32[168];
73 extern float32_t rearranged_twiddle_stride2_256_f32[168];
74 extern float32_t rearranged_twiddle_stride3_256_f32[168];
75 #endif
76 
77 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
78 
79 extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_f32[5];
80 extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_f32[5];
81 extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_f32[5];
82 extern float32_t rearranged_twiddle_stride1_1024_f32[680];
83 extern float32_t rearranged_twiddle_stride2_1024_f32[680];
84 extern float32_t rearranged_twiddle_stride3_1024_f32[680];
85 #endif
86 
87 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) || defined(ARM_TABLE_TWIDDLECOEF_F32_8192)
88 
89 extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_f32[6];
90 extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_f32[6];
91 extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_f32[6];
92 extern float32_t rearranged_twiddle_stride1_4096_f32[2728];
93 extern float32_t rearranged_twiddle_stride2_4096_f32[2728];
94 extern float32_t rearranged_twiddle_stride3_4096_f32[2728];
95 #endif
96 
97 
98 #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
99 
100 #endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
101 
102 
103 
104 #if defined(ARM_MATH_MVEI)  && !defined(ARM_MATH_AUTOVECTORIZE)
105 
106 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
107 
108 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
109 
110 extern uint32_t rearranged_twiddle_tab_stride1_arr_16_q31[2];
111 extern uint32_t rearranged_twiddle_tab_stride2_arr_16_q31[2];
112 extern uint32_t rearranged_twiddle_tab_stride3_arr_16_q31[2];
113 extern q31_t rearranged_twiddle_stride1_16_q31[8];
114 extern q31_t rearranged_twiddle_stride2_16_q31[8];
115 extern q31_t rearranged_twiddle_stride3_16_q31[8];
116 #endif
117 
118 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
119 
120 extern uint32_t rearranged_twiddle_tab_stride1_arr_64_q31[3];
121 extern uint32_t rearranged_twiddle_tab_stride2_arr_64_q31[3];
122 extern uint32_t rearranged_twiddle_tab_stride3_arr_64_q31[3];
123 extern q31_t rearranged_twiddle_stride1_64_q31[40];
124 extern q31_t rearranged_twiddle_stride2_64_q31[40];
125 extern q31_t rearranged_twiddle_stride3_64_q31[40];
126 #endif
127 
128 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
129 
130 extern uint32_t rearranged_twiddle_tab_stride1_arr_256_q31[4];
131 extern uint32_t rearranged_twiddle_tab_stride2_arr_256_q31[4];
132 extern uint32_t rearranged_twiddle_tab_stride3_arr_256_q31[4];
133 extern q31_t rearranged_twiddle_stride1_256_q31[168];
134 extern q31_t rearranged_twiddle_stride2_256_q31[168];
135 extern q31_t rearranged_twiddle_stride3_256_q31[168];
136 #endif
137 
138 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
139 
140 extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_q31[5];
141 extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_q31[5];
142 extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_q31[5];
143 extern q31_t rearranged_twiddle_stride1_1024_q31[680];
144 extern q31_t rearranged_twiddle_stride2_1024_q31[680];
145 extern q31_t rearranged_twiddle_stride3_1024_q31[680];
146 #endif
147 
148 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q31_8192)
149 
150 extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_q31[6];
151 extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_q31[6];
152 extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_q31[6];
153 extern q31_t rearranged_twiddle_stride1_4096_q31[2728];
154 extern q31_t rearranged_twiddle_stride2_4096_q31[2728];
155 extern q31_t rearranged_twiddle_stride3_4096_q31[2728];
156 #endif
157 
158 
159 #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
160 
161 #endif /* defined(ARM_MATH_MVEI) */
162 
163 
164 
165 #if defined(ARM_MATH_MVEI)  && !defined(ARM_MATH_AUTOVECTORIZE)
166 
167 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
168 
169 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
170 
171 extern uint32_t rearranged_twiddle_tab_stride1_arr_16_q15[2];
172 extern uint32_t rearranged_twiddle_tab_stride2_arr_16_q15[2];
173 extern uint32_t rearranged_twiddle_tab_stride3_arr_16_q15[2];
174 extern q15_t rearranged_twiddle_stride1_16_q15[8];
175 extern q15_t rearranged_twiddle_stride2_16_q15[8];
176 extern q15_t rearranged_twiddle_stride3_16_q15[8];
177 #endif
178 
179 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
180 
181 extern uint32_t rearranged_twiddle_tab_stride1_arr_64_q15[3];
182 extern uint32_t rearranged_twiddle_tab_stride2_arr_64_q15[3];
183 extern uint32_t rearranged_twiddle_tab_stride3_arr_64_q15[3];
184 extern q15_t rearranged_twiddle_stride1_64_q15[40];
185 extern q15_t rearranged_twiddle_stride2_64_q15[40];
186 extern q15_t rearranged_twiddle_stride3_64_q15[40];
187 #endif
188 
189 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
190 
191 extern uint32_t rearranged_twiddle_tab_stride1_arr_256_q15[4];
192 extern uint32_t rearranged_twiddle_tab_stride2_arr_256_q15[4];
193 extern uint32_t rearranged_twiddle_tab_stride3_arr_256_q15[4];
194 extern q15_t rearranged_twiddle_stride1_256_q15[168];
195 extern q15_t rearranged_twiddle_stride2_256_q15[168];
196 extern q15_t rearranged_twiddle_stride3_256_q15[168];
197 #endif
198 
199 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
200 
201 extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_q15[5];
202 extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_q15[5];
203 extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_q15[5];
204 extern q15_t rearranged_twiddle_stride1_1024_q15[680];
205 extern q15_t rearranged_twiddle_stride2_1024_q15[680];
206 extern q15_t rearranged_twiddle_stride3_1024_q15[680];
207 #endif
208 
209 #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q15_8192)
210 
211 extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_q15[6];
212 extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_q15[6];
213 extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_q15[6];
214 extern q15_t rearranged_twiddle_stride1_4096_q15[2728];
215 extern q15_t rearranged_twiddle_stride2_4096_q15[2728];
216 extern q15_t rearranged_twiddle_stride3_4096_q15[2728];
217 #endif
218 
219 
220 #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
221 
222 #endif /* defined(ARM_MATH_MVEI) */
223 
224 
225 
226 #ifdef   __cplusplus
227 }
228 #endif
229 
230 #endif /*_ARM_MVE_TABLES_H*/
231 
232