1# 2# Copyright (c) 2015-2022, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9ifeq (${ARCH}, aarch64) 10 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 11 # DRAM (if available) or the TZC secured area of DRAM. 12 # TZC secured DRAM is the default. 13 14 ARM_TSP_RAM_LOCATION ?= dram 15 16 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 17 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 18 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 19 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 20 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 21 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 22 else 23 $(error "Unsupported ARM_TSP_RAM_LOCATION value") 24 endif 25 26 # Process flags 27 # Process ARM_BL31_IN_DRAM flag 28 ARM_BL31_IN_DRAM := 0 29 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 30 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 31else 32 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 33endif 34 35$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 36 37 38# For the original power-state parameter format, the State-ID can be encoded 39# according to the recommended encoding or zero. This flag determines which 40# State-ID encoding to be parsed. 41ARM_RECOM_STATE_ID_ENC := 0 42 43# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 44# be set. Else throw a build error. 45ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 46 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 47 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 48 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 49 endif 50endif 51 52# Process ARM_RECOM_STATE_ID_ENC flag 53$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 54$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 55 56# Process ARM_DISABLE_TRUSTED_WDOG flag 57# By default, Trusted Watchdog is always enabled unless 58# SPIN_ON_BL1_EXIT or ENABLE_RME is set 59ARM_DISABLE_TRUSTED_WDOG := 0 60ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),) 61ARM_DISABLE_TRUSTED_WDOG := 1 62endif 63$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 64$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 65 66# Process ARM_CONFIG_CNTACR 67ARM_CONFIG_CNTACR := 1 68$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 69$(eval $(call add_define,ARM_CONFIG_CNTACR)) 70 71# Process ARM_BL31_IN_DRAM flag 72ARM_BL31_IN_DRAM := 0 73$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 74$(eval $(call add_define,ARM_BL31_IN_DRAM)) 75 76# As per CCA security model, all root firmware must execute from on-chip secure 77# memory. This means we must not run BL31 from TZC-protected DRAM. 78ifeq (${ARM_BL31_IN_DRAM},1) 79 ifeq (${ENABLE_RME},1) 80 $(error "BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0") 81 endif 82endif 83 84# Process ARM_PLAT_MT flag 85ARM_PLAT_MT := 0 86$(eval $(call assert_boolean,ARM_PLAT_MT)) 87$(eval $(call add_define,ARM_PLAT_MT)) 88 89# Use translation tables library v2 by default 90ARM_XLAT_TABLES_LIB_V1 := 0 91$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 92$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 93 94# Don't have the Linux kernel as a BL33 image by default 95ARM_LINUX_KERNEL_AS_BL33 := 0 96$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 97$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 98 99ifeq (${ARM_LINUX_KERNEL_AS_BL33},1) 100 ifneq (${ARCH},aarch64) 101 ifneq (${RESET_TO_SP_MIN},1) 102 $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.") 103 endif 104 endif 105 ifndef PRELOADED_BL33_BASE 106 $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.") 107 endif 108 ifeq (${RESET_TO_BL31},1) 109 ifndef ARM_PRELOADED_DTB_BASE 110 $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is 111 used with RESET_TO_BL31.") 112 endif 113 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 114 endif 115endif 116 117# Arm Ethos-N NPU SiP service 118ARM_ETHOSN_NPU_DRIVER := 0 119$(eval $(call assert_boolean,ARM_ETHOSN_NPU_DRIVER)) 120$(eval $(call add_define,ARM_ETHOSN_NPU_DRIVER)) 121 122# Use an implementation of SHA-256 with a smaller memory footprint but reduced 123# speed. 124$(eval $(call add_define,MBEDTLS_SHA256_SMALLER)) 125 126# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 127# in the FIP if the platform requires. 128ifneq ($(BL32_EXTRA1),) 129$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 130endif 131ifneq ($(BL32_EXTRA2),) 132$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 133endif 134 135# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 136ENABLE_PSCI_STAT := 1 137ENABLE_PMF := 1 138 139# Override the standard libc with optimised libc_asm 140OVERRIDE_LIBC := 1 141ifeq (${OVERRIDE_LIBC},1) 142 include lib/libc/libc_asm.mk 143endif 144 145# On ARM platforms, separate the code and read-only data sections to allow 146# mapping the former as executable and the latter as execute-never. 147SEPARATE_CODE_AND_RODATA := 1 148 149# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS 150# and NOBITS sections of BL31 image are adjacent to each other and loaded 151# into Trusted SRAM. 152SEPARATE_NOBITS_REGION := 0 153 154# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load 155# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate 156# the build to require that ARM_BL31_IN_DRAM is enabled as well. 157ifeq ($(SEPARATE_NOBITS_REGION),1) 158 ifneq ($(ARM_BL31_IN_DRAM),1) 159 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled) 160 endif 161 ifneq ($(RECLAIM_INIT_CODE),0) 162 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported) 163 endif 164endif 165 166# Disable ARM Cryptocell by default 167ARM_CRYPTOCELL_INTEG := 0 168$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG)) 169$(eval $(call add_define,ARM_CRYPTOCELL_INTEG)) 170 171# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case 172ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 173 ENABLE_PIE := 1 174endif 175 176# CryptoCell integration relies on coherent buffers for passing data from 177# the AP CPU to the CryptoCell 178ifeq (${ARM_CRYPTOCELL_INTEG},1) 179 ifeq (${USE_COHERENT_MEM},0) 180 $(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.") 181 endif 182endif 183 184# Disable GPT parser support, use FIP image by default 185ARM_GPT_SUPPORT := 0 186$(eval $(call assert_boolean,ARM_GPT_SUPPORT)) 187$(eval $(call add_define,ARM_GPT_SUPPORT)) 188 189# Include necessary sources to parse GPT image 190ifeq (${ARM_GPT_SUPPORT}, 1) 191 BL2_SOURCES += drivers/partition/gpt.c \ 192 drivers/partition/partition.c 193endif 194 195# Enable CRC instructions via extension for ARMv8-A CPUs. 196# For ARMv8.1-A, and onwards CRC instructions are default enabled. 197# Enable HW computed CRC support unconditionally in BL2 component. 198ifeq (${ARM_ARCH_MINOR},0) 199 BL2_CPPFLAGS += -march=armv8-a+crc 200endif 201 202ifeq ($(PSA_FWU_SUPPORT),1) 203 # GPT support is recommended as per PSA FWU specification hence 204 # PSA FWU implementation is tightly coupled with GPT support, 205 # and it does not support other formats. 206 ifneq ($(ARM_GPT_SUPPORT),1) 207 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled) 208 endif 209 FWU_MK := drivers/fwu/fwu.mk 210 $(info Including ${FWU_MK}) 211 include ${FWU_MK} 212endif 213 214ifeq (${ARCH}, aarch64) 215PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 216endif 217 218PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 219 plat/arm/common/arm_common.c \ 220 plat/arm/common/arm_console.c 221 222ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 223PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 224 lib/xlat_tables/${ARCH}/xlat_tables.c 225else 226ifeq (${XLAT_MPU_LIB_V1}, 1) 227include lib/xlat_mpu/xlat_mpu.mk 228PLAT_BL_COMMON_SOURCES += ${XLAT_MPU_LIB_V1_SRCS} 229else 230include lib/xlat_tables_v2/xlat_tables.mk 231PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 232endif 233endif 234 235ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \ 236 plat/arm/common/fconf/arm_fconf_io.c 237ifeq (${SPD},spmd) 238 ifeq (${BL2_ENABLE_SP_LOAD},1) 239 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c 240 endif 241endif 242 243BL1_SOURCES += drivers/io/io_fip.c \ 244 drivers/io/io_memmap.c \ 245 drivers/io/io_storage.c \ 246 plat/arm/common/arm_bl1_setup.c \ 247 plat/arm/common/arm_err.c \ 248 ${ARM_IO_SOURCES} 249 250ifdef EL3_PAYLOAD_BASE 251# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from 252# their holding pen 253BL1_SOURCES += plat/arm/common/arm_pm.c 254endif 255 256BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 257 drivers/delay_timer/generic_delay_timer.c \ 258 drivers/io/io_fip.c \ 259 drivers/io/io_memmap.c \ 260 drivers/io/io_storage.c \ 261 plat/arm/common/arm_bl2_setup.c \ 262 plat/arm/common/arm_err.c \ 263 common/tf_crc32.c \ 264 ${ARM_IO_SOURCES} 265 266# Firmware Configuration Framework sources 267include lib/fconf/fconf.mk 268 269BL1_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 270BL2_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 271 272# Add `libfdt` and Arm common helpers required for Dynamic Config 273include lib/libfdt/libfdt.mk 274 275DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \ 276 plat/arm/common/arm_dyn_cfg_helpers.c \ 277 common/uuid.c 278 279DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES} 280 281BL1_SOURCES += ${DYN_CFG_SOURCES} 282BL2_SOURCES += ${DYN_CFG_SOURCES} 283 284ifeq (${BL2_AT_EL3},1) 285BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c 286endif 287 288# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 289# the AArch32 descriptors. 290ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 291BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 292else 293ifneq (${PLAT}, corstone1000) 294BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 295endif 296endif 297BL2_SOURCES += plat/arm/common/arm_image_load.c \ 298 common/desc_image_load.c 299ifeq (${SPD},opteed) 300BL2_SOURCES += lib/optee/optee_utils.c 301endif 302 303BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 304 drivers/delay_timer/generic_delay_timer.c \ 305 plat/arm/common/arm_bl2u_setup.c 306 307BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 308 plat/arm/common/arm_pm.c \ 309 plat/arm/common/arm_topology.c \ 310 plat/common/plat_psci_common.c 311 312ifneq ($(filter 1,${ENABLE_PMF} ${ARM_ETHOSN_NPU_DRIVER}),) 313ARM_SVC_HANDLER_SRCS := 314 315ifeq (${ENABLE_PMF},1) 316ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c 317endif 318 319ifeq (${ARM_ETHOSN_NPU_DRIVER},1) 320ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \ 321 drivers/delay_timer/delay_timer.c \ 322 drivers/arm/ethosn/ethosn_smc.c 323endif 324 325ifeq (${ARCH}, aarch64) 326BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\ 327 plat/arm/common/arm_sip_svc.c \ 328 ${ARM_SVC_HANDLER_SRCS} 329else 330BL32_SOURCES += plat/arm/common/arm_sip_svc.c \ 331 ${ARM_SVC_HANDLER_SRCS} 332endif 333endif 334 335ifeq (${EL3_EXCEPTION_HANDLING},1) 336BL31_SOURCES += plat/common/aarch64/plat_ehf.c 337endif 338 339ifeq (${SDEI_SUPPORT},1) 340BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c 341ifeq (${SDEI_IN_FCONF},1) 342BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c 343endif 344endif 345 346# RAS sources 347ifeq (${RAS_EXTENSION},1) 348BL31_SOURCES += lib/extensions/ras/std_err_record.c \ 349 lib/extensions/ras/ras_common.c 350endif 351 352# Pointer Authentication sources 353ifeq (${ENABLE_PAUTH}, 1) 354PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c \ 355 lib/extensions/pauth/pauth_helpers.S 356endif 357 358ifeq (${SPD},spmd) 359BL31_SOURCES += plat/common/plat_spmd_manifest.c \ 360 common/uuid.c \ 361 ${LIBFDT_SRCS} 362 363BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 364endif 365 366ifneq (${TRUSTED_BOARD_BOOT},0) 367 368 # Include common TBB sources 369 AUTH_SOURCES := drivers/auth/auth_mod.c \ 370 drivers/auth/img_parser_mod.c 371 372 # Include the selected chain of trust sources. 373 ifeq (${COT},tbbr) 374 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 375 drivers/auth/tbbr/tbbr_cot_bl1.c 376 ifneq (${COT_DESC_IN_DTB},0) 377 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 378 else 379 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 380 drivers/auth/tbbr/tbbr_cot_bl2.c 381 endif 382 else ifeq (${COT},dualroot) 383 AUTH_SOURCES += drivers/auth/dualroot/cot.c 384 else ifeq (${COT},cca) 385 AUTH_SOURCES += drivers/auth/cca/cot.c 386 else 387 $(error Unknown chain of trust ${COT}) 388 endif 389 390 BL1_SOURCES += ${AUTH_SOURCES} \ 391 bl1/tbbr/tbbr_img_desc.c \ 392 plat/arm/common/arm_bl1_fwu.c \ 393 plat/common/tbbr/plat_tbbr.c 394 395 BL2_SOURCES += ${AUTH_SOURCES} \ 396 plat/common/tbbr/plat_tbbr.c 397 398 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_)) 399 400 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 401 402 $(info Including ${IMG_PARSER_LIB_MK}) 403 include ${IMG_PARSER_LIB_MK} 404endif 405 406# Include Measured Boot makefile before any Crypto library makefile. 407# Crypto library makefile may need default definitions of Measured Boot build 408# flags present in Measured Boot makefile. 409ifeq (${MEASURED_BOOT},1) 410 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk 411 $(info Including ${MEASURED_BOOT_MK}) 412 include ${MEASURED_BOOT_MK} 413 414 ifneq (${MBOOT_EL_HASH_ALG}, sha256) 415 $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512)) 416 endif 417 418 BL1_SOURCES += ${EVENT_LOG_SOURCES} 419 BL2_SOURCES += ${EVENT_LOG_SOURCES} 420endif 421 422ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT}),) 423 CRYPTO_SOURCES := drivers/auth/crypto_mod.c \ 424 lib/fconf/fconf_tbbr_getter.c 425 BL1_SOURCES += ${CRYPTO_SOURCES} 426 BL2_SOURCES += ${CRYPTO_SOURCES} 427 428 # We expect to locate the *.mk files under the directories specified below 429 ifeq (${ARM_CRYPTOCELL_INTEG},0) 430 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 431 else 432 CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk 433 endif 434 435 $(info Including ${CRYPTO_LIB_MK}) 436 include ${CRYPTO_LIB_MK} 437endif 438 439ifeq (${RECLAIM_INIT_CODE}, 1) 440 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 441 $(error "To reclaim init code xlat tables v2 must be used") 442 endif 443endif 444
