1/*
2 * Copyright (c) 2019 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <arm/armv8-m.dtsi>
8#include <nordic/nrf_common.dtsi>
9#include <zephyr/dt-bindings/adc/nrf-saadc-v3.h>
10
11/ {
12	cpus {
13		#address-cells = <1>;
14		#size-cells = <0>;
15
16		cpu0: cpu@0 {
17			device_type = "cpu";
18			compatible = "arm,cortex-m33f";
19			reg = <0>;
20			#address-cells = <1>;
21			#size-cells = <1>;
22
23			itm: itm@e0000000 {
24				compatible = "arm,armv8m-itm";
25				reg = <0xe0000000 0x1000>;
26				swo-ref-frequency = <64000000>;
27			};
28
29			mpu: mpu@e000ed90 {
30				compatible = "arm,armv8m-mpu";
31				reg = <0xe000ed90 0x40>;
32			};
33		};
34	};
35
36	chosen {
37		zephyr,entropy = &rng_hci;
38		zephyr,flash-controller = &flash_controller;
39	};
40
41	soc {
42		ficr: ficr@ff0000 {
43			compatible = "nordic,nrf-ficr";
44			reg = <0xff0000 0x1000>;
45			#nordic,ficr-cells = <1>;
46			status = "okay";
47		};
48
49		uicr: uicr@ff8000 {
50			compatible = "nordic,nrf-uicr";
51			reg = <0xff8000 0x1000>;
52			status = "okay";
53		};
54
55		sram0: memory@20000000 {
56			compatible = "mmio-sram";
57		};
58
59		peripheral@50000000 {
60			#address-cells = <1>;
61			#size-cells = <1>;
62			ranges = <0x0 0x50000000 0x10000000>;
63
64			/* Common nRF5340 Application MCU
65			 * peripheral description
66			 */
67			#include "nrf5340_cpuapp_peripherals.dtsi"
68		};
69
70		/* Additional Secure peripherals */
71
72		spu: spu@50003000 {
73			compatible = "nordic,nrf-spu";
74			reg = <0x50003000 0x1000>;
75			interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>;
76			status = "okay";
77		};
78
79		/*
80		 * GPIOTE0 is always accessible as a secure peripheral,
81		 * so we give it the 'gpiote' label for use when building
82		 * code for this target.
83		 */
84		gpiote: gpiote0: gpiote@5000d000 {
85			compatible = "nordic,nrf-gpiote";
86			reg = <0x5000d000 0x1000>;
87			interrupts = <13 5>;
88			status = "disabled";
89			instance = <0>;
90		};
91
92		/* Additional Non-Secure GPIOTE instance */
93		gpiote1: gpiote@4002f000 {
94			compatible = "nordic,nrf-gpiote";
95			reg = <0x4002f000 0x1000>;
96			interrupts = <47 5>;
97			status = "disabled";
98			instance = <1>;
99		};
100
101		cryptocell: crypto@50844000 {
102			compatible = "nordic,cryptocell", "arm,cryptocell-312";
103			reg = <0x50844000 0x1000>, <0x50845000 0x1000>;
104			reg-names = "wrapper", "core";
105			interrupts = <68 NRF_DEFAULT_IRQ_PRIORITY>;
106			status = "disabled";
107		};
108	};
109
110	/* Default IPC description */
111	ipc {
112		#include "nrf5340_cpuapp_ipc.dtsi"
113	};
114};
115
116&nvic {
117	arm,num-irq-priority-bits = <3>;
118};
119
120&systick {
121	/* Use RTC for system clock, instead of SysTick. */
122	status = "disabled";
123};
124