1# 2# Copyright (c) 2022-2023, Arm Limited. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# This file lists all of the architectural features, and initializes 8# and enables them based on the configured architecture version. 9 10# This file follows the following format: 11# - Enable mandatory feature if applicable to an Arch Version. 12# - By default disable any mandatory features if they have not been defined yet. 13# - Disable or enable any optional feature this would be enabled/disabled if needed by platform. 14 15# 16################################################################################ 17# Enable Mandatory features based on Arch versions. 18################################################################################ 19# 20 21# Enable the features which are mandatory from ARCH version 8.1 and upwards. 22ifeq "8.1" "$(word 1, $(sort 8.1 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 23ENABLE_FEAT_PAN := 1 24ENABLE_FEAT_VHE := 1 25endif 26 27# Enable the features which are mandatory from ARCH version 8.2 and upwards. 28ifeq "8.2" "$(word 1, $(sort 8.2 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 29ENABLE_FEAT_RAS := 1 30endif 31 32# Enable the features which are mandatory from ARCH version 8.4 and upwards. 33ifeq "8.4" "$(word 1, $(sort 8.4 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 34ENABLE_FEAT_SEL2 := 1 35ENABLE_TRF_FOR_NS := 1 36ENABLE_FEAT_DIT := 1 37endif 38 39# Enable the features which are mandatory from ARCH version 8.5 and upwards. 40ifeq "8.5" "$(word 1, $(sort 8.5 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 41ENABLE_FEAT_RNG := 1 42ENABLE_FEAT_SB := 1 43 44# Enable Memory tagging, Branch Target Identification for aarch64 only. 45ifeq ($(ARCH), aarch64) 46 mem_tag_arch_support := yes 47endif #(ARCH=aarch64) 48 49endif 50 51# Enable the features which are mandatory from ARCH version 8.6 and upwards. 52ifeq "8.6" "$(word 1, $(sort 8.6 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 53ENABLE_FEAT_ECV := 1 54ENABLE_FEAT_FGT := 1 55endif 56 57# Enable the features which are mandatory from ARCH version 8.7 and upwards. 58ifeq "8.7" "$(word 1, $(sort 8.7 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 59ENABLE_FEAT_HCX := 1 60endif 61 62# Enable the features which are mandatory from ARCH version 8.9 and upwards. 63ifeq "8.9" "$(word 1, $(sort 8.9 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 64ENABLE_FEAT_TCR2 := 1 65endif 66 67# 68################################################################################ 69# Set mandatory features by default to zero. 70################################################################################ 71# 72 73#---- 74# 8.1 75#---- 76 77# Flag to enable access to Privileged Access Never bit of PSTATE. 78ENABLE_FEAT_PAN ?= 0 79 80# Flag to enable Virtualization Host Extensions. 81ENABLE_FEAT_VHE ?= 0 82 83#---- 84# 8.2 85#---- 86 87# Enable RAS Support. 88ENABLE_FEAT_RAS ?= 0 89 90#---- 91# 8.3 92#---- 93 94# Flag to enable Pointer Authentication. Internal flag not meant for 95# direct setting. Use BRANCH_PROTECTION to enable PAUTH. 96ENABLE_PAUTH ?= 0 97 98# Include pointer authentication (ARMv8.3-PAuth) registers in cpu context. This 99# must be set to 1 if the platform wants to use this feature in the Secure 100# world. It is not necessary for use in the Non-secure world. 101CTX_INCLUDE_PAUTH_REGS ?= 0 102 103 104#---- 105# 8.4 106#---- 107 108# Flag to enable Secure EL-2 feature. 109ENABLE_FEAT_SEL2 ?= 0 110 111# By default, disable trace filter control register access to lower non-secure 112# exception levels, i.e. NS-EL2, or NS-EL1 if NS-EL2 is implemented, but 113# trace filter control register access is unused if FEAT_TRF is implemented. 114ENABLE_TRF_FOR_NS ?= 0 115 116# Flag to enable Data Independent Timing instructions. 117ENABLE_FEAT_DIT ?= 0 118 119#---- 120# 8.5 121#---- 122 123# Flag to enable Branch Target Identification. 124# Internal flag not meant for direct setting. 125# Use BRANCH_PROTECTION to enable BTI. 126ENABLE_BTI ?= 0 127 128# Flag to enable access to the Random Number Generator registers. 129ENABLE_FEAT_RNG ?= 0 130 131# Flag to enable Speculation Barrier Instruction. 132ENABLE_FEAT_SB ?= 0 133 134#---- 135# 8.6 136#---- 137 138# Flag to enable access to the CNTPOFF_EL2 register. 139ENABLE_FEAT_ECV ?= 0 140 141# Flag to enable access to the HDFGRTR_EL2 register. 142ENABLE_FEAT_FGT ?= 0 143 144#---- 145# 8.7 146#---- 147 148# Flag to enable access to the HCRX_EL2 register by setting SCR_EL3.HXEn. 149ENABLE_FEAT_HCX ?= 0 150 151#---- 152# 8.9 153#---- 154 155# Flag to enable access to TCR2 (FEAT_TCR2). 156ENABLE_FEAT_TCR2 ?= 0 157 158# 159################################################################################ 160# Optional Features defaulted to 0 or 2, if they are not enabled from 161# build option. Can also be disabled or enabled by platform if needed. 162################################################################################ 163# 164 165#---- 166# 8.0 167#---- 168 169# Flag to enable CSV2_2 extension. 170ENABLE_FEAT_CSV2_2 ?= 0 171 172# By default, disable access of trace system registers from NS lower 173# ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused if 174# system register trace is implemented. This feature is available if 175# trace unit such as ETMv4.x, This feature is OPTIONAL and is only 176# permitted in Armv8 implementations. 177ENABLE_SYS_REG_TRACE_FOR_NS ?= 0 178 179#---- 180# 8.2 181#---- 182 183# Build option to enable/disable the Statistical Profiling Extension, 184# keep it enabled by default for AArch64. 185ifeq (${ARCH},aarch64) 186 ENABLE_SPE_FOR_NS ?= 2 187else ifeq (${ARCH},aarch32) 188 ifneq ($(or $(ENABLE_SPE_FOR_NS),0),0) 189 $(error ENABLE_SPE_FOR_NS is not supported for AArch32) 190 else 191 ENABLE_SPE_FOR_NS := 0 192 endif 193endif 194 195# Enable SVE for non-secure world by default. 196ifeq (${ARCH},aarch64) 197 ENABLE_SVE_FOR_NS ?= 2 198# SVE is only supported on AArch64 so disable it on AArch32. 199else ifeq (${ARCH},aarch32) 200 ifneq ($(or $(ENABLE_SVE_FOR_NS),0),0) 201 $(error ENABLE_SVE_FOR_NS is not supported for AArch32) 202 else 203 ENABLE_SVE_FOR_NS := 0 204 endif 205endif 206 207#---- 208# 8.4 209#---- 210 211# Feature flags for supporting Activity monitor extensions. 212ENABLE_FEAT_AMU ?= 0 213ENABLE_AMU_AUXILIARY_COUNTERS ?= 0 214ENABLE_AMU_FCONF ?= 0 215AMU_RESTRICT_COUNTERS ?= 0 216 217# Build option to enable MPAM for lower ELs. 218# Enabling it by default 219ifeq (${ARCH},aarch64) 220 ENABLE_FEAT_MPAM ?= 2 221else ifeq (${ARCH},aarch32) 222 ifneq ($(or $(ENABLE_FEAT_MPAM),0),0) 223 $(error ENABLE_FEAT_MPAM is not supported for AArch32) 224 else 225 ENABLE_FEAT_MPAM := 0 226 endif 227endif 228 229# Include nested virtualization control (Armv8.4-NV) registers in cpu context. 230# This must be set to 1 if architecture implements Nested Virtualization 231# Extension and platform wants to use this feature in the Secure world. 232CTX_INCLUDE_NEVE_REGS ?= 0 233 234#---- 235# 8.5 236#---- 237 238# Flag to enable support for EL3 trapping of reads of the RNDR and RNDRRS 239# registers, by setting SCR_EL3.TRNDR. 240ENABLE_FEAT_RNG_TRAP ?= 0 241 242# Include Memory Tagging Extension registers in cpu context. This must be set 243# to 1 if the platform wants to use this feature in the Secure world and MTE is 244# enabled at ELX. 245CTX_INCLUDE_MTE_REGS ?= 0 246 247#---- 248# 8.6 249#---- 250 251# Flag to enable AMUv1p1 extension. 252ENABLE_FEAT_AMUv1p1 ?= 0 253 254# Flag to enable delayed trapping of WFE instruction (FEAT_TWED). 255ENABLE_FEAT_TWED ?= 0 256 257# In v8.6+ platforms with delayed trapping of WFE being supported 258# via FEAT_TWED, this flag takes the delay value to be set in the 259# SCR_EL3.TWEDEL(4bit) field, when FEAT_TWED is implemented. 260# By default it takes 0, and need to be updated by the platforms. 261TWED_DELAY ?= 0 262 263# Disable MTPMU if FEAT_MTPMU is supported. 264DISABLE_MTPMU ?= 0 265 266#---- 267# 8.9 268#---- 269 270# Flag to enable NoTagAccess memory region attribute for stage 2 of translation. 271ENABLE_FEAT_MTE_PERM ?= 0 272 273# Flag to enable access to Stage 2 Permission Indirection (FEAT_S2PIE). 274ENABLE_FEAT_S2PIE ?= 0 275 276# Flag to enable access to Stage 1 Permission Indirection (FEAT_S1PIE). 277ENABLE_FEAT_S1PIE ?= 0 278 279# Flag to enable access to Stage 2 Permission Overlay (FEAT_S2POE). 280ENABLE_FEAT_S2POE ?= 0 281 282# Flag to enable access to Stage 1 Permission Overlay (FEAT_S1POE). 283ENABLE_FEAT_S1POE ?= 0 284 285#---- 286# 9.0 287#---- 288 289# Flag to enable Realm Management Extension (FEAT_RME). 290ENABLE_RME ?= 0 291 292# Scalable Matrix Extension for non-secure world. 293ENABLE_SME_FOR_NS ?= 0 294 295# Scalable Vector Extension for secure world. 296ENABLE_SVE_FOR_SWD ?= 0 297 298# By default, disable access of trace buffer control registers from NS 299# lower ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused 300# if FEAT_TRBE is implemented. 301# Note FEAT_TRBE is only supported on AArch64 - therefore do not enable in 302# AArch32. 303ifeq (${ARCH},aarch64) 304 ENABLE_TRBE_FOR_NS ?= 0 305else ifeq (${ARCH},aarch32) 306 ifneq ($(or $(ENABLE_TRBE_FOR_NS),0),0) 307 $(error ENABLE_TRBE_FOR_NS is not supported for AArch32) 308 else 309 ENABLE_TRBE_FOR_NS := 0 310 endif 311endif 312 313#---- 314# 9.2 315#---- 316 317# Scalable Matrix Extension version 2 for non-secure world. 318ENABLE_SME2_FOR_NS ?= 0 319 320# Scalable Matrix Extension for secure world. 321ENABLE_SME_FOR_SWD ?= 0 322 323# By default, disable access to branch record buffer control registers from NS 324# lower ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused 325# if FEAT_BRBE is implemented. 326ENABLE_BRBE_FOR_NS ?= 0 327 328#---- 329#9.4 330#---- 331 332# Flag to enable access to Guarded Control Stack (FEAT_GCS). 333ENABLE_FEAT_GCS ?= 0 334
