1 /*
2  * Copyright (c) 2016 Cadence Design Systems, Inc.
3  * SPDX-License-Identifier: Apache-2.0
4  */
5 
6 #include <zephyr/kernel.h>
7 #include <zephyr/arch/cpu.h>
8 #include <zephyr/kernel_structs.h>
9 #include <inttypes.h>
10 #include <xtensa/config/specreg.h>
11 #include <xtensa-asm2-context.h>
12 #if defined(CONFIG_XTENSA_ENABLE_BACKTRACE)
13 #if XCHAL_HAVE_WINDOWED
14 #include <xtensa_backtrace.h>
15 #endif
16 #endif
17 #include <zephyr/debug/coredump.h>
18 #include <zephyr/logging/log.h>
19 LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
20 
21 #ifdef XT_SIMULATOR
22 #include <xtensa/simcall.h>
23 #endif
24 
25 /* Need to do this as a macro since regnum must be an immediate value */
26 #define get_sreg(regnum_p) ({ \
27 	unsigned int retval; \
28 	__asm__ volatile( \
29 	    "rsr %[retval], %[regnum]\n\t" \
30 	    : [retval] "=r" (retval) \
31 	    : [regnum] "i" (regnum_p)); \
32 	retval; \
33 	})
34 
35 
z_xtensa_exccause(unsigned int cause_code)36 char *z_xtensa_exccause(unsigned int cause_code)
37 {
38 #if defined(CONFIG_PRINTK) || defined(CONFIG_LOG)
39 	switch (cause_code) {
40 	case 0:
41 		return "illegal instruction";
42 	case 1:
43 		return "syscall";
44 	case 2:
45 		return "instr fetch error";
46 	case 3:
47 		return "load/store error";
48 	case 4:
49 		return "level-1 interrupt";
50 	case 5:
51 		return "alloca";
52 	case 6:
53 		return "divide by zero";
54 	case 8:
55 		return "privileged";
56 	case 9:
57 		return "load/store alignment";
58 	case 12:
59 		return "instr PIF data error";
60 	case 13:
61 		return "load/store PIF data error";
62 	case 14:
63 		return "instr PIF addr error";
64 	case 15:
65 		return "load/store PIF addr error";
66 	case 16:
67 		return "instr TLB miss";
68 	case 17:
69 		return "instr TLB multi hit";
70 	case 18:
71 		return "instr fetch privilege";
72 	case 20:
73 		return "inst fetch prohibited";
74 	case 24:
75 		return "load/store TLB miss";
76 	case 25:
77 		return "load/store TLB multi hit";
78 	case 26:
79 		return "load/store privilege";
80 	case 28:
81 		return "load prohibited";
82 	case 29:
83 		return "store prohibited";
84 	case 32: case 33: case 34: case 35: case 36: case 37: case 38: case 39:
85 		return "coprocessor disabled";
86 	case 63:
87 		/* i.e. z_except_reason */
88 		return "zephyr exception";
89 	default:
90 		return "unknown/reserved";
91 	}
92 #else
93 	ARG_UNUSED(cause_code);
94 	return "na";
95 #endif
96 }
97 
z_xtensa_fatal_error(unsigned int reason,const z_arch_esf_t * esf)98 void z_xtensa_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
99 {
100 	if (esf) {
101 		/* Don't want to get elbowed by xtensa_switch
102 		 * in between printing registers and dumping them;
103 		 * corrupts backtrace
104 		 */
105 		unsigned int key = arch_irq_lock();
106 
107 		z_xtensa_dump_stack(esf);
108 
109 		coredump(reason, esf, IS_ENABLED(CONFIG_MULTITHREADING) ? k_current_get() : NULL);
110 
111 #if defined(CONFIG_XTENSA_ENABLE_BACKTRACE)
112 #if XCHAL_HAVE_WINDOWED
113 		z_xtensa_backtrace_print(100, (int *)esf);
114 #endif
115 #endif
116 
117 		arch_irq_unlock(key);
118 	}
119 
120 	z_fatal_error(reason, esf);
121 }
122 
123 #ifdef XT_SIMULATOR
exit(int return_code)124 void exit(int return_code)
125 {
126 	__asm__ (
127 	    "mov a3, %[code]\n\t"
128 	    "movi a2, %[call]\n\t"
129 	    "simcall\n\t"
130 	    :
131 	    : [code] "r" (return_code), [call] "i" (SYS_exit)
132 	    : "a3", "a2");
133 }
134 #endif
135 
136 #ifdef XT_SIMULATOR
z_system_halt(unsigned int reason)137 FUNC_NORETURN void z_system_halt(unsigned int reason)
138 {
139 	exit(255 - reason);
140 	CODE_UNREACHABLE;
141 }
142 #endif
143