1 //***************************************************************************** 2 // 3 //! @file am_hal_mpu.h 4 //! 5 //! @brief Hardware abstraction for the Memory Protection Unit. 6 //! 7 //! @addtogroup mpu_4p MPU - Memory Protection Unit 8 //! @ingroup apollo4p_hal 9 //! @{ 10 // 11 //***************************************************************************** 12 13 //***************************************************************************** 14 // 15 // Copyright (c) 2023, Ambiq Micro, Inc. 16 // All rights reserved. 17 // 18 // Redistribution and use in source and binary forms, with or without 19 // modification, are permitted provided that the following conditions are met: 20 // 21 // 1. Redistributions of source code must retain the above copyright notice, 22 // this list of conditions and the following disclaimer. 23 // 24 // 2. Redistributions in binary form must reproduce the above copyright 25 // notice, this list of conditions and the following disclaimer in the 26 // documentation and/or other materials provided with the distribution. 27 // 28 // 3. Neither the name of the copyright holder nor the names of its 29 // contributors may be used to endorse or promote products derived from this 30 // software without specific prior written permission. 31 // 32 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 33 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 36 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 37 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 38 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 39 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 40 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 41 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 42 // POSSIBILITY OF SUCH DAMAGE. 43 // 44 // This is part of revision release_sdk_4_4_0-3c5977e664 of the AmbiqSuite Development Package. 45 // 46 //***************************************************************************** 47 48 #ifndef AM_HAL_MPU_H 49 #define AM_HAL_MPU_H 50 51 #include <stdint.h> 52 #include <stdbool.h> 53 #include "am_mcu_apollo.h" 54 55 #ifdef __cplusplus 56 extern "C" 57 { 58 #endif 59 60 // 61 //! Default value to use for TEX,S,C,B 62 // 63 #define MPU_DEFAULT_TEXSCB ((MPU_RASR_B_Msk | MPU_RASR_S_Msk)) // 0x00050000 64 65 //***************************************************************************** 66 // 67 //! @name Macro definitions for system control block registers 68 //! @{ 69 // 70 //***************************************************************************** 71 #define AM_REG_SYSCTRL_MMFSR 0xE000ED28 72 #define AM_REG_SYSCTRL_MMFAR 0xE000ED34 73 //! @} 74 75 76 //***************************************************************************** 77 // 78 // External variable definitions 79 // 80 //***************************************************************************** 81 82 //***************************************************************************** 83 // 84 // Structure definitions. 85 // 86 //***************************************************************************** 87 88 // 89 //! @brief Enum type for specifying memory access privileges for an MPU region. 90 // 91 typedef enum 92 { 93 NO_ACCESS = ARM_MPU_AP_NONE, 94 PRIV_RW = ARM_MPU_AP_PRIV, 95 PRIV_RW_PUB_RO = ARM_MPU_AP_URO, 96 PRIV_RW_PUB_RW = ARM_MPU_AP_FULL, 97 PRIV_RO = ARM_MPU_AP_PRO, 98 PRIV_RO_PUB_RO = ARM_MPU_AP_RO, 99 PRIV_FORCE_X32 = 0x7FFFFFFF, 100 } 101 tAccessPermission; 102 103 // 104 //! @brief Configuration structure for MPU regions. 105 // 106 typedef struct 107 { 108 uint32_t ui32BaseAddress; 109 tAccessPermission eAccessPermission; 110 uint16_t ui16SubRegionDisable; 111 uint8_t ui8RegionNumber; 112 uint8_t ui8Size; 113 bool bExecuteNever; 114 } 115 tMPURegion; 116 117 //***************************************************************************** 118 // 119 // External function definitions 120 // 121 //***************************************************************************** 122 123 //***************************************************************************** 124 // 125 //! @brief Returns the contents of the MPU_TYPE register 126 //! 127 //! @param pui32Type pointer to 32-bit unsigned integer representing 128 //! the contents of MPU_TYPE 129 //! 130 //! This function accesses the ARM MPU_TYPE register. It can be used to check 131 //! for the presence of an MPU, and to obtain basic information about the 132 //! implementation of the MPU. 133 //! 134 //! @return standard hal status 135 // 136 //***************************************************************************** 137 extern uint32_t am_hal_mpu_type_get(uint32_t *pui32Type); 138 //#define mpu_type_get am_hal_mpu_type_get 139 140 //***************************************************************************** 141 // 142 //! @brief Sets the global configuration of the MPU 143 //! 144 //! @param bMPUEnable - Enable the MPU 145 //! @param bPrivilegedDefault - Enable the default priveleged memory map 146 //! @param bFaultNMIProtect - Enable the MPU during fault handlers 147 //! 148 //! This function is a wrapper for the MPU_CTRL register, which controls the 149 //! global configuration of the MPU. This function can enable or disable the 150 //! MPU overall with the \e bMPUEnable parameter, and also controls how fault 151 //! handlers, NMI service routines, and privileged-mode execution is handled by 152 //! the MPU. 153 //! 154 //! Setting \e bPrivilegedDefault will enable the default memory map for 155 //! privileged accesses. If the MPU is enabled with this value set, only 156 //! privileged code can execute from the system address map 157 //! 158 //! Setting \e bFaultNMIProtect leaves the MPU active during the execution of 159 //! NMI and Hard Fault handlers. Clearing this value will disable the MPU 160 //! during these procedures. 161 //! 162 //! @return standard hal status 163 // 164 //***************************************************************************** 165 extern uint32_t am_hal_mpu_global_configure(bool bMPUEnable, 166 bool bPrivilegedDefault, 167 bool bFaultNMIProtect); 168 #define mpu_global_configure am_hal_mpu_global_configure 169 170 //***************************************************************************** 171 // 172 //! @brief Configures an MPU region. 173 //! 174 //! @param psConfig 175 //! @param bEnableNow 176 //! 177 //! @details This function performs the necessary configuration for the MPU region 178 //! described by the \e psConfig structure, and will also enable the region if 179 //! the \e bEnableNow option is true. 180 //! 181 //! @return standard hal status 182 // 183 //***************************************************************************** 184 extern uint32_t am_hal_mpu_region_configure(tMPURegion *psConfig, bool bEnableNow); 185 #define mpu_region_configure am_hal_mpu_region_configure 186 187 //***************************************************************************** 188 // 189 //! @brief Enable an MPU region. 190 //! 191 //! @param ui8RegionNumber 192 //! 193 //! @details Enable the MPU region referred to by \e ui8RegionNumber. 194 //! 195 //! @note This function should only be called after the desired region has 196 //! already been configured. 197 //! 198 //! @return standard hal status 199 // 200 //***************************************************************************** 201 extern uint32_t am_hal_mpu_region_enable(uint8_t ui8RegionNumber); 202 #define mpu_region_enable am_hal_mpu_region_enable 203 204 //***************************************************************************** 205 // 206 //! @brief Disable an MPU region. 207 //! 208 //! @param ui8RegionNumber 209 //! 210 //! @details Disable the MPU region referred to by \e ui8RegionNumber. 211 //! 212 //! 213 //! @return standard hal status 214 // 215 //***************************************************************************** 216 extern uint32_t am_hal_mpu_region_disable(uint8_t ui8RegionNumber); 217 #define mpu_region_disable am_hal_mpu_region_disable 218 219 //***************************************************************************** 220 // 221 //! @brief Get the MPU region number. 222 //! 223 //! @param ui32pMpuRNR - pointer to 32-bit unsigned int where region number 224 //! will be returned 225 //! 226 //! @details Get the MPU region number from MPU_RNR register. 227 //! 228 //! @return standard hal status 229 // 230 //***************************************************************************** 231 extern uint32_t am_hal_mpu_get_region_number(uint32_t *ui32pMpuRNR); 232 //#define mpu_get_region_number am_hal_mpu_get_region_number 233 234 #ifdef __cplusplus 235 } 236 #endif 237 238 #endif // AM_HAL_MPU_H 239 240 //***************************************************************************** 241 // 242 // End Doxygen group. 243 //! @} 244 // 245 //***************************************************************************** 246 247
