1//######################################################################################### 2// Copyright (c) 2022 Texas Instruments Incorporated 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are met: 6// 7// 1) Redistributions of source code must retain the above copyright notice, 8// this list of conditions and the following disclaimer. 9// 10// 2) Redistributions in binary form must reproduce the above copyright notice, 11// this list of conditions and the following disclaimer in the documentation 12// and/or other materials provided with the distribution. 13// 14// 3) Neither the name of the copyright holder nor the names of its contributors may 15// be used to endorse or promote products derived from this software without 16// specific prior written permission. 17// 18// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28// POSSIBILITY OF SUCH DAMAGE. 29// 30//######################################################################################### 31// Filename: aes_ticlang.s 32// Description: Low level AES functions 33// Language: GNU Assembly for ARM 34// Processor: ARM Cortex M0 35// Compiler: TI CLANG 36//######################################################################################### 37 38 .syntax unified 39 .file "aes_ticlang.s" 40 41//----------------------------------------------------------------------------------------- 42// Macros 43//----------------------------------------------------------------------------------------- 44 45 .macro .start_function name 46 .text 47 .align 2 48 .thumb 49 .global \name 50 .thumb_func 51 .type \name, %function 52 .cfi_startproc 53 .endm 54 55 .macro .end_function name 56 .cfi_endproc 57 .endm 58 59 60//----------------------------------------------------------------------------------------- 61// AESProcessAlignedBlocksCMAC 62//----------------------------------------------------------------------------------------- 63 .start_function AESProcessAlignedBlocksCMAC 64 65 input .req R0 66 blocks .req R1 67 buf0 .req R2 68 69AESProcessAlignedBlocksCMAC: 70 PUSH {R4-R6} 71 72CMAC_WRITE_BLOCK: 73 LDM input!, {R3-R6} // Read input block (4 words) 74 LDR buf0, AES_BUF0_ADDR // buf0 = AES BUF0 register addr 75 STM buf0!, {R3-R6} // Write input block to AES BUF regs 76 SUBS blocks, blocks, #0x1 // Decrement block cnt by 1 77 BNE CMAC_WRITE_BLOCK 78 79 POP {R4-R6} 80 BX LR 81 82 .end_function AESProcessAlignedBlocksCMAC 83 84 .unreq input 85 .unreq blocks 86 .unreq buf0 87 88 89//----------------------------------------------------------------------------------------- 90// AESProcessAlignedBlocksCTR 91//----------------------------------------------------------------------------------------- 92 .start_function AESProcessAlignedBlocksCTR 93 94 input .req R0 95 output .req R1 96 blocks .req R2 97 dst .req R3 98 99AESProcessAlignedBlocksCTR: 100 101 PUSH {R4-R7} 102 103CTR_PROCESS_BLOCK: 104 LDM input!, {R4-R7} // Read input block (4 words) 105 LDR dst, AES_TXTX0_ADDR // dst = AES TXTX0 register addr 106 STM dst!, {R4-R7} // Write input block to AES TXTX regs 107 LDR dst, AES_TXT0_ADDR // dst = AES TXT0 register addr 108 LDM dst!, {R4-R7} // Read output block from TXT regs (4 words) 109 STM output!, {R4-R7} // Write output block (4 words) 110 SUBS blocks, blocks, #0x1 // Decrement block cnt by 1 111 BNE CTR_PROCESS_BLOCK 112 113 POP {R4-R7} 114 BX LR 115 116 .end_function AESProcessAlignedBlocksCTR 117 118 .unreq input 119 .unreq output 120 .unreq blocks 121 .unreq dst 122 123 124//----------------------------------------------------------------------------------------- 125// AESProcessAlignedBlocksECB 126//----------------------------------------------------------------------------------------- 127 .start_function AESProcessAlignedBlocksECB 128 129 input .req R0 130 output .req R1 131 blocks .req R2 132 dst .req R3 133 134AESProcessAlignedBlocksECB: 135 136 PUSH {R4-R7} 137 138 LDM input!, {R4-R7} // Read first input block (4 words) 139 LDR dst, AES_BUF0_ADDR // dst = AES BUF0 register addr 140 STM dst!, {R4-R7} // Write first input block to AES TXTX regs 141 SUBS blocks, blocks, #0x1 // Decrement block cnt by 1 142 BEQ ECB_READ_FINAL_OUTPUT 143 144ECB_PROCESS_BLOCK: 145 LDM input!, {R4-R7} // Read input block (4 words) 146 LDR dst, AES_BUF0_ADDR // dst = AES BUF0 register addr 147 STM dst!, {R4-R7} // Write input block to AES TXTX regs 148 LDR dst, AES_TXT0_ADDR // dst = AES TXT0 register addr 149 LDM dst!, {R4-R7} // Read output block from TXT regs (4 words) 150 STM output!, {R4-R7} // Write output block (4 words) 151 SUBS blocks, blocks, #0x1 // Decrement block cnt by 1 152 BNE ECB_PROCESS_BLOCK 153 154ECB_READ_FINAL_OUTPUT: 155 // Clear the AUTOCFG trigger mask to avoid triggering a spurious encryption 156 // upon reading the TXT3 register. 157 LDR R3, AES_AUTOCFG_ADDR // R3 = AES AUTOCFG register addr 158 LDR R4, [R3] // R4 = AES AUTOCFG register value 159 MOVS R5, #0xF // R5 = TRGECB_MASK 160 BICS R4, R4, R5 // R4 = AUTOCFG & ~TRGECB_MASK 161 STR R4, [R3] // Write modified AUTOCFG value 162 163 LDR dst, AES_TXT0_ADDR // dst = AES TXT0 register addr 164 LDM dst!, {R4-R7} // Read final output block from TXT regs (4 words) 165 STM output!, {R4-R7} // Write final output block (4 words) 166 167 POP {R4-R7} 168 BX LR 169 170 .end_function AESProcessAlignedBlocksECB 171 172 .unreq input 173 .unreq output 174 .unreq blocks 175 .unreq dst 176 177//----------------------------------------------------------------------------------------- 178// Constants 179//----------------------------------------------------------------------------------------- 180 .align 4 181AES_AUTOCFG_ADDR: 182 .word 0x400C002C // AES AUTOCFG register addr 183AES_TXT0_ADDR: 184 .word 0x400C0070 // AES TXT0 register addr 185AES_TXTX0_ADDR: 186 .word 0x400C0080 // AES TXTX0 register addr 187AES_BUF0_ADDR: 188 .word 0x400C0090 // AES BUF0 register addr 189 190 191//----------------------------------------------------------------------------------------- 192// AESCopyBlock 193//----------------------------------------------------------------------------------------- 194 .start_function AESCopyBlock 195 196 dst .req R0 197 src .req R1 198 tmp .req R2 199 len .req R3 200 201AESCopyBlock: 202 203 LSLS tmp, dst, #0x1e // dst << 30 204 BNE UNALIGNED_COPY 205 LSLS tmp, src, #0x1e // src << 30 206 BNE UNALIGNED_COPY 207 208WORD_ALIGNED_COPY: 209 PUSH {R4-R5} 210 LDM src!, {R2-R5} // Read src block (4 words) 211 STM dst!, {R2-R5} // dst block = src block 212 POP {R4-R5} 213 BX LR 214 215UNALIGNED_COPY: 216 MOVS len, #16 // len = 16 bytes 217UNALIGNED_COPY_LOOP: 218 LDRB tmp, [src] // tmp = src[i] 219 STRB tmp, [dst] // dst[i] = src[i] 220 ADDS src, src, #1 // Increment src ptr by 1 221 ADDS dst, dst, #1 // Increment dst ptr by 1 222 SUBS len, #1 // Decrement len by 1 223 BNE UNALIGNED_COPY_LOOP 224 BX LR 225 226 .end_function AESCopyBlock 227 228 .unreq dst 229 .unreq src 230 .unreq tmp 231 .unreq len 232