1/*
2 * Copyright (c) 2022 Embla Flatlandsmo <embla.flatlandsmo@gmail.com>
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6&pinctrl {
7	uart0_default: uart0_default {
8		group1 {
9			psels = <NRF_PSEL(UART_TX, 0, 24)>,
10				<NRF_PSEL(UART_RX, 0, 25)>;
11		};
12	};
13
14	uart0_sleep: uart0_sleep {
15		group1 {
16			psels = <NRF_PSEL(UART_TX, 0, 24)>,
17				<NRF_PSEL(UART_RX, 0, 25)>;
18			low-power-enable;
19		};
20	};
21
22	i2c0_default: i2c0_default {
23		group1 {
24			psels = <NRF_PSEL(TWIM_SDA, 0, 16)>,
25				<NRF_PSEL(TWIM_SCL, 0, 14)>;
26		};
27	};
28
29	i2c0_sleep: i2c0_sleep {
30		group1 {
31			psels = <NRF_PSEL(TWIM_SDA, 0, 16)>,
32				<NRF_PSEL(TWIM_SCL, 0, 14)>;
33			low-power-enable;
34		};
35	};
36
37	spi2_default: spi2_default {
38		group1 {
39			psels = <NRF_PSEL(SPIM_SCK, 1, 9)>,
40				<NRF_PSEL(SPIM_MOSI, 0, 8)>;
41		};
42	};
43
44	spi2_sleep: spi2_sleep {
45		group1 {
46			psels = <NRF_PSEL(SPIM_SCK, 1, 9)>,
47				<NRF_PSEL(SPIM_MOSI, 0, 8)>;
48			low-power-enable;
49		};
50	};
51
52	spi1_default: spi1_default {
53		group1 {
54			psels = <NRF_PSEL(SPIM_SCK, 0, 13)>,
55				<NRF_PSEL(SPIM_MOSI, 0, 15)>,
56				<NRF_PSEL(SPIM_MISO, 0, 20)>;
57		};
58	};
59
60	spi1_sleep: spi1_sleep {
61		group1 {
62			psels = <NRF_PSEL(SPIM_SCK, 0, 13)>,
63				<NRF_PSEL(SPIM_MOSI, 0, 15)>,
64				<NRF_PSEL(SPIM_MISO, 0, 20)>;
65			low-power-enable;
66		};
67	};
68
69	qspi_default: qspi_default {
70		group1 {
71			psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
72				<NRF_PSEL(QSPI_IO0, 0, 21)>,
73				<NRF_PSEL(QSPI_IO1, 0, 22)>,
74				<NRF_PSEL(QSPI_IO2, 1, 00)>,
75				<NRF_PSEL(QSPI_IO3, 0, 17)>,
76				<NRF_PSEL(QSPI_CSN, 0, 23)>;
77		};
78	};
79
80	qspi_sleep: qspi_sleep {
81		group1 {
82			psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
83				<NRF_PSEL(QSPI_IO0, 0, 21)>,
84				<NRF_PSEL(QSPI_IO1, 0, 22)>,
85				<NRF_PSEL(QSPI_IO2, 1, 00)>,
86				<NRF_PSEL(QSPI_IO3, 0, 17)>,
87				<NRF_PSEL(QSPI_CSN, 0, 23)>;
88			low-power-enable;
89		};
90	};
91};
92