1 /**************************************************************************//** 2 * @file acmp_reg.h 3 * @version V1.00 4 * @brief ACMP register definition header file 5 * 6 * @copyright SPDX-License-Identifier: Apache-2.0 7 * @copyright Copyright (C) 2020 Nuvoton Technology Corp. All rights reserved. 8 *****************************************************************************/ 9 #ifndef __ACMP_REG_H__ 10 #define __ACMP_REG_H__ 11 12 /** @addtogroup REGISTER Control Register 13 14 @{ 15 16 */ 17 18 19 /*---------------------- Analog Comparator Controller -------------------------*/ 20 /** 21 @addtogroup ACMP Analog Comparator Controller(ACMP) 22 Memory Mapped Structure for ACMP Controller 23 @{ 24 */ 25 26 typedef struct 27 { 28 29 30 /** 31 * @var ACMP_T::CTL 32 * Offset: 0x00 Analog Comparator 0 Control Register 33 * --------------------------------------------------------------------------------------------------- 34 * |Bits |Field |Descriptions 35 * | :----: | :----: | :---- | 36 * |[0] |ACMPEN |Comparator Enable Bit 37 * | | |0 = Comparator 0 Disabled. 38 * | | |1 = Comparator 0 Enabled. 39 * |[1] |ACMPIE |Comparator Interrupt Enable Bit 40 * | | |0 = Comparator 0 interrupt Disabled. 41 * | | |1 = Comparator 0 interrupt Enabled. 42 * | | |If WKEN (ACMP_CTL0[16]) is set to 1, the wake-up interrupt function will be enabled as well. 43 * |[2] |HYSEN |Comparator Hysteresis Enable Bit 44 * | | |0 = Comparator 0 hysteresis Disabled. 45 * | | |1 = Comparator 0 hysteresis Enabled. 46 * | | |Note: If HYSEN = 0, user can adjust HYS by HYSSEL. 47 * | | |Note: If HYSEN = 1, HYSSEL is invalid. The Hysteresis is fixed to 30mV. 48 * |[3] |ACMPOINV |Comparator Output Inverse 49 * | | |0 = Comparator 0 output inverse Disabled. 50 * | | |1 = Comparator 0 output inverse Enabled. 51 * |[5:4] |NEGSEL |Comparator Negative Input Selection 52 * | | |00 = ACMP0_N pin. 53 * | | |01 = Internal comparator reference voltage (CRV). 54 * | | |10 = Band-gap voltage. 55 * | | |11 = DAC output. 56 * |[7:6] |POSSEL |Comparator Positive Input Selection 57 * | | |00 = Input from ACMP0_P0. 58 * | | |01 = Input from ACMP0_P1. 59 * | | |10 = Input from ACMP0_P2. 60 * | | |11 = Input from ACMP0_P3. 61 * |[9:8] |INTPOL |Interrupt Condition Polarity Selection 62 * | | |ACMPIF0 will be set to 1 when comparator output edge condition is detected. 63 * | | |00 = Rising edge or falling edge. 64 * | | |01 = Rising edge. 65 * | | |10 = Falling edge. 66 * | | |11 = Reserved. 67 * |[12] |OUTSEL |Comparator Output Select 68 * | | |0 = Comparator 0 output to ACMP0_O pin is unfiltered comparator output. 69 * | | |1 = Comparator 0 output to ACMP0_O pin is from filter output. 70 * |[15:13] |FILTSEL |Comparator Output Filter Count Selection 71 * | | |000 = Filter function is Disabled. 72 * | | |001 = ACMP0 output is sampled 1 consecutive PCLK. 73 * | | |010 = ACMP0 output is sampled 2 consecutive PCLKs. 74 * | | |011 = ACMP0 output is sampled 4 consecutive PCLKs. 75 * | | |100 = ACMP0 output is sampled 8 consecutive PCLKs. 76 * | | |101 = ACMP0 output is sampled 16 consecutive PCLKs. 77 * | | |110 = ACMP0 output is sampled 32 consecutive PCLKs. 78 * | | |111 = ACMP0 output is sampled 64 consecutive PCLKs. 79 * |[16] |WKEN |Power-down Wake-up Enable Bit 80 * | | |0 = Wake-up function Disabled. 81 * | | |1 = Wake-up function Enabled. 82 * |[17] |WLATEN |Window Latch Mode Enable Bit 83 * | | |0 = Window Latch Mode Disabled. 84 * | | |1 = Window Latch Mode Enabled. 85 * |[18] |WCMPSEL |Window Compare Mode Selection 86 * | | |0 = Window Compare Mode Disabled. 87 * | | |1 = Window Compare Mode is Selected. 88 * |[25:24] |HYSSEL |Hysteresis Mode Selection 89 * | | |00 = Hysteresis is 0mV. 90 * | | |01 = Hysteresis is 10mV. 91 * | | |10 = Hysteresis is 20mV. 92 * | | |11 = Hysteresis is 30mV. 93 * |[29:28] |MODESEL |Propagation Delay Mode Selection 94 * | | |00 = Max propagation delay is 4.5uS, operation current is 1.2uA. 95 * | | |01 = Max propagation delay is 2uS, operation current is 3uA. 96 * | | |10 = Max propagation delay is 600nS, operation current is 10uA. 97 * | | |11 = Max propagation delay is 200nS, operation current is 75uA. 98 * @var ACMP_T::STATUS 99 * Offset: 0x08 Analog Comparator Status Register 100 * --------------------------------------------------------------------------------------------------- 101 * |Bits |Field |Descriptions 102 * | :----: | :----: | :---- | 103 * |[0] |ACMPIF0 |Comparator 0 Interrupt Flag 104 * | | |This bit is set by hardware when the edge condition defined by INTPOL (ACMP_CTL0[9:8]) is detected on comparator 0 output 105 * | | |This will generate an interrupt if ACMPIE (ACMP_CTL0[1]) is set to 1. 106 * | | |Note: Write 1 to clear this bit to 0. 107 * |[1] |ACMPIF1 |Comparator 1 Interrupt Flag 108 * | | |This bit is set by hardware when the edge condition defined by INTPOL (ACMP_CTL1[9:8]) is detected on comparator 1 output 109 * | | |This will cause an interrupt if ACMPIE (ACMP_CTL1[1]) is set to 1. 110 * | | |Note: Write 1 to clear this bit to 0. 111 * |[4] |ACMPO0 |Comparator 0 Output 112 * | | |Synchronized to the PCLK to allow reading by software 113 * | | |Cleared when the comparator 0 is disabled, i.e 114 * | | |ACMPEN (ACMP_CTL0[0]) is cleared to 0. 115 * |[5] |ACMPO1 |Comparator 1 Output 116 * | | |Synchronized to the PCLK to allow reading by software 117 * | | |Cleared when the comparator 1 is disabled, i.e 118 * | | |ACMPEN (ACMP_CTL1[0]) is cleared to 0. 119 * |[8] |WKIF0 |Comparator 0 Power-down Wake-up Interrupt Flag 120 * | | |This bit will be set to 1 when ACMP0 wake-up interrupt event occurs. 121 * | | |0 = No power-down wake-up occurred. 122 * | | |1 = Power-down wake-up occurred. 123 * | | |Note: Write 1 to clear this bit to 0. 124 * |[9] |WKIF1 |Comparator 1 Power-down Wake-up Interrupt Flag 125 * | | |This bit will be set to 1 when ACMP1 wake-up interrupt event occurs. 126 * | | |0 = No power-down wake-up occurred. 127 * | | |1 = Power-down wake-up occurred. 128 * | | |Note: Write 1 to clear this bit to 0. 129 * |[12] |ACMPS0 |Comparator 0 Status 130 * | | |Synchronized to the PCLK to allow reading by software 131 * | | |Cleared when the comparator 0 is disabled, i.e 132 * | | |ACMPEN (ACMP_CTL0[0]) is cleared to 0. 133 * |[13] |ACMPS1 |Comparator 1 Status 134 * | | |Synchronized to the PCLK to allow reading by software 135 * | | |Cleared when the comparator 1 is disabled, i.e 136 * | | |ACMPEN (ACMP_CTL1[0]) is cleared to 0. 137 * |[16] |ACMPWO |Comparator Window Output 138 * | | |This bit shows the output status of window compare mode 139 * | | |0 = The positive input voltage is outside the window. 140 * | | |1 = The positive input voltage is in the window. 141 * @var ACMP_T::VREF 142 * Offset: 0x0C Analog Comparator Reference Voltage Control Register 143 * --------------------------------------------------------------------------------------------------- 144 * |Bits |Field |Descriptions 145 * | :----: | :----: | :---- | 146 * |[3:0] |CRVCTL |Comparator Reference Voltage Setting 147 * | | |CRV = CRV source voltage * (1/6+CRVCTL/24). 148 * |[6] |CRVSSEL |CRV Source Voltage Selection 149 * | | |0 = VDDA is selected as CRV source voltage. 150 * | | |1 = The reference voltage defined by SYS_VREFCTL register is selected as CRV source voltage. 151 */ 152 153 __IO uint32_t CTL[2]; /*!< [0x0000~0x0004] Analog Comparator 0~1 Control Register */ 154 __IO uint32_t STATUS; /*!< [0x0008] Analog Comparator Status Register */ 155 __IO uint32_t VREF; /*!< [0x000c] Analog Comparator Reference Voltage Control Register */ 156 157 } ACMP_T; 158 159 /** 160 @addtogroup ACMP_CONST ACMP Bit Field Definition 161 Constant Definitions for ACMP Controller 162 @{ 163 */ 164 165 #define ACMP_CTL_ACMPEN_Pos (0) /*!< ACMP_T::CTL: ACMPEN Position */ 166 #define ACMP_CTL_ACMPEN_Msk (0x1ul << ACMP_CTL_ACMPEN_Pos) /*!< ACMP_T::CTL: ACMPEN Mask */ 167 168 #define ACMP_CTL_ACMPIE_Pos (1) /*!< ACMP_T::CTL: ACMPIE Position */ 169 #define ACMP_CTL_ACMPIE_Msk (0x1ul << ACMP_CTL_ACMPIE_Pos) /*!< ACMP_T::CTL: ACMPIE Mask */ 170 171 #define ACMP_CTL_HYSEN_Pos (2) /*!< ACMP_T::CTL: HYSEN Position */ 172 #define ACMP_CTL_HYSEN_Msk (0x1ul << ACMP_CTL_HYSEN_Pos) /*!< ACMP_T::CTL: HYSEN Mask */ 173 174 #define ACMP_CTL_ACMPOINV_Pos (3) /*!< ACMP_T::CTL: ACMPOINV Position */ 175 #define ACMP_CTL_ACMPOINV_Msk (0x1ul << ACMP_CTL_ACMPOINV_Pos) /*!< ACMP_T::CTL: ACMPOINV Mask */ 176 177 #define ACMP_CTL_NEGSEL_Pos (4) /*!< ACMP_T::CTL: NEGSEL Position */ 178 #define ACMP_CTL_NEGSEL_Msk (0x3ul << ACMP_CTL_NEGSEL_Pos) /*!< ACMP_T::CTL: NEGSEL Mask */ 179 180 #define ACMP_CTL_POSSEL_Pos (6) /*!< ACMP_T::CTL: POSSEL Position */ 181 #define ACMP_CTL_POSSEL_Msk (0x3ul << ACMP_CTL_POSSEL_Pos) /*!< ACMP_T::CTL: POSSEL Mask */ 182 183 #define ACMP_CTL_INTPOL_Pos (8) /*!< ACMP_T::CTL: INTPOL Position */ 184 #define ACMP_CTL_INTPOL_Msk (0x3ul << ACMP_CTL_INTPOL_Pos) /*!< ACMP_T::CTL: INTPOL Mask */ 185 186 #define ACMP_CTL_OUTSEL_Pos (12) /*!< ACMP_T::CTL: OUTSEL Position */ 187 #define ACMP_CTL_OUTSEL_Msk (0x1ul << ACMP_CTL_OUTSEL_Pos) /*!< ACMP_T::CTL: OUTSEL Mask */ 188 189 #define ACMP_CTL_FILTSEL_Pos (13) /*!< ACMP_T::CTL: FILTSEL Position */ 190 #define ACMP_CTL_FILTSEL_Msk (0x7ul << ACMP_CTL_FILTSEL_Pos) /*!< ACMP_T::CTL: FILTSEL Mask */ 191 192 #define ACMP_CTL_WKEN_Pos (16) /*!< ACMP_T::CTL: WKEN Position */ 193 #define ACMP_CTL_WKEN_Msk (0x1ul << ACMP_CTL_WKEN_Pos) /*!< ACMP_T::CTL: WKEN Mask */ 194 195 #define ACMP_CTL_WLATEN_Pos (17) /*!< ACMP_T::CTL: WLATEN Position */ 196 #define ACMP_CTL_WLATEN_Msk (0x1ul << ACMP_CTL_WLATEN_Pos) /*!< ACMP_T::CTL: WLATEN Mask */ 197 198 #define ACMP_CTL_WCMPSEL_Pos (18) /*!< ACMP_T::CTL: WCMPSEL Position */ 199 #define ACMP_CTL_WCMPSEL_Msk (0x1ul << ACMP_CTL_WCMPSEL_Pos) /*!< ACMP_T::CTL: WCMPSEL Mask */ 200 201 #define ACMP_CTL_HYSSEL_Pos (24) /*!< ACMP_T::CTL: HYSSEL Position */ 202 #define ACMP_CTL_HYSSEL_Msk (0x3ul << ACMP_CTL_HYSSEL_Pos) /*!< ACMP_T::CTL: HYSSEL Mask */ 203 204 #define ACMP_CTL_MODESEL_Pos (28) /*!< ACMP_T::CTL: MODESEL Position */ 205 #define ACMP_CTL_MODESEL_Msk (0x3ul << ACMP_CTL_MODESEL_Pos) /*!< ACMP_T::CTL: MODESEL Mask */ 206 207 #define ACMP_STATUS_ACMPIF0_Pos (0) /*!< ACMP_T::STATUS: ACMPIF0 Position */ 208 #define ACMP_STATUS_ACMPIF0_Msk (0x1ul << ACMP_STATUS_ACMPIF0_Pos) /*!< ACMP_T::STATUS: ACMPIF0 Mask */ 209 210 #define ACMP_STATUS_ACMPIF1_Pos (1) /*!< ACMP_T::STATUS: ACMPIF1 Position */ 211 #define ACMP_STATUS_ACMPIF1_Msk (0x1ul << ACMP_STATUS_ACMPIF1_Pos) /*!< ACMP_T::STATUS: ACMPIF1 Mask */ 212 213 #define ACMP_STATUS_ACMPO0_Pos (4) /*!< ACMP_T::STATUS: ACMPO0 Position */ 214 #define ACMP_STATUS_ACMPO0_Msk (0x1ul << ACMP_STATUS_ACMPO0_Pos) /*!< ACMP_T::STATUS: ACMPO0 Mask */ 215 216 #define ACMP_STATUS_ACMPO1_Pos (5) /*!< ACMP_T::STATUS: ACMPO1 Position */ 217 #define ACMP_STATUS_ACMPO1_Msk (0x1ul << ACMP_STATUS_ACMPO1_Pos) /*!< ACMP_T::STATUS: ACMPO1 Mask */ 218 219 #define ACMP_STATUS_WKIF0_Pos (8) /*!< ACMP_T::STATUS: WKIF0 Position */ 220 #define ACMP_STATUS_WKIF0_Msk (0x1ul << ACMP_STATUS_WKIF0_Pos) /*!< ACMP_T::STATUS: WKIF0 Mask */ 221 222 #define ACMP_STATUS_WKIF1_Pos (9) /*!< ACMP_T::STATUS: WKIF1 Position */ 223 #define ACMP_STATUS_WKIF1_Msk (0x1ul << ACMP_STATUS_WKIF1_Pos) /*!< ACMP_T::STATUS: WKIF1 Mask */ 224 225 #define ACMP_STATUS_ACMPS0_Pos (12) /*!< ACMP_T::STATUS: ACMPS0 Position */ 226 #define ACMP_STATUS_ACMPS0_Msk (0x1ul << ACMP_STATUS_ACMPS0_Pos) /*!< ACMP_T::STATUS: ACMPS0 Mask */ 227 228 #define ACMP_STATUS_ACMPS1_Pos (13) /*!< ACMP_T::STATUS: ACMPS1 Position */ 229 #define ACMP_STATUS_ACMPS1_Msk (0x1ul << ACMP_STATUS_ACMPS1_Pos) /*!< ACMP_T::STATUS: ACMPS1 Mask */ 230 231 #define ACMP_STATUS_ACMPWO_Pos (16) /*!< ACMP_T::STATUS: ACMPWO Position */ 232 #define ACMP_STATUS_ACMPWO_Msk (0x1ul << ACMP_STATUS_ACMPWO_Pos) /*!< ACMP_T::STATUS: ACMPWO Mask */ 233 234 #define ACMP_VREF_CRVCTL_Pos (0) /*!< ACMP_T::VREF: CRVCTL Position */ 235 #define ACMP_VREF_CRVCTL_Msk (0xful << ACMP_VREF_CRVCTL_Pos) /*!< ACMP_T::VREF: CRVCTL Mask */ 236 237 #define ACMP_VREF_CRVSSEL_Pos (6) /*!< ACMP_T::VREF: CRVSSEL Position */ 238 #define ACMP_VREF_CRVSSEL_Msk (0x1ul << ACMP_VREF_CRVSSEL_Pos) /*!< ACMP_T::VREF: CRVSSEL Mask */ 239 240 /**@}*/ /* ACMP_CONST */ 241 /**@}*/ /* end of ACMP register group */ 242 /**@}*/ /* end of REGISTER group */ 243 244 #endif /* __ACMP_REG_H__ */ 245
