1<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> 2<html xmlns="http://www.w3.org/1999/xhtml"> 3<head> 4<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> 5<meta http-equiv="X-UA-Compatible" content="IE=9"/> 6<meta name="generator" content="Doxygen 1.8.13"/> 7<meta name="viewport" content="width=device-width, initial-scale=1"/> 8<title>ISSDK: boardkit/evk-mimxrt1015/clock_config.c Source File</title> 9<link href="tabs.css" rel="stylesheet" type="text/css"/> 10<script type="text/javascript" src="jquery.js"></script> 11<script type="text/javascript" src="dynsections.js"></script> 12<link href="issdk_stylesheet.css" rel="stylesheet" type="text/css" /> 13</head> 14<body> 15<div id="top"><!-- do not remove this div, it is closed by doxygen! --> 16<div id="titlearea"> 17<table cellspacing="0" cellpadding="0"> 18 <tbody> 19 <tr style="height: 56px;"> 20 <td id="projectlogo"><img alt="Logo" src="nxp_logo_small.png"/></td> 21 <td id="projectalign" style="padding-left: 0.5em;"> 22 <div id="projectname">ISSDK 23  <span id="projectnumber">1.8</span> 24 </div> 25 <div id="projectbrief">IoT Sensing Software Development Kit</div> 26 </td> 27 </tr> 28 </tbody> 29</table> 30</div> 31<!-- end header part --> 32<!-- Generated by Doxygen 1.8.13 --> 33<script type="text/javascript" src="menudata.js"></script> 34<script type="text/javascript" src="menu.js"></script> 35<script type="text/javascript"> 36$(function() { 37 initMenu('',false,false,'search.php','Search'); 38}); 39</script> 40<div id="main-nav"></div> 41<div id="nav-path" class="navpath"> 42 <ul> 43<li class="navelem"><a class="el" href="dir_6994211064bad48d3d63a6227f5100d6.html">boardkit</a></li><li class="navelem"><a class="el" href="dir_955806e634ba701fbc47e731f4cdaaa6.html">evk-mimxrt1015</a></li> </ul> 44</div> 45</div><!-- top --> 46<div class="header"> 47 <div class="headertitle"> 48<div class="title">clock_config.c</div> </div> 49</div><!--header--> 50<div class="contents"> 51<a href="a04256.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span> <span class="comment">/*</span></div><div class="line"><a name="l00002"></a><span class="lineno"> 2</span> <span class="comment"> * Copyright 2018 NXP</span></div><div class="line"><a name="l00003"></a><span class="lineno"> 3</span> <span class="comment"> * All rights reserved.</span></div><div class="line"><a name="l00004"></a><span class="lineno"> 4</span> <span class="comment"> *</span></div><div class="line"><a name="l00005"></a><span class="lineno"> 5</span> <span class="comment"> * SPDX-License-Identifier: BSD-3-Clause</span></div><div class="line"><a name="l00006"></a><span class="lineno"> 6</span> <span class="comment"> */</span></div><div class="line"><a name="l00007"></a><span class="lineno"> 7</span> <span class="comment">/*</span></div><div class="line"><a name="l00008"></a><span class="lineno"> 8</span> <span class="comment"> * How to setup clock using clock driver functions:</span></div><div class="line"><a name="l00009"></a><span class="lineno"> 9</span> <span class="comment"> *</span></div><div class="line"><a name="l00010"></a><span class="lineno"> 10</span> <span class="comment"> * 1. Call CLOCK_InitXXXPLL() to configure corresponding PLL clock.</span></div><div class="line"><a name="l00011"></a><span class="lineno"> 11</span> <span class="comment"> *</span></div><div class="line"><a name="l00012"></a><span class="lineno"> 12</span> <span class="comment"> * 2. Call CLOCK_InitXXXpfd() to configure corresponding PLL pfd clock.</span></div><div class="line"><a name="l00013"></a><span class="lineno"> 13</span> <span class="comment"> *</span></div><div class="line"><a name="l00014"></a><span class="lineno"> 14</span> <span class="comment"> * 3. Call CLOCK_SetMux() to configure corresponding clock source for target clock out.</span></div><div class="line"><a name="l00015"></a><span class="lineno"> 15</span> <span class="comment"> *</span></div><div class="line"><a name="l00016"></a><span class="lineno"> 16</span> <span class="comment"> * 4. Call CLOCK_SetDiv() to configure corresponding clock divider for target clock out.</span></div><div class="line"><a name="l00017"></a><span class="lineno"> 17</span> <span class="comment"> *</span></div><div class="line"><a name="l00018"></a><span class="lineno"> 18</span> <span class="comment"> * 5. Call CLOCK_SetXtalFreq() to set XTAL frequency based on board settings.</span></div><div class="line"><a name="l00019"></a><span class="lineno"> 19</span> <span class="comment"> *</span></div><div class="line"><a name="l00020"></a><span class="lineno"> 20</span> <span class="comment"> */</span></div><div class="line"><a name="l00021"></a><span class="lineno"> 21</span> </div><div class="line"><a name="l00022"></a><span class="lineno"> 22</span> <span class="comment">/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************</span></div><div class="line"><a name="l00023"></a><span class="lineno"> 23</span> <span class="comment">!!GlobalInfo</span></div><div class="line"><a name="l00024"></a><span class="lineno"> 24</span> <span class="comment">product: Clocks v4.1</span></div><div class="line"><a name="l00025"></a><span class="lineno"> 25</span> <span class="comment">processor: MIMXRT1015xxxxx</span></div><div class="line"><a name="l00026"></a><span class="lineno"> 26</span> <span class="comment">package_id: MIMXRT1015DAF5A</span></div><div class="line"><a name="l00027"></a><span class="lineno"> 27</span> <span class="comment">mcu_data: ksdk2_0</span></div><div class="line"><a name="l00028"></a><span class="lineno"> 28</span> <span class="comment">processor_version: 0.0.0</span></div><div class="line"><a name="l00029"></a><span class="lineno"> 29</span> <span class="comment">board: MIMXRT1015-EVK</span></div><div class="line"><a name="l00030"></a><span class="lineno"> 30</span> <span class="comment"> * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/</span></div><div class="line"><a name="l00031"></a><span class="lineno"> 31</span> </div><div class="line"><a name="l00032"></a><span class="lineno"> 32</span> <span class="preprocessor">#include "<a class="code" href="a04313.html">clock_config.h</a>"</span></div><div class="line"><a name="l00033"></a><span class="lineno"> 33</span> </div><div class="line"><a name="l00034"></a><span class="lineno"> 34</span> <span class="comment">/*******************************************************************************</span></div><div class="line"><a name="l00035"></a><span class="lineno"> 35</span> <span class="comment"> * Definitions</span></div><div class="line"><a name="l00036"></a><span class="lineno"> 36</span> <span class="comment"> ******************************************************************************/</span></div><div class="line"><a name="l00037"></a><span class="lineno"> 37</span> </div><div class="line"><a name="l00038"></a><span class="lineno"> 38</span> <span class="comment">/*******************************************************************************</span></div><div class="line"><a name="l00039"></a><span class="lineno"> 39</span> <span class="comment"> * Variables</span></div><div class="line"><a name="l00040"></a><span class="lineno"> 40</span> <span class="comment"> ******************************************************************************/</span></div><div class="line"><a name="l00041"></a><span class="lineno"> 41</span> <span class="comment">/* System clock frequency. */</span></div><div class="line"><a name="l00042"></a><span class="lineno"> 42</span> <span class="keyword">extern</span> uint32_t <a class="code" href="a04223.html#aa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a>;</div><div class="line"><a name="l00043"></a><span class="lineno"> 43</span> </div><div class="line"><a name="l00044"></a><span class="lineno"> 44</span> <span class="comment">/*******************************************************************************</span></div><div class="line"><a name="l00045"></a><span class="lineno"> 45</span> <span class="comment"> ************************ BOARD_InitBootClocks function ************************</span></div><div class="line"><a name="l00046"></a><span class="lineno"> 46</span> <span class="comment"> ******************************************************************************/</span></div><div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="a04256.html#a09a9a2026d4c394534e528d519370d3e"> 47</a></span> <span class="keywordtype">void</span> <a class="code" href="a04238.html#a09a9a2026d4c394534e528d519370d3e">BOARD_InitBootClocks</a>(<span class="keywordtype">void</span>)</div><div class="line"><a name="l00048"></a><span class="lineno"> 48</span> {</div><div class="line"><a name="l00049"></a><span class="lineno"> 49</span>  <a class="code" href="a04223.html#a5e69c4eff0fd5236bbb0ff4e1d5a7a7e">BOARD_BootClockRUN</a>();</div><div class="line"><a name="l00050"></a><span class="lineno"> 50</span> }</div><div class="line"><a name="l00051"></a><span class="lineno"> 51</span> </div><div class="line"><a name="l00052"></a><span class="lineno"> 52</span> <span class="comment">/*******************************************************************************</span></div><div class="line"><a name="l00053"></a><span class="lineno"> 53</span> <span class="comment"> ********************** Configuration BOARD_BootClockRUN ***********************</span></div><div class="line"><a name="l00054"></a><span class="lineno"> 54</span> <span class="comment"> ******************************************************************************/</span></div><div class="line"><a name="l00055"></a><span class="lineno"> 55</span> <span class="comment">/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************</span></div><div class="line"><a name="l00056"></a><span class="lineno"> 56</span> <span class="comment">!!Configuration</span></div><div class="line"><a name="l00057"></a><span class="lineno"> 57</span> <span class="comment">name: BOARD_BootClockRUN</span></div><div class="line"><a name="l00058"></a><span class="lineno"> 58</span> <span class="comment">called_from_default_init: true</span></div><div class="line"><a name="l00059"></a><span class="lineno"> 59</span> <span class="comment">outputs:</span></div><div class="line"><a name="l00060"></a><span class="lineno"> 60</span> <span class="comment">- {id: AHB_CLK_ROOT.outFreq, value: 500 MHz}</span></div><div class="line"><a name="l00061"></a><span class="lineno"> 61</span> <span class="comment">- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}</span></div><div class="line"><a name="l00062"></a><span class="lineno"> 62</span> <span class="comment">- {id: CLK_1M.outFreq, value: 1 MHz}</span></div><div class="line"><a name="l00063"></a><span class="lineno"> 63</span> <span class="comment">- {id: CLK_24M.outFreq, value: 24 MHz}</span></div><div class="line"><a name="l00064"></a><span class="lineno"> 64</span> <span class="comment">- {id: ENET_500M_REF_CLK.outFreq, value: 500 MHz}</span></div><div class="line"><a name="l00065"></a><span class="lineno"> 65</span> <span class="comment">- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}</span></div><div class="line"><a name="l00066"></a><span class="lineno"> 66</span> <span class="comment">- {id: FLEXSPI_CLK_ROOT.outFreq, value: 31.25 MHz}</span></div><div class="line"><a name="l00067"></a><span class="lineno"> 67</span> <span class="comment">- {id: IPG_CLK_ROOT.outFreq, value: 125 MHz}</span></div><div class="line"><a name="l00068"></a><span class="lineno"> 68</span> <span class="comment">- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}</span></div><div class="line"><a name="l00069"></a><span class="lineno"> 69</span> <span class="comment">- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}</span></div><div class="line"><a name="l00070"></a><span class="lineno"> 70</span> <span class="comment">- {id: PERCLK_CLK_ROOT.outFreq, value: 62.5 MHz}</span></div><div class="line"><a name="l00071"></a><span class="lineno"> 71</span> <span class="comment">- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}</span></div><div class="line"><a name="l00072"></a><span class="lineno"> 72</span> <span class="comment">- {id: SAI2_CLK_ROOT.outFreq, value: 1080/17 MHz}</span></div><div class="line"><a name="l00073"></a><span class="lineno"> 73</span> <span class="comment">- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}</span></div><div class="line"><a name="l00074"></a><span class="lineno"> 74</span> <span class="comment">- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}</span></div><div class="line"><a name="l00075"></a><span class="lineno"> 75</span> <span class="comment">- {id: TRACE_CLK_ROOT.outFreq, value: 352/3 MHz}</span></div><div class="line"><a name="l00076"></a><span class="lineno"> 76</span> <span class="comment">- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}</span></div><div class="line"><a name="l00077"></a><span class="lineno"> 77</span> <span class="comment">settings:</span></div><div class="line"><a name="l00078"></a><span class="lineno"> 78</span> <span class="comment">- {id: CCM.AHB_PODF.scale, value: '1', locked: true}</span></div><div class="line"><a name="l00079"></a><span class="lineno"> 79</span> <span class="comment">- {id: CCM.ARM_PODF.scale, value: '1', locked: true}</span></div><div class="line"><a name="l00080"></a><span class="lineno"> 80</span> <span class="comment">- {id: CCM.FLEXSPI_PODF.scale, value: '2', locked: true}</span></div><div class="line"><a name="l00081"></a><span class="lineno"> 81</span> <span class="comment">- {id: CCM.IPG_PODF.scale, value: '4'}</span></div><div class="line"><a name="l00082"></a><span class="lineno"> 82</span> <span class="comment">- {id: CCM.LPSPI_PODF.scale, value: '5', locked: true}</span></div><div class="line"><a name="l00083"></a><span class="lineno"> 83</span> <span class="comment">- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}</span></div><div class="line"><a name="l00084"></a><span class="lineno"> 84</span> <span class="comment">- {id: CCM.PRE_PERIPH_CLK_SEL.sel, value: CCM.ARM_PODF}</span></div><div class="line"><a name="l00085"></a><span class="lineno"> 85</span> <span class="comment">- {id: CCM.TRACE_PODF.scale, value: '3', locked: true}</span></div><div class="line"><a name="l00086"></a><span class="lineno"> 86</span> <span class="comment">- {id: CCM_ANALOG.PLL2.denom, value: '1', locked: true}</span></div><div class="line"><a name="l00087"></a><span class="lineno"> 87</span> <span class="comment">- {id: CCM_ANALOG.PLL2.div, value: '22'}</span></div><div class="line"><a name="l00088"></a><span class="lineno"> 88</span> <span class="comment">- {id: CCM_ANALOG.PLL2.num, value: '0', locked: true}</span></div><div class="line"><a name="l00089"></a><span class="lineno"> 89</span> <span class="comment">- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}</span></div><div class="line"><a name="l00090"></a><span class="lineno"> 90</span> <span class="comment">- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}</span></div><div class="line"><a name="l00091"></a><span class="lineno"> 91</span> <span class="comment">- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}</span></div><div class="line"><a name="l00092"></a><span class="lineno"> 92</span> <span class="comment">- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}</span></div><div class="line"><a name="l00093"></a><span class="lineno"> 93</span> <span class="comment">- {id: CCM_ANALOG.PLL2_PFD2_DIV.scale, value: '18', locked: true}</span></div><div class="line"><a name="l00094"></a><span class="lineno"> 94</span> <span class="comment">- {id: CCM_ANALOG.PLL2_PFD2_MUL.scale, value: '18', locked: true}</span></div><div class="line"><a name="l00095"></a><span class="lineno"> 95</span> <span class="comment">- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}</span></div><div class="line"><a name="l00096"></a><span class="lineno"> 96</span> <span class="comment">- {id: CCM_ANALOG.PLL2_PFD3_DIV.scale, value: '18', locked: true}</span></div><div class="line"><a name="l00097"></a><span class="lineno"> 97</span> <span class="comment">- {id: CCM_ANALOG.PLL2_PFD3_MUL.scale, value: '18', locked: true}</span></div><div class="line"><a name="l00098"></a><span class="lineno"> 98</span> <span class="comment">- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}</span></div><div class="line"><a name="l00099"></a><span class="lineno"> 99</span> <span class="comment">- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}</span></div><div class="line"><a name="l00100"></a><span class="lineno"> 100</span> <span class="comment">- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '22', locked: true}</span></div><div class="line"><a name="l00101"></a><span class="lineno"> 101</span> <span class="comment">- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}</span></div><div class="line"><a name="l00102"></a><span class="lineno"> 102</span> <span class="comment">- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}</span></div><div class="line"><a name="l00103"></a><span class="lineno"> 103</span> <span class="comment">- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}</span></div><div class="line"><a name="l00104"></a><span class="lineno"> 104</span> <span class="comment">- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}</span></div><div class="line"><a name="l00105"></a><span class="lineno"> 105</span> <span class="comment">- {id: CCM_ANALOG.PLL3_PFD3_DIV.scale, value: '18', locked: true}</span></div><div class="line"><a name="l00106"></a><span class="lineno"> 106</span> <span class="comment">- {id: CCM_ANALOG.PLL3_PFD3_MUL.scale, value: '18', locked: true}</span></div><div class="line"><a name="l00107"></a><span class="lineno"> 107</span> <span class="comment">- {id: CCM_ANALOG.PLL4.denom, value: '50'}</span></div><div class="line"><a name="l00108"></a><span class="lineno"> 108</span> <span class="comment">- {id: CCM_ANALOG.PLL4.div, value: '47'}</span></div><div class="line"><a name="l00109"></a><span class="lineno"> 109</span> <span class="comment">- {id: CCM_ANALOG.PLL6_BYPASS.sel, value: CCM_ANALOG.PLL6}</span></div><div class="line"><a name="l00110"></a><span class="lineno"> 110</span> <span class="comment">- {id: CCM_ANALOG_PLL_ENET_ENABLE_CFG, value: Disabled}</span></div><div class="line"><a name="l00111"></a><span class="lineno"> 111</span> <span class="comment">- {id: CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_CFG, value: Disabled}</span></div><div class="line"><a name="l00112"></a><span class="lineno"> 112</span> <span class="comment">- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}</span></div><div class="line"><a name="l00113"></a><span class="lineno"> 113</span> <span class="comment">sources:</span></div><div class="line"><a name="l00114"></a><span class="lineno"> 114</span> <span class="comment">- {id: XTALOSC24M.OSC.outFreq, value: 24 MHz, enabled: true}</span></div><div class="line"><a name="l00115"></a><span class="lineno"> 115</span> <span class="comment">- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}</span></div><div class="line"><a name="l00116"></a><span class="lineno"> 116</span> <span class="comment"> * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/</span></div><div class="line"><a name="l00117"></a><span class="lineno"> 117</span> </div><div class="line"><a name="l00118"></a><span class="lineno"> 118</span> <span class="comment">/*******************************************************************************</span></div><div class="line"><a name="l00119"></a><span class="lineno"> 119</span> <span class="comment"> * Variables for BOARD_BootClockRUN configuration</span></div><div class="line"><a name="l00120"></a><span class="lineno"> 120</span> <span class="comment"> ******************************************************************************/</span></div><div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="a04256.html#aca5fe9b5426f8c656c9c53d7088a4338"> 121</a></span> <span class="keyword">const</span> clock_enet_pll_config_t <a class="code" href="a04253.html#aca5fe9b5426f8c656c9c53d7088a4338">enetPllConfig_BOARD_BootClockRUN</a> = {</div><div class="line"><a name="l00122"></a><span class="lineno"> 122</span>  .enableClkOutput500M = <span class="keyword">true</span>,</div><div class="line"><a name="l00123"></a><span class="lineno"> 123</span> };</div><div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="a04256.html#a1eb8739af679f60d21566c74233f2072"> 124</a></span> <span class="keyword">const</span> clock_sys_pll_config_t <a class="code" href="a04253.html#a1eb8739af679f60d21566c74233f2072">sysPllConfig_BOARD_BootClockRUN</a> = {</div><div class="line"><a name="l00125"></a><span class="lineno"> 125</span>  .loopDivider = 1, <span class="comment">/* PLL loop divider, Fout = Fin * 22 */</span></div><div class="line"><a name="l00126"></a><span class="lineno"> 126</span> };</div><div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="a04256.html#a9d28a505d06fb58d283e270865d17566"> 127</a></span> <span class="keyword">const</span> clock_usb_pll_config_t <a class="code" href="a04253.html#a9d28a505d06fb58d283e270865d17566">usb1PllConfig_BOARD_BootClockRUN</a> = {</div><div class="line"><a name="l00128"></a><span class="lineno"> 128</span>  .loopDivider = 0, <span class="comment">/* PLL loop divider, Fout = Fin * 20 */</span></div><div class="line"><a name="l00129"></a><span class="lineno"> 129</span> };</div><div class="line"><a name="l00130"></a><span class="lineno"> 130</span> <span class="comment">/*******************************************************************************</span></div><div class="line"><a name="l00131"></a><span class="lineno"> 131</span> <span class="comment"> * Code for BOARD_BootClockRUN configuration</span></div><div class="line"><a name="l00132"></a><span class="lineno"> 132</span> <span class="comment"> ******************************************************************************/</span></div><div class="line"><a name="l00133"></a><span class="lineno"><a class="line" href="a04256.html#a5e69c4eff0fd5236bbb0ff4e1d5a7a7e"> 133</a></span> <span class="keywordtype">void</span> <a class="code" href="a04223.html#a5e69c4eff0fd5236bbb0ff4e1d5a7a7e">BOARD_BootClockRUN</a>(<span class="keywordtype">void</span>)</div><div class="line"><a name="l00134"></a><span class="lineno"> 134</span> {</div><div class="line"><a name="l00135"></a><span class="lineno"> 135</span>  <span class="comment">/* Init RTC OSC clock frequency. */</span></div><div class="line"><a name="l00136"></a><span class="lineno"> 136</span>  CLOCK_SetRtcXtalFreq(<a class="code" href="a04292.html#ac2b7bb542e5cb061aec9ac2c07ec20a0">BOARD_XTAL32K_CLK_HZ</a>);</div><div class="line"><a name="l00137"></a><span class="lineno"> 137</span>  <span class="comment">/* Set XTAL 24MHz clock frequency. */</span></div><div class="line"><a name="l00138"></a><span class="lineno"> 138</span>  CLOCK_SetXtalFreq(<a class="code" href="a04280.html#ad09513e3c601985fc61136ef6c0678f9">BOARD_XTAL0_CLK_HZ</a>);</div><div class="line"><a name="l00139"></a><span class="lineno"> 139</span>  <span class="comment">/* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */</span></div><div class="line"><a name="l00140"></a><span class="lineno"> 140</span>  CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0x1); <span class="comment">/* Set PERIPH_CLK2 MUX to OSC */</span></div><div class="line"><a name="l00141"></a><span class="lineno"> 141</span>  CLOCK_SetMux(kCLOCK_PeriphMux, 0x1); <span class="comment">/* Set PERIPH_CLK MUX to PERIPH_CLK2 */</span></div><div class="line"><a name="l00142"></a><span class="lineno"> 142</span> </div><div class="line"><a name="l00143"></a><span class="lineno"> 143</span>  DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12);</div><div class="line"><a name="l00144"></a><span class="lineno"> 144</span>  <span class="comment">/* Set AHB_PODF. */</span></div><div class="line"><a name="l00145"></a><span class="lineno"> 145</span>  CLOCK_SetDiv(kCLOCK_AhbDiv, 0x0);</div><div class="line"><a name="l00146"></a><span class="lineno"> 146</span>  <span class="comment">/* Set ARM_PODF. */</span></div><div class="line"><a name="l00147"></a><span class="lineno"> 147</span>  CLOCK_SetDiv(kCLOCK_ArmDiv, 0x0);</div><div class="line"><a name="l00148"></a><span class="lineno"> 148</span>  <span class="comment">/* Set IPG_PODF. */</span></div><div class="line"><a name="l00149"></a><span class="lineno"> 149</span>  CLOCK_SetDiv(kCLOCK_IpgDiv, 0x3);</div><div class="line"><a name="l00150"></a><span class="lineno"> 150</span>  <span class="comment">/* Set PERCLK_PODF. */</span></div><div class="line"><a name="l00151"></a><span class="lineno"> 151</span>  CLOCK_SetDiv(kCLOCK_PerclkDiv, 0x1);</div><div class="line"><a name="l00152"></a><span class="lineno"> 152</span>  <span class="comment">/* Set per clock source. */</span></div><div class="line"><a name="l00153"></a><span class="lineno"> 153</span>  CLOCK_SetMux(kCLOCK_PerclkMux, 0x0);</div><div class="line"><a name="l00154"></a><span class="lineno"> 154</span> <span class="preprocessor">#ifndef XIP_EXTERNAL_FLASH</span></div><div class="line"><a name="l00155"></a><span class="lineno"> 155</span>  <span class="comment">/* Set FLEXSPI_PODF. */</span></div><div class="line"><a name="l00156"></a><span class="lineno"> 156</span>  CLOCK_SetDiv(kCLOCK_FlexspiDiv, 0x1);</div><div class="line"><a name="l00157"></a><span class="lineno"> 157</span>  <span class="comment">/* Set Flexspi clock source. */</span></div><div class="line"><a name="l00158"></a><span class="lineno"> 158</span>  CLOCK_SetMux(kCLOCK_FlexspiMux, 0x0);</div><div class="line"><a name="l00159"></a><span class="lineno"> 159</span> <span class="preprocessor">#endif</span></div><div class="line"><a name="l00160"></a><span class="lineno"> 160</span>  <span class="comment">/* Set LPSPI_PODF. */</span></div><div class="line"><a name="l00161"></a><span class="lineno"> 161</span>  CLOCK_SetDiv(kCLOCK_LpspiDiv, 0x4);</div><div class="line"><a name="l00162"></a><span class="lineno"> 162</span>  <span class="comment">/* Set Lpspi clock source. */</span></div><div class="line"><a name="l00163"></a><span class="lineno"> 163</span>  CLOCK_SetMux(kCLOCK_LpspiMux, 0x2);</div><div class="line"><a name="l00164"></a><span class="lineno"> 164</span>  <span class="comment">/* Set TRACE_PODF. */</span></div><div class="line"><a name="l00165"></a><span class="lineno"> 165</span>  CLOCK_SetDiv(kCLOCK_TraceDiv, 0x2);</div><div class="line"><a name="l00166"></a><span class="lineno"> 166</span>  <span class="comment">/* Set Trace clock source. */</span></div><div class="line"><a name="l00167"></a><span class="lineno"> 167</span>  CLOCK_SetMux(kCLOCK_TraceMux, 0x2);</div><div class="line"><a name="l00168"></a><span class="lineno"> 168</span>  <span class="comment">/* Set SAI1_CLK_PRED. */</span></div><div class="line"><a name="l00169"></a><span class="lineno"> 169</span>  CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 0x3);</div><div class="line"><a name="l00170"></a><span class="lineno"> 170</span>  <span class="comment">/* Set SAI1_CLK_PODF. */</span></div><div class="line"><a name="l00171"></a><span class="lineno"> 171</span>  CLOCK_SetDiv(kCLOCK_Sai1Div, 0x1);</div><div class="line"><a name="l00172"></a><span class="lineno"> 172</span>  <span class="comment">/* Set Sai1 clock source. */</span></div><div class="line"><a name="l00173"></a><span class="lineno"> 173</span>  CLOCK_SetMux(kCLOCK_Sai1Mux, 0x0);</div><div class="line"><a name="l00174"></a><span class="lineno"> 174</span>  <span class="comment">/* Set SAI2_CLK_PRED. */</span></div><div class="line"><a name="l00175"></a><span class="lineno"> 175</span>  CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 0x3);</div><div class="line"><a name="l00176"></a><span class="lineno"> 176</span>  <span class="comment">/* Set SAI2_CLK_PODF. */</span></div><div class="line"><a name="l00177"></a><span class="lineno"> 177</span>  CLOCK_SetDiv(kCLOCK_Sai2Div, 0x1);</div><div class="line"><a name="l00178"></a><span class="lineno"> 178</span>  <span class="comment">/* Set Sai2 clock source. */</span></div><div class="line"><a name="l00179"></a><span class="lineno"> 179</span>  CLOCK_SetMux(kCLOCK_Sai2Mux, 0x0);</div><div class="line"><a name="l00180"></a><span class="lineno"> 180</span>  <span class="comment">/* Set SAI3_CLK_PRED. */</span></div><div class="line"><a name="l00181"></a><span class="lineno"> 181</span>  CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 0x3);</div><div class="line"><a name="l00182"></a><span class="lineno"> 182</span>  <span class="comment">/* Set SAI3_CLK_PODF. */</span></div><div class="line"><a name="l00183"></a><span class="lineno"> 183</span>  CLOCK_SetDiv(kCLOCK_Sai3Div, 0x1);</div><div class="line"><a name="l00184"></a><span class="lineno"> 184</span>  <span class="comment">/* Set Sai3 clock source. */</span></div><div class="line"><a name="l00185"></a><span class="lineno"> 185</span>  CLOCK_SetMux(kCLOCK_Sai3Mux, 0x0);</div><div class="line"><a name="l00186"></a><span class="lineno"> 186</span>  <span class="comment">/* Set LPI2C_CLK_PODF. */</span></div><div class="line"><a name="l00187"></a><span class="lineno"> 187</span>  CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0x0);</div><div class="line"><a name="l00188"></a><span class="lineno"> 188</span>  <span class="comment">/* Set Lpi2c clock source. */</span></div><div class="line"><a name="l00189"></a><span class="lineno"> 189</span>  CLOCK_SetMux(kCLOCK_Lpi2cMux, 0x0);</div><div class="line"><a name="l00190"></a><span class="lineno"> 190</span>  <span class="comment">/* Set SPDIF0_CLK_PRED. */</span></div><div class="line"><a name="l00191"></a><span class="lineno"> 191</span>  CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 0x1);</div><div class="line"><a name="l00192"></a><span class="lineno"> 192</span>  <span class="comment">/* Set SPDIF0_CLK_PODF. */</span></div><div class="line"><a name="l00193"></a><span class="lineno"> 193</span>  CLOCK_SetDiv(kCLOCK_Spdif0Div, 0x7);</div><div class="line"><a name="l00194"></a><span class="lineno"> 194</span>  <span class="comment">/* Set Spdif clock source. */</span></div><div class="line"><a name="l00195"></a><span class="lineno"> 195</span>  CLOCK_SetMux(kCLOCK_SpdifMux, 0x3);</div><div class="line"><a name="l00196"></a><span class="lineno"> 196</span>  <span class="comment">/* Set FLEXIO1_CLK_PRED. */</span></div><div class="line"><a name="l00197"></a><span class="lineno"> 197</span>  CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 0x1);</div><div class="line"><a name="l00198"></a><span class="lineno"> 198</span>  <span class="comment">/* Set FLEXIO1_CLK_PODF. */</span></div><div class="line"><a name="l00199"></a><span class="lineno"> 199</span>  CLOCK_SetDiv(kCLOCK_Flexio1Div, 0x7);</div><div class="line"><a name="l00200"></a><span class="lineno"> 200</span>  <span class="comment">/* Set Flexio1 clock source. */</span></div><div class="line"><a name="l00201"></a><span class="lineno"> 201</span>  CLOCK_SetMux(kCLOCK_Flexio1Mux, 0x3);</div><div class="line"><a name="l00202"></a><span class="lineno"> 202</span>  <span class="comment">/* Set Pll3 sw clock source. */</span></div><div class="line"><a name="l00203"></a><span class="lineno"> 203</span>  CLOCK_SetMux(kCLOCK_Pll3SwMux, 0x0);</div><div class="line"><a name="l00204"></a><span class="lineno"> 204</span>  <span class="comment">/* Set UART_CLK_PODF. */</span></div><div class="line"><a name="l00205"></a><span class="lineno"> 205</span>  CLOCK_SetDiv(kCLOCK_UartDiv, 0x0);</div><div class="line"><a name="l00206"></a><span class="lineno"> 206</span>  <span class="comment">/* Set Uart clock source. */</span></div><div class="line"><a name="l00207"></a><span class="lineno"> 207</span>  CLOCK_SetMux(kCLOCK_UartMux, 0x0);</div><div class="line"><a name="l00208"></a><span class="lineno"> 208</span> </div><div class="line"><a name="l00209"></a><span class="lineno"> 209</span> <span class="preprocessor">#ifndef SKIP_SYSCLK_INIT</span></div><div class="line"><a name="l00210"></a><span class="lineno"> 210</span>  <span class="comment">/* Init System PLL (PLL2). */</span></div><div class="line"><a name="l00211"></a><span class="lineno"> 211</span>  CLOCK_InitSysPll(&<a class="code" href="a04253.html#a1eb8739af679f60d21566c74233f2072">sysPllConfig_BOARD_BootClockRUN</a>);</div><div class="line"><a name="l00212"></a><span class="lineno"> 212</span>  CLOCK_InitSysPfd(kCLOCK_Pfd2, 18);</div><div class="line"><a name="l00213"></a><span class="lineno"> 213</span>  CLOCK_InitSysPfd(kCLOCK_Pfd3, 18);</div><div class="line"><a name="l00214"></a><span class="lineno"> 214</span> <span class="preprocessor">#endif</span></div><div class="line"><a name="l00215"></a><span class="lineno"> 215</span> <span class="preprocessor">#ifndef XIP_EXTERNAL_FLASH</span></div><div class="line"><a name="l00216"></a><span class="lineno"> 216</span>  <span class="comment">/* Init Usb1 PLL (PLL3). */</span></div><div class="line"><a name="l00217"></a><span class="lineno"> 217</span>  CLOCK_InitUsb1Pll(&<a class="code" href="a04253.html#a9d28a505d06fb58d283e270865d17566">usb1PllConfig_BOARD_BootClockRUN</a>);</div><div class="line"><a name="l00218"></a><span class="lineno"> 218</span>  CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 18);</div><div class="line"><a name="l00219"></a><span class="lineno"> 219</span> <span class="preprocessor">#endif</span></div><div class="line"><a name="l00220"></a><span class="lineno"> 220</span>  CLOCK_InitEnetPll(&<a class="code" href="a04253.html#aca5fe9b5426f8c656c9c53d7088a4338">enetPllConfig_BOARD_BootClockRUN</a>);</div><div class="line"><a name="l00221"></a><span class="lineno"> 221</span>  <span class="comment">/* Set preperiph clock source. */</span></div><div class="line"><a name="l00222"></a><span class="lineno"> 222</span>  CLOCK_SetMux(kCLOCK_PrePeriphMux, 0x3);</div><div class="line"><a name="l00223"></a><span class="lineno"> 223</span>  <span class="comment">/* Set periph clock source. */</span></div><div class="line"><a name="l00224"></a><span class="lineno"> 224</span>  CLOCK_SetMux(kCLOCK_PeriphMux, 0x0);</div><div class="line"><a name="l00225"></a><span class="lineno"> 225</span>  <span class="comment">/* Set PERIPH_CLK2_PODF. */</span></div><div class="line"><a name="l00226"></a><span class="lineno"> 226</span>  CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0x0);</div><div class="line"><a name="l00227"></a><span class="lineno"> 227</span>  <span class="comment">/* Set periph clock2 clock source. */</span></div><div class="line"><a name="l00228"></a><span class="lineno"> 228</span>  CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0x0);</div><div class="line"><a name="l00229"></a><span class="lineno"> 229</span> </div><div class="line"><a name="l00230"></a><span class="lineno"> 230</span>  SystemCoreClockUpdate();</div><div class="line"><a name="l00231"></a><span class="lineno"> 231</span> }</div><div class="ttc" id="a04292_html_ac2b7bb542e5cb061aec9ac2c07ec20a0"><div class="ttname"><a href="a04292.html#ac2b7bb542e5cb061aec9ac2c07ec20a0">BOARD_XTAL32K_CLK_HZ</a></div><div class="ttdeci">#define BOARD_XTAL32K_CLK_HZ</div><div class="ttdef"><b>Definition:</b> <a href="a04292_source.html#l00018">clock_config.h:18</a></div></div> 52<div class="ttc" id="a04253_html_aca5fe9b5426f8c656c9c53d7088a4338"><div class="ttname"><a href="a04253.html#aca5fe9b5426f8c656c9c53d7088a4338">enetPllConfig_BOARD_BootClockRUN</a></div><div class="ttdeci">const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN</div><div class="ttdoc">Enet PLL set for BOARD_BootClockRUN configuration. </div><div class="ttdef"><b>Definition:</b> <a href="a04253_source.html#l00130">clock_config.c:130</a></div></div> 53<div class="ttc" id="a04223_html_aa3cd3e43291e81e795d642b79b6088e6"><div class="ttname"><a href="a04223.html#aa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a></div><div class="ttdeci">uint32_t SystemCoreClock</div></div> 54<div class="ttc" id="a04253_html_a9d28a505d06fb58d283e270865d17566"><div class="ttname"><a href="a04253.html#a9d28a505d06fb58d283e270865d17566">usb1PllConfig_BOARD_BootClockRUN</a></div><div class="ttdeci">const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN</div><div class="ttdoc">Usb1 PLL set for BOARD_BootClockRUN configuration. </div><div class="ttdef"><b>Definition:</b> <a href="a04253_source.html#l00126">clock_config.c:126</a></div></div> 55<div class="ttc" id="a04280_html_ad09513e3c601985fc61136ef6c0678f9"><div class="ttname"><a href="a04280.html#ad09513e3c601985fc61136ef6c0678f9">BOARD_XTAL0_CLK_HZ</a></div><div class="ttdeci">#define BOARD_XTAL0_CLK_HZ</div><div class="ttdef"><b>Definition:</b> <a href="a04280_source.html#l00017">clock_config.h:17</a></div></div> 56<div class="ttc" id="a04313_html"><div class="ttname"><a href="a04313.html">clock_config.h</a></div></div> 57<div class="ttc" id="a04253_html_a1eb8739af679f60d21566c74233f2072"><div class="ttname"><a href="a04253.html#a1eb8739af679f60d21566c74233f2072">sysPllConfig_BOARD_BootClockRUN</a></div><div class="ttdeci">const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN</div><div class="ttdoc">Sys PLL for BOARD_BootClockRUN configuration. </div><div class="ttdef"><b>Definition:</b> <a href="a04253_source.html#l00120">clock_config.c:120</a></div></div> 58<div class="ttc" id="a04238_html_a09a9a2026d4c394534e528d519370d3e"><div class="ttname"><a href="a04238.html#a09a9a2026d4c394534e528d519370d3e">BOARD_InitBootClocks</a></div><div class="ttdeci">void BOARD_InitBootClocks(void)</div><div class="ttdoc">This function executes default configuration of clocks. </div><div class="ttdef"><b>Definition:</b> <a href="a04238_source.html#l00052">clock_config.c:52</a></div></div> 59<div class="ttc" id="a04223_html_a5e69c4eff0fd5236bbb0ff4e1d5a7a7e"><div class="ttname"><a href="a04223.html#a5e69c4eff0fd5236bbb0ff4e1d5a7a7e">BOARD_BootClockRUN</a></div><div class="ttdeci">void BOARD_BootClockRUN(void)</div><div class="ttdoc">This function executes configuration of clocks. </div><div class="ttdef"><b>Definition:</b> <a href="a04223_source.html#l00168">clock_config.c:168</a></div></div> 60</div><!-- fragment --></div><!-- contents --> 61 62<hr class="footer"/><address class="footer"><small> 63© Copyright 2016-2022 NXP. All Rights Reserved. SPDX-License-Identifier: BSD-3-Clause 64</small></address> 65</body> 66</html> 67
