1<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> 2<html xmlns="http://www.w3.org/1999/xhtml"> 3<head> 4<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> 5<meta http-equiv="X-UA-Compatible" content="IE=9"/> 6<meta name="generator" content="Doxygen 1.8.13"/> 7<meta name="viewport" content="width=device-width, initial-scale=1"/> 8<title>ISSDK: boardkit/frdm-k32w042/clock_config.c Source File</title> 9<link href="tabs.css" rel="stylesheet" type="text/css"/> 10<script type="text/javascript" src="jquery.js"></script> 11<script type="text/javascript" src="dynsections.js"></script> 12<link href="issdk_stylesheet.css" rel="stylesheet" type="text/css" /> 13</head> 14<body> 15<div id="top"><!-- do not remove this div, it is closed by doxygen! --> 16<div id="titlearea"> 17<table cellspacing="0" cellpadding="0"> 18 <tbody> 19 <tr style="height: 56px;"> 20 <td id="projectlogo"><img alt="Logo" src="nxp_logo_small.png"/></td> 21 <td id="projectalign" style="padding-left: 0.5em;"> 22 <div id="projectname">ISSDK 23  <span id="projectnumber">1.8</span> 24 </div> 25 <div id="projectbrief">IoT Sensing Software Development Kit</div> 26 </td> 27 </tr> 28 </tbody> 29</table> 30</div> 31<!-- end header part --> 32<!-- Generated by Doxygen 1.8.13 --> 33<script type="text/javascript" src="menudata.js"></script> 34<script type="text/javascript" src="menu.js"></script> 35<script type="text/javascript"> 36$(function() { 37 initMenu('',false,false,'search.php','Search'); 38}); 39</script> 40<div id="main-nav"></div> 41<div id="nav-path" class="navpath"> 42 <ul> 43<li class="navelem"><a class="el" href="dir_6994211064bad48d3d63a6227f5100d6.html">boardkit</a></li><li class="navelem"><a class="el" href="dir_2692879e20973b44d33f0adfa9bd527e.html">frdm-k32w042</a></li> </ul> 44</div> 45</div><!-- top --> 46<div class="header"> 47 <div class="headertitle"> 48<div class="title">clock_config.c</div> </div> 49</div><!--header--> 50<div class="contents"> 51<a href="a04244.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span> <span class="comment">/*</span></div><div class="line"><a name="l00002"></a><span class="lineno"> 2</span> <span class="comment"> * Copyright 2017 NXP</span></div><div class="line"><a name="l00003"></a><span class="lineno"> 3</span> <span class="comment"> * All rights reserved.</span></div><div class="line"><a name="l00004"></a><span class="lineno"> 4</span> <span class="comment"> *</span></div><div class="line"><a name="l00005"></a><span class="lineno"> 5</span> <span class="comment"> * SPDX-License-Identifier: BSD-3-Clause</span></div><div class="line"><a name="l00006"></a><span class="lineno"> 6</span> <span class="comment"> */</span></div><div class="line"><a name="l00007"></a><span class="lineno"> 7</span>  </div><div class="line"><a name="l00008"></a><span class="lineno"> 8</span> <span class="comment">/*</span></div><div class="line"><a name="l00009"></a><span class="lineno"> 9</span> <span class="comment"> * How to setup clock using clock driver functions:</span></div><div class="line"><a name="l00010"></a><span class="lineno"> 10</span> <span class="comment"> *</span></div><div class="line"><a name="l00011"></a><span class="lineno"> 11</span> <span class="comment"> * 1. Call CLOCK_InitXXX() to configure corresponding SCG clock source.</span></div><div class="line"><a name="l00012"></a><span class="lineno"> 12</span> <span class="comment"> * Note: The clock could not be set when it is being used as system clock.</span></div><div class="line"><a name="l00013"></a><span class="lineno"> 13</span> <span class="comment"> * In default out of reset, the CPU is clocked from FIRC(IRC48M),</span></div><div class="line"><a name="l00014"></a><span class="lineno"> 14</span> <span class="comment"> * so before setting FIRC, change to use another avaliable clock source.</span></div><div class="line"><a name="l00015"></a><span class="lineno"> 15</span> <span class="comment"> *</span></div><div class="line"><a name="l00016"></a><span class="lineno"> 16</span> <span class="comment"> * 2. Call CLOCK_SetXtal0Freq() to set XTAL0 frequency based on board settings.</span></div><div class="line"><a name="l00017"></a><span class="lineno"> 17</span> <span class="comment"> *</span></div><div class="line"><a name="l00018"></a><span class="lineno"> 18</span> <span class="comment"> * 3. Call CLOCK_SetXxxModeSysClkConfig() to set SCG mode for Xxx run mode.</span></div><div class="line"><a name="l00019"></a><span class="lineno"> 19</span> <span class="comment"> * Wait until the system clock source is changed to target source.</span></div><div class="line"><a name="l00020"></a><span class="lineno"> 20</span> <span class="comment"> *</span></div><div class="line"><a name="l00021"></a><span class="lineno"> 21</span> <span class="comment"> * 4. If power mode change is needed, call SMC_SetPowerModeProtection() to allow</span></div><div class="line"><a name="l00022"></a><span class="lineno"> 22</span> <span class="comment"> * corresponding power mode and SMC_SetPowerModeXxx() to change to Xxx mode.</span></div><div class="line"><a name="l00023"></a><span class="lineno"> 23</span> <span class="comment"> * Supported run mode and clock restrictions could be found in Reference Manual.</span></div><div class="line"><a name="l00024"></a><span class="lineno"> 24</span> <span class="comment"> */</span></div><div class="line"><a name="l00025"></a><span class="lineno"> 25</span> </div><div class="line"><a name="l00026"></a><span class="lineno"> 26</span> <span class="comment">/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************</span></div><div class="line"><a name="l00027"></a><span class="lineno"> 27</span> <span class="comment">!!GlobalInfo</span></div><div class="line"><a name="l00028"></a><span class="lineno"> 28</span> <span class="comment">product: Clocks v3.0</span></div><div class="line"><a name="l00029"></a><span class="lineno"> 29</span> <span class="comment">processor: K32W042S1M2xxx</span></div><div class="line"><a name="l00030"></a><span class="lineno"> 30</span> <span class="comment">package_id: K32W042S1M2VPJ</span></div><div class="line"><a name="l00031"></a><span class="lineno"> 31</span> <span class="comment">mcu_data: ksdk2_0</span></div><div class="line"><a name="l00032"></a><span class="lineno"> 32</span> <span class="comment">processor_version: 0.0.0</span></div><div class="line"><a name="l00033"></a><span class="lineno"> 33</span> <span class="comment"> * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/</span></div><div class="line"><a name="l00034"></a><span class="lineno"> 34</span> </div><div class="line"><a name="l00035"></a><span class="lineno"> 35</span> <span class="preprocessor">#include "<a class="code" href="a04301.html">clock_config.h</a>"</span></div><div class="line"><a name="l00036"></a><span class="lineno"> 36</span> </div><div class="line"><a name="l00037"></a><span class="lineno"> 37</span> <span class="comment">/*******************************************************************************</span></div><div class="line"><a name="l00038"></a><span class="lineno"> 38</span> <span class="comment"> * Definitions</span></div><div class="line"><a name="l00039"></a><span class="lineno"> 39</span> <span class="comment"> ******************************************************************************/</span></div><div class="line"><a name="l00040"></a><span class="lineno"><a class="line" href="a04244.html#aaca1879e0759e80e5adb3044c10c7dd0"> 40</a></span> <span class="preprocessor">#define SCG_LPFLL_DISABLE 0U </span><span class="comment">/*!< LPFLL clock disabled */</span><span class="preprocessor"></span></div><div class="line"><a name="l00041"></a><span class="lineno"> 41</span> </div><div class="line"><a name="l00042"></a><span class="lineno"> 42</span> <span class="comment">/*******************************************************************************</span></div><div class="line"><a name="l00043"></a><span class="lineno"> 43</span> <span class="comment"> * Variables</span></div><div class="line"><a name="l00044"></a><span class="lineno"> 44</span> <span class="comment"> ******************************************************************************/</span></div><div class="line"><a name="l00045"></a><span class="lineno"> 45</span> <span class="comment">/* System clock frequency. */</span></div><div class="line"><a name="l00046"></a><span class="lineno"> 46</span> <span class="keyword">extern</span> uint32_t <a class="code" href="a04223.html#aa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a>;</div><div class="line"><a name="l00047"></a><span class="lineno"> 47</span> </div><div class="line"><a name="l00048"></a><span class="lineno"> 48</span> <span class="comment">/*******************************************************************************</span></div><div class="line"><a name="l00049"></a><span class="lineno"> 49</span> <span class="comment"> * Code</span></div><div class="line"><a name="l00050"></a><span class="lineno"> 50</span> <span class="comment"> ******************************************************************************/</span></div><div class="line"><a name="l00051"></a><span class="lineno"> 51</span> <span class="comment">/*FUNCTION**********************************************************************</span></div><div class="line"><a name="l00052"></a><span class="lineno"> 52</span> <span class="comment"> *</span></div><div class="line"><a name="l00053"></a><span class="lineno"> 53</span> <span class="comment"> * Function Name : CLOCK_CONFIG_FircSafeConfig</span></div><div class="line"><a name="l00054"></a><span class="lineno"> 54</span> <span class="comment"> * Description : This function is used to safely configure FIRC clock.</span></div><div class="line"><a name="l00055"></a><span class="lineno"> 55</span> <span class="comment"> * In default out of reset, the CPU is clocked from FIRC(IRC48M).</span></div><div class="line"><a name="l00056"></a><span class="lineno"> 56</span> <span class="comment"> * Before setting FIRC, change to use SIRC as system clock,</span></div><div class="line"><a name="l00057"></a><span class="lineno"> 57</span> <span class="comment"> * then configure FIRC. After FIRC is set, change back to use FIRC</span></div><div class="line"><a name="l00058"></a><span class="lineno"> 58</span> <span class="comment"> * in case SIRC need to be configured.</span></div><div class="line"><a name="l00059"></a><span class="lineno"> 59</span> <span class="comment"> * Param fircConfig : FIRC configuration.</span></div><div class="line"><a name="l00060"></a><span class="lineno"> 60</span> <span class="comment"> *</span></div><div class="line"><a name="l00061"></a><span class="lineno"> 61</span> <span class="comment"> *END**************************************************************************/</span></div><div class="line"><a name="l00062"></a><span class="lineno"> 62</span> <span class="keyword">static</span> <span class="keywordtype">void</span> CLOCK_CONFIG_FircSafeConfig(<span class="keyword">const</span> scg_firc_config_t *fircConfig)</div><div class="line"><a name="l00063"></a><span class="lineno"> 63</span> {</div><div class="line"><a name="l00064"></a><span class="lineno"> 64</span>  scg_sys_clk_config_t curConfig;</div><div class="line"><a name="l00065"></a><span class="lineno"> 65</span>  <span class="keyword">const</span> scg_sirc_config_t scgSircConfig = {.enableMode = kSCG_SircEnable,</div><div class="line"><a name="l00066"></a><span class="lineno"> 66</span>  .div1 = kSCG_AsyncClkDisable,</div><div class="line"><a name="l00067"></a><span class="lineno"> 67</span>  .div2 = kSCG_AsyncClkDivBy2,</div><div class="line"><a name="l00068"></a><span class="lineno"> 68</span>  .range = kSCG_SircRangeHigh};</div><div class="line"><a name="l00069"></a><span class="lineno"> 69</span>  scg_sys_clk_config_t sysClkSafeConfigSource = {</div><div class="line"><a name="l00070"></a><span class="lineno"> 70</span>  .divSlow = kSCG_SysClkDivBy4, <span class="comment">/* Slow clock divider. */</span></div><div class="line"><a name="l00071"></a><span class="lineno"> 71</span>  .divCore = kSCG_SysClkDivBy1, <span class="comment">/* Core clock divider. */</span></div><div class="line"><a name="l00072"></a><span class="lineno"> 72</span>  .src = kSCG_SysClkSrcSirc <span class="comment">/* System clock source. */</span></div><div class="line"><a name="l00073"></a><span class="lineno"> 73</span>  };</div><div class="line"><a name="l00074"></a><span class="lineno"> 74</span>  <span class="comment">/* Init Sirc */</span></div><div class="line"><a name="l00075"></a><span class="lineno"> 75</span>  CLOCK_InitSirc(&scgSircConfig);</div><div class="line"><a name="l00076"></a><span class="lineno"> 76</span>  <span class="comment">/* Change to use SIRC as system clock source to prepare to change FIRCCFG register */</span></div><div class="line"><a name="l00077"></a><span class="lineno"> 77</span>  CLOCK_SetRunModeSysClkConfig(&sysClkSafeConfigSource);</div><div class="line"><a name="l00078"></a><span class="lineno"> 78</span>  <span class="comment">/* Wait for clock source switch finished */</span></div><div class="line"><a name="l00079"></a><span class="lineno"> 79</span>  <span class="keywordflow">do</span></div><div class="line"><a name="l00080"></a><span class="lineno"> 80</span>  {</div><div class="line"><a name="l00081"></a><span class="lineno"> 81</span>  CLOCK_GetCurSysClkConfig(&curConfig);</div><div class="line"><a name="l00082"></a><span class="lineno"> 82</span>  } <span class="keywordflow">while</span> (curConfig.src != sysClkSafeConfigSource.src);</div><div class="line"><a name="l00083"></a><span class="lineno"> 83</span> </div><div class="line"><a name="l00084"></a><span class="lineno"> 84</span>  <span class="comment">/* Init Firc */</span></div><div class="line"><a name="l00085"></a><span class="lineno"> 85</span>  CLOCK_InitFirc(fircConfig);</div><div class="line"><a name="l00086"></a><span class="lineno"> 86</span>  <span class="comment">/* Change back to use FIRC as system clock source in order to configure SIRC if needed */</span></div><div class="line"><a name="l00087"></a><span class="lineno"> 87</span>  sysClkSafeConfigSource.src = kSCG_SysClkSrcFirc;</div><div class="line"><a name="l00088"></a><span class="lineno"> 88</span>  CLOCK_SetRunModeSysClkConfig(&sysClkSafeConfigSource);</div><div class="line"><a name="l00089"></a><span class="lineno"> 89</span>  <span class="comment">/* Wait for clock source switch finished */</span></div><div class="line"><a name="l00090"></a><span class="lineno"> 90</span>  <span class="keywordflow">do</span></div><div class="line"><a name="l00091"></a><span class="lineno"> 91</span>  {</div><div class="line"><a name="l00092"></a><span class="lineno"> 92</span>  CLOCK_GetCurSysClkConfig(&curConfig);</div><div class="line"><a name="l00093"></a><span class="lineno"> 93</span>  } <span class="keywordflow">while</span> (curConfig.src != sysClkSafeConfigSource.src);</div><div class="line"><a name="l00094"></a><span class="lineno"> 94</span> }</div><div class="line"><a name="l00095"></a><span class="lineno"> 95</span> </div><div class="line"><a name="l00096"></a><span class="lineno"> 96</span> <span class="comment">/*******************************************************************************</span></div><div class="line"><a name="l00097"></a><span class="lineno"> 97</span> <span class="comment"> ************************ BOARD_InitBootClocks function ************************</span></div><div class="line"><a name="l00098"></a><span class="lineno"> 98</span> <span class="comment"> ******************************************************************************/</span></div><div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="a04244.html#a09a9a2026d4c394534e528d519370d3e"> 99</a></span> <span class="keywordtype">void</span> <a class="code" href="a04238.html#a09a9a2026d4c394534e528d519370d3e">BOARD_InitBootClocks</a>(<span class="keywordtype">void</span>)</div><div class="line"><a name="l00100"></a><span class="lineno"> 100</span> {</div><div class="line"><a name="l00101"></a><span class="lineno"> 101</span>  <a class="code" href="a04223.html#a5e69c4eff0fd5236bbb0ff4e1d5a7a7e">BOARD_BootClockRUN</a>();</div><div class="line"><a name="l00102"></a><span class="lineno"> 102</span> }</div><div class="line"><a name="l00103"></a><span class="lineno"> 103</span> </div><div class="line"><a name="l00104"></a><span class="lineno"> 104</span> <span class="comment">/*******************************************************************************</span></div><div class="line"><a name="l00105"></a><span class="lineno"> 105</span> <span class="comment"> ********************** Configuration BOARD_BootClockRUN ***********************</span></div><div class="line"><a name="l00106"></a><span class="lineno"> 106</span> <span class="comment"> ******************************************************************************/</span></div><div class="line"><a name="l00107"></a><span class="lineno"> 107</span> <span class="comment">/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************</span></div><div class="line"><a name="l00108"></a><span class="lineno"> 108</span> <span class="comment">!!Configuration</span></div><div class="line"><a name="l00109"></a><span class="lineno"> 109</span> <span class="comment">name: BOARD_BootClockRUN</span></div><div class="line"><a name="l00110"></a><span class="lineno"> 110</span> <span class="comment">called_from_default_init: true</span></div><div class="line"><a name="l00111"></a><span class="lineno"> 111</span> <span class="comment">outputs:</span></div><div class="line"><a name="l00112"></a><span class="lineno"> 112</span> <span class="comment">- {id: Bus_clock.outFreq, value: 48 MHz}</span></div><div class="line"><a name="l00113"></a><span class="lineno"> 113</span> <span class="comment">- {id: Core_clock.outFreq, value: 48 MHz}</span></div><div class="line"><a name="l00114"></a><span class="lineno"> 114</span> <span class="comment">- {id: FIRCDIV2_CLK.outFreq, value: 48 MHz}</span></div><div class="line"><a name="l00115"></a><span class="lineno"> 115</span> <span class="comment">- {id: LPO_CLK.outFreq, value: 1 kHz}</span></div><div class="line"><a name="l00116"></a><span class="lineno"> 116</span> <span class="comment">- {id: PCC0.PCC_LPUART0_CLK.outFreq, value: 48 MHz}</span></div><div class="line"><a name="l00117"></a><span class="lineno"> 117</span> <span class="comment">- {id: Platform_clock.outFreq, value: 48 MHz}</span></div><div class="line"><a name="l00118"></a><span class="lineno"> 118</span> <span class="comment">- {id: Slow_clock.outFreq, value: 24 MHz}</span></div><div class="line"><a name="l00119"></a><span class="lineno"> 119</span> <span class="comment">- {id: System_clock.outFreq, value: 48 MHz}</span></div><div class="line"><a name="l00120"></a><span class="lineno"> 120</span> <span class="comment">settings:</span></div><div class="line"><a name="l00121"></a><span class="lineno"> 121</span> <span class="comment">- {id: PCC0.PCC_LPUART0_SEL.sel, value: SCG.FIRCDIV2_CLK}</span></div><div class="line"><a name="l00122"></a><span class="lineno"> 122</span> <span class="comment">- {id: SCG.FIRCDIV2.scale, value: '1', locked: true}</span></div><div class="line"><a name="l00123"></a><span class="lineno"> 123</span> <span class="comment"> * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/</span></div><div class="line"><a name="l00124"></a><span class="lineno"> 124</span> </div><div class="line"><a name="l00125"></a><span class="lineno"> 125</span> <span class="comment">/*******************************************************************************</span></div><div class="line"><a name="l00126"></a><span class="lineno"> 126</span> <span class="comment"> * Variables for BOARD_BootClockRUN configuration</span></div><div class="line"><a name="l00127"></a><span class="lineno"> 127</span> <span class="comment"> ******************************************************************************/</span></div><div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="a04244.html#a9608b8d38f9bebc0bd4f50f9d8ce30ab"> 128</a></span> <span class="keyword">const</span> scg_sys_clk_config_t <a class="code" href="a04241.html#a9608b8d38f9bebc0bd4f50f9d8ce30ab">g_sysClkConfig_BOARD_BootClockRUN</a> = {</div><div class="line"><a name="l00129"></a><span class="lineno"> 129</span>  .divSlow = kSCG_SysClkDivBy2, <span class="comment">/* Slow Clock Divider: divided by 2 */</span></div><div class="line"><a name="l00130"></a><span class="lineno"> 130</span>  .divBus = kSCG_SysClkDivBy1, <span class="comment">/* Bus Clock Divider: divided by 1 */</span></div><div class="line"><a name="l00131"></a><span class="lineno"> 131</span>  .divExt = kSCG_SysClkDivBy1, <span class="comment">/* External Clock Divider: divided by 1 */</span></div><div class="line"><a name="l00132"></a><span class="lineno"> 132</span>  .divCore = kSCG_SysClkDivBy1, <span class="comment">/* Core Clock Divider: divided by 1 */</span></div><div class="line"><a name="l00133"></a><span class="lineno"> 133</span>  .src = kSCG_SysClkSrcFirc, <span class="comment">/* Fast IRC is selected as System Clock Source */</span></div><div class="line"><a name="l00134"></a><span class="lineno"> 134</span> };</div><div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="a04244.html#a43bf8979e09a0a941320583656ed32f7"> 135</a></span> <span class="keyword">const</span> scg_sosc_config_t <a class="code" href="a04241.html#a43bf8979e09a0a941320583656ed32f7">g_scgSysOscConfig_BOARD_BootClockRUN</a> = {</div><div class="line"><a name="l00136"></a><span class="lineno"> 136</span>  .freq = 0U, <span class="comment">/* System Oscillator frequency: 0Hz */</span></div><div class="line"><a name="l00137"></a><span class="lineno"> 137</span>  .div1 = kSCG_AsyncClkDisable, <span class="comment">/* System OSC Clock Divider 1: Clock output is disabled */</span></div><div class="line"><a name="l00138"></a><span class="lineno"> 138</span>  .div2 = kSCG_AsyncClkDisable, <span class="comment">/* System OSC Clock Divider 2: Clock output is disabled */</span></div><div class="line"><a name="l00139"></a><span class="lineno"> 139</span>  .div3 = kSCG_AsyncClkDisable, <span class="comment">/* System OSC Clock Divider 3: Clock output is disabled */</span></div><div class="line"><a name="l00140"></a><span class="lineno"> 140</span> };</div><div class="line"><a name="l00141"></a><span class="lineno"><a class="line" href="a04244.html#af4d90a1ba81948cb43b4ea3bbf1430fa"> 141</a></span> <span class="keyword">const</span> scg_sirc_config_t <a class="code" href="a04241.html#af4d90a1ba81948cb43b4ea3bbf1430fa">g_scgSircConfig_BOARD_BootClockRUN</a> = {</div><div class="line"><a name="l00142"></a><span class="lineno"> 142</span>  .enableMode = kSCG_SircEnable | kSCG_SircEnableInLowPower, <span class="comment">/* Enable SIRC clock, Enable SIRC in low power mode */</span></div><div class="line"><a name="l00143"></a><span class="lineno"> 143</span>  .div1 = kSCG_AsyncClkDisable, <span class="comment">/* Slow IRC Clock Divider 1: Clock output is disabled */</span></div><div class="line"><a name="l00144"></a><span class="lineno"> 144</span>  .div2 = kSCG_AsyncClkDisable, <span class="comment">/* Slow IRC Clock Divider 2: Clock output is disabled */</span></div><div class="line"><a name="l00145"></a><span class="lineno"> 145</span>  .div3 = kSCG_AsyncClkDivBy1, <span class="comment">/* Slow IRC Clock Divider 3: divided by 1 */</span></div><div class="line"><a name="l00146"></a><span class="lineno"> 146</span>  .range = kSCG_SircRangeHigh, <span class="comment">/* Slow IRC high range clock (8 MHz) */</span></div><div class="line"><a name="l00147"></a><span class="lineno"> 147</span> };</div><div class="line"><a name="l00148"></a><span class="lineno"><a class="line" href="a04244.html#a11b406d8b361edd1a4bebc8930743a0a"> 148</a></span> <span class="keyword">const</span> scg_firc_config_t <a class="code" href="a04241.html#a11b406d8b361edd1a4bebc8930743a0a">g_scgFircConfig_BOARD_BootClockRUN</a> = {</div><div class="line"><a name="l00149"></a><span class="lineno"> 149</span>  .enableMode = kSCG_FircEnable, <span class="comment">/* Enable FIRC clock */</span></div><div class="line"><a name="l00150"></a><span class="lineno"> 150</span>  .div1 = kSCG_AsyncClkDivBy1, <span class="comment">/* Fast IRC Clock Divider 1: divided by 1 */</span></div><div class="line"><a name="l00151"></a><span class="lineno"> 151</span>  .div2 = kSCG_AsyncClkDivBy1, <span class="comment">/* Fast IRC Clock Divider 2: divided by 1 */</span></div><div class="line"><a name="l00152"></a><span class="lineno"> 152</span>  .div3 = kSCG_AsyncClkDivBy1, <span class="comment">/* Fast IRC Clock Divider 3: divided by 1 */</span></div><div class="line"><a name="l00153"></a><span class="lineno"> 153</span>  .range = kSCG_FircRange48M, <span class="comment">/* Fast IRC is trimmed to 48MHz */</span></div><div class="line"><a name="l00154"></a><span class="lineno"> 154</span>  .trimConfig = NULL, <span class="comment">/* Fast IRC Trim disabled */</span></div><div class="line"><a name="l00155"></a><span class="lineno"> 155</span> };</div><div class="line"><a name="l00156"></a><span class="lineno"><a class="line" href="a04244.html#aaba96dcc6379af631b9b3eca820277cd"> 156</a></span> <span class="keyword">const</span> scg_lpfll_config_t <a class="code" href="a04241.html#aaba96dcc6379af631b9b3eca820277cd">g_scgLpFllConfig_BOARD_BootClockRUN</a> = {</div><div class="line"><a name="l00157"></a><span class="lineno"> 157</span>  .enableMode = kSCG_LpFllEnable, <span class="comment">/* LPFLL clock disabled */</span></div><div class="line"><a name="l00158"></a><span class="lineno"> 158</span>  .div1 = kSCG_AsyncClkDivBy1, <span class="comment">/* Low Power FLL Clock Divider 1: Clock output is disabled */</span></div><div class="line"><a name="l00159"></a><span class="lineno"> 159</span>  .div2 = kSCG_AsyncClkDisable, <span class="comment">/* Low Power FLL Clock Divider 2: Clock output is disabled */</span></div><div class="line"><a name="l00160"></a><span class="lineno"> 160</span>  .div3 = kSCG_AsyncClkDisable, <span class="comment">/* Low Power FLL Clock Divider 3: Clock output is disabled */</span></div><div class="line"><a name="l00161"></a><span class="lineno"> 161</span>  .range = kSCG_LpFllRange72M, <span class="comment">/* LPFLL is trimmed to 48MHz */</span></div><div class="line"><a name="l00162"></a><span class="lineno"> 162</span>  .trimConfig = NULL,</div><div class="line"><a name="l00163"></a><span class="lineno"> 163</span> };</div><div class="line"><a name="l00164"></a><span class="lineno"> 164</span> <span class="comment">/*******************************************************************************</span></div><div class="line"><a name="l00165"></a><span class="lineno"> 165</span> <span class="comment"> * Code for BOARD_BootClockRUN configuration</span></div><div class="line"><a name="l00166"></a><span class="lineno"> 166</span> <span class="comment"> ******************************************************************************/</span></div><div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="a04244.html#a5e69c4eff0fd5236bbb0ff4e1d5a7a7e"> 167</a></span> <span class="keywordtype">void</span> <a class="code" href="a04223.html#a5e69c4eff0fd5236bbb0ff4e1d5a7a7e">BOARD_BootClockRUN</a>(<span class="keywordtype">void</span>)</div><div class="line"><a name="l00168"></a><span class="lineno"> 168</span> {</div><div class="line"><a name="l00169"></a><span class="lineno"> 169</span>  scg_sys_clk_config_t curConfig;</div><div class="line"><a name="l00170"></a><span class="lineno"> 170</span> </div><div class="line"><a name="l00171"></a><span class="lineno"> 171</span>  <span class="comment">/* Init FIRC */</span></div><div class="line"><a name="l00172"></a><span class="lineno"> 172</span>  CLOCK_CONFIG_FircSafeConfig(&<a class="code" href="a04241.html#a11b406d8b361edd1a4bebc8930743a0a">g_scgFircConfig_BOARD_BootClockRUN</a>);</div><div class="line"><a name="l00173"></a><span class="lineno"> 173</span>  <span class="comment">/* Set SCG to FIRC mode. */</span></div><div class="line"><a name="l00174"></a><span class="lineno"> 174</span>  CLOCK_SetRunModeSysClkConfig(&<a class="code" href="a04241.html#a9608b8d38f9bebc0bd4f50f9d8ce30ab">g_sysClkConfig_BOARD_BootClockRUN</a>);</div><div class="line"><a name="l00175"></a><span class="lineno"> 175</span>  <span class="comment">/* Wait for clock source switch finished */</span></div><div class="line"><a name="l00176"></a><span class="lineno"> 176</span>  <span class="keywordflow">do</span></div><div class="line"><a name="l00177"></a><span class="lineno"> 177</span>  {</div><div class="line"><a name="l00178"></a><span class="lineno"> 178</span>  CLOCK_GetCurSysClkConfig(&curConfig);</div><div class="line"><a name="l00179"></a><span class="lineno"> 179</span>  } <span class="keywordflow">while</span> (curConfig.src != <a class="code" href="a04241.html#a9608b8d38f9bebc0bd4f50f9d8ce30ab">g_sysClkConfig_BOARD_BootClockRUN</a>.src);</div><div class="line"><a name="l00180"></a><span class="lineno"> 180</span>  <span class="comment">/* Init SIRC */</span></div><div class="line"><a name="l00181"></a><span class="lineno"> 181</span>  CLOCK_InitSirc(&<a class="code" href="a04241.html#af4d90a1ba81948cb43b4ea3bbf1430fa">g_scgSircConfig_BOARD_BootClockRUN</a>);</div><div class="line"><a name="l00182"></a><span class="lineno"> 182</span>  <span class="comment">/* Init LPFLL */</span></div><div class="line"><a name="l00183"></a><span class="lineno"> 183</span>  CLOCK_InitLpFll(&<a class="code" href="a04241.html#aaba96dcc6379af631b9b3eca820277cd">g_scgLpFllConfig_BOARD_BootClockRUN</a>);</div><div class="line"><a name="l00184"></a><span class="lineno"> 184</span>  <span class="comment">/* Set SystemCoreClock variable. */</span></div><div class="line"><a name="l00185"></a><span class="lineno"> 185</span>  <a class="code" href="a04223.html#aa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a> = <a class="code" href="a04280.html#a6ae55dea13be64e40de107ee288779f3">BOARD_BOOTCLOCKRUN_CORE_CLOCK</a>;</div><div class="line"><a name="l00186"></a><span class="lineno"> 186</span>  <span class="comment">/* Set PCC LPUART0 selection */</span></div><div class="line"><a name="l00187"></a><span class="lineno"> 187</span>  CLOCK_SetIpSrc(kCLOCK_Lpuart0, kCLOCK_IpSrcFircAsync);</div><div class="line"><a name="l00188"></a><span class="lineno"> 188</span> }</div><div class="ttc" id="a04241_html_a43bf8979e09a0a941320583656ed32f7"><div class="ttname"><a href="a04241.html#a43bf8979e09a0a941320583656ed32f7">g_scgSysOscConfig_BOARD_BootClockRUN</a></div><div class="ttdeci">const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockRUN</div><div class="ttdoc">System OSC set for BOARD_BootClockRUN configuration. </div><div class="ttdef"><b>Definition:</b> <a href="a04241_source.html#l00147">clock_config.c:147</a></div></div> 52<div class="ttc" id="a04301_html"><div class="ttname"><a href="a04301.html">clock_config.h</a></div></div> 53<div class="ttc" id="a04241_html_a9608b8d38f9bebc0bd4f50f9d8ce30ab"><div class="ttname"><a href="a04241.html#a9608b8d38f9bebc0bd4f50f9d8ce30ab">g_sysClkConfig_BOARD_BootClockRUN</a></div><div class="ttdeci">const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockRUN</div><div class="ttdoc">SCG set for BOARD_BootClockRUN configuration. </div><div class="ttdef"><b>Definition:</b> <a href="a04241_source.html#l00141">clock_config.c:141</a></div></div> 54<div class="ttc" id="a04241_html_af4d90a1ba81948cb43b4ea3bbf1430fa"><div class="ttname"><a href="a04241.html#af4d90a1ba81948cb43b4ea3bbf1430fa">g_scgSircConfig_BOARD_BootClockRUN</a></div><div class="ttdeci">const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockRUN</div><div class="ttdoc">SIRC set for BOARD_BootClockRUN configuration. </div><div class="ttdef"><b>Definition:</b> <a href="a04241_source.html#l00155">clock_config.c:155</a></div></div> 55<div class="ttc" id="a04241_html_aaba96dcc6379af631b9b3eca820277cd"><div class="ttname"><a href="a04241.html#aaba96dcc6379af631b9b3eca820277cd">g_scgLpFllConfig_BOARD_BootClockRUN</a></div><div class="ttdeci">const scg_lpfll_config_t g_scgLpFllConfig_BOARD_BootClockRUN</div><div class="ttdef"><b>Definition:</b> <a href="a04241_source.html#l00168">clock_config.c:168</a></div></div> 56<div class="ttc" id="a04223_html_aa3cd3e43291e81e795d642b79b6088e6"><div class="ttname"><a href="a04223.html#aa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a></div><div class="ttdeci">uint32_t SystemCoreClock</div></div> 57<div class="ttc" id="a04280_html_a6ae55dea13be64e40de107ee288779f3"><div class="ttname"><a href="a04280.html#a6ae55dea13be64e40de107ee288779f3">BOARD_BOOTCLOCKRUN_CORE_CLOCK</a></div><div class="ttdeci">#define BOARD_BOOTCLOCKRUN_CORE_CLOCK</div><div class="ttdef"><b>Definition:</b> <a href="a04280_source.html#l00025">clock_config.h:25</a></div></div> 58<div class="ttc" id="a04238_html_a09a9a2026d4c394534e528d519370d3e"><div class="ttname"><a href="a04238.html#a09a9a2026d4c394534e528d519370d3e">BOARD_InitBootClocks</a></div><div class="ttdeci">void BOARD_InitBootClocks(void)</div><div class="ttdoc">This function executes default configuration of clocks. </div><div class="ttdef"><b>Definition:</b> <a href="a04238_source.html#l00052">clock_config.c:52</a></div></div> 59<div class="ttc" id="a04241_html_a11b406d8b361edd1a4bebc8930743a0a"><div class="ttname"><a href="a04241.html#a11b406d8b361edd1a4bebc8930743a0a">g_scgFircConfig_BOARD_BootClockRUN</a></div><div class="ttdeci">const scg_firc_config_t g_scgFircConfig_BOARD_BootClockRUN</div><div class="ttdef"><b>Definition:</b> <a href="a04241_source.html#l00161">clock_config.c:161</a></div></div> 60<div class="ttc" id="a04223_html_a5e69c4eff0fd5236bbb0ff4e1d5a7a7e"><div class="ttname"><a href="a04223.html#a5e69c4eff0fd5236bbb0ff4e1d5a7a7e">BOARD_BootClockRUN</a></div><div class="ttdeci">void BOARD_BootClockRUN(void)</div><div class="ttdoc">This function executes configuration of clocks. </div><div class="ttdef"><b>Definition:</b> <a href="a04223_source.html#l00168">clock_config.c:168</a></div></div> 61</div><!-- fragment --></div><!-- contents --> 62 63<hr class="footer"/><address class="footer"><small> 64© Copyright 2016-2022 NXP. All Rights Reserved. SPDX-License-Identifier: BSD-3-Clause 65</small></address> 66</body> 67</html> 68