1<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> 2<html xmlns="http://www.w3.org/1999/xhtml"> 3<head> 4<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> 5<meta http-equiv="X-UA-Compatible" content="IE=9"/> 6<meta name="generator" content="Doxygen 1.8.13"/> 7<meta name="viewport" content="width=device-width, initial-scale=1"/> 8<title>ISSDK: sensors/mpl3115.h File Reference</title> 9<link href="tabs.css" rel="stylesheet" type="text/css"/> 10<script type="text/javascript" src="jquery.js"></script> 11<script type="text/javascript" src="dynsections.js"></script> 12<link href="issdk_stylesheet.css" rel="stylesheet" type="text/css" /> 13</head> 14<body> 15<div id="top"><!-- do not remove this div, it is closed by doxygen! --> 16<div id="titlearea"> 17<table cellspacing="0" cellpadding="0"> 18 <tbody> 19 <tr style="height: 56px;"> 20 <td id="projectlogo"><img alt="Logo" src="nxp_logo_small.png"/></td> 21 <td id="projectalign" style="padding-left: 0.5em;"> 22 <div id="projectname">ISSDK 23  <span id="projectnumber">1.8</span> 24 </div> 25 <div id="projectbrief">IoT Sensing Software Development Kit</div> 26 </td> 27 </tr> 28 </tbody> 29</table> 30</div> 31<!-- end header part --> 32<!-- Generated by Doxygen 1.8.13 --> 33<script type="text/javascript" src="menudata.js"></script> 34<script type="text/javascript" src="menu.js"></script> 35<script type="text/javascript"> 36$(function() { 37 initMenu('',false,false,'search.php','Search'); 38}); 39</script> 40<div id="main-nav"></div> 41<div id="nav-path" class="navpath"> 42 <ul> 43<li class="navelem"><a class="el" href="dir_c77a8e2546a9c75bbba96be2ef542c8e.html">sensors</a></li> </ul> 44</div> 45</div><!-- top --> 46<div class="header"> 47 <div class="summary"> 48<a href="#nested-classes">Data Structures</a> | 49<a href="#define-members">Macros</a> | 50<a href="#typedef-members">Typedefs</a> | 51<a href="#enum-members">Enumerations</a> </div> 52 <div class="headertitle"> 53<div class="title">mpl3115.h File Reference</div> </div> 54</div><!--header--> 55<div class="contents"> 56<div class="textblock"><div class="dynheader"> 57This graph shows which files directly or indirectly include this file:</div> 58<div class="dyncontent"> 59<div class="center"><img src="a00160.png" border="0" usemap="#sensors_2mpl3115_8hdep" alt=""/></div> 60<map name="sensors_2mpl3115_8hdep" id="sensors_2mpl3115_8hdep"> 61<area shape="rect" id="node2" href="a00164.html" title="The mpl3115_drv.h file describes the MPL3115 driver interface and structures. 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valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="a03767.html">MPL3115_CTRL_REG4_t</a></td></tr> 110<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr> 111<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="a03775.html">MPL3115_CTRL_REG5_t</a></td></tr> 112<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr> 113</table><table class="memberdecls"> 114<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a> 115Macros</h2></td></tr> 116<tr class="memitem:a1d9478f281f471b0904e193e572718e6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a1d9478f281f471b0904e193e572718e6">MPL3115_I2C_ADDRESS</a>   (0x60) /*MPL3115A2 Address*/</td></tr> 117<tr class="separator:a1d9478f281f471b0904e193e572718e6"><td class="memSeparator" colspan="2"> </td></tr> 118<tr class="memitem:a80b62e22babfe63712df92c8d48bbbcd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a80b62e22babfe63712df92c8d48bbbcd">MPL3115_WHOAMI_VALUE</a>   (0xC4)</td></tr> 119<tr class="separator:a80b62e22babfe63712df92c8d48bbbcd"><td class="memSeparator" colspan="2"> </td></tr> 120<tr class="memitem:a6f978c59362490adf40af46cfbf2d8f8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a6f978c59362490adf40af46cfbf2d8f8">MPL3115_OUT_P_LSB_PD_MASK</a>   ((uint8_t) 0xF0)</td></tr> 121<tr class="separator:a6f978c59362490adf40af46cfbf2d8f8"><td class="memSeparator" colspan="2"> </td></tr> 122<tr class="memitem:a215af1bed4effafbf299070f02a0d5ce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a215af1bed4effafbf299070f02a0d5ce">MPL3115_OUT_P_LSB_PD_SHIFT</a>   ((uint8_t) 4)</td></tr> 123<tr class="separator:a215af1bed4effafbf299070f02a0d5ce"><td class="memSeparator" colspan="2"> </td></tr> 124<tr class="memitem:a0f51cde69b6c1e8e219a9a3bb6f9439a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a0f51cde69b6c1e8e219a9a3bb6f9439a">MPL3115_OUT_T_LSB_PD_MASK</a>   ((uint8_t) 0xF0)</td></tr> 125<tr class="separator:a0f51cde69b6c1e8e219a9a3bb6f9439a"><td class="memSeparator" colspan="2"> </td></tr> 126<tr class="memitem:a887a110af424e5078327149656e3d5eb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a887a110af424e5078327149656e3d5eb">MPL3115_OUT_T_LSB_PD_SHIFT</a>   ((uint8_t) 4)</td></tr> 127<tr class="separator:a887a110af424e5078327149656e3d5eb"><td class="memSeparator" colspan="2"> </td></tr> 128<tr class="memitem:abf359dcb24984479c64f2d58cbd49a1f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#abf359dcb24984479c64f2d58cbd49a1f">MPL3115_DR_STATUS_TDR_MASK</a>   ((uint8_t) 0x02)</td></tr> 129<tr class="separator:abf359dcb24984479c64f2d58cbd49a1f"><td class="memSeparator" colspan="2"> </td></tr> 130<tr class="memitem:ae9f269a77a51de22da277c96dce5aad3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ae9f269a77a51de22da277c96dce5aad3">MPL3115_DR_STATUS_TDR_SHIFT</a>   ((uint8_t) 1)</td></tr> 131<tr class="separator:ae9f269a77a51de22da277c96dce5aad3"><td class="memSeparator" colspan="2"> </td></tr> 132<tr class="memitem:a005406500c3c97d56fd981a01ec15f7a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a005406500c3c97d56fd981a01ec15f7a">MPL3115_DR_STATUS_PDR_MASK</a>   ((uint8_t) 0x04)</td></tr> 133<tr class="separator:a005406500c3c97d56fd981a01ec15f7a"><td class="memSeparator" colspan="2"> </td></tr> 134<tr class="memitem:ab876c5246b97fc26245477edfd3ed460"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ab876c5246b97fc26245477edfd3ed460">MPL3115_DR_STATUS_PDR_SHIFT</a>   ((uint8_t) 2)</td></tr> 135<tr class="separator:ab876c5246b97fc26245477edfd3ed460"><td class="memSeparator" colspan="2"> </td></tr> 136<tr class="memitem:ad6c70d4b530705fd1ec9d00823fdd25c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ad6c70d4b530705fd1ec9d00823fdd25c">MPL3115_DR_STATUS_PTDR_MASK</a>   ((uint8_t) 0x08)</td></tr> 137<tr class="separator:ad6c70d4b530705fd1ec9d00823fdd25c"><td class="memSeparator" colspan="2"> </td></tr> 138<tr class="memitem:af55b4914358d5738f049d9dd115607b5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#af55b4914358d5738f049d9dd115607b5">MPL3115_DR_STATUS_PTDR_SHIFT</a>   ((uint8_t) 3)</td></tr> 139<tr class="separator:af55b4914358d5738f049d9dd115607b5"><td class="memSeparator" colspan="2"> </td></tr> 140<tr class="memitem:a08d58a6372f8a9b0bfa48939a8da5583"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a08d58a6372f8a9b0bfa48939a8da5583">MPL3115_DR_STATUS_TOW_MASK</a>   ((uint8_t) 0x20)</td></tr> 141<tr class="separator:a08d58a6372f8a9b0bfa48939a8da5583"><td class="memSeparator" colspan="2"> </td></tr> 142<tr class="memitem:a28a2b06a5f48393281e2137a2a1ec480"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a28a2b06a5f48393281e2137a2a1ec480">MPL3115_DR_STATUS_TOW_SHIFT</a>   ((uint8_t) 5)</td></tr> 143<tr class="separator:a28a2b06a5f48393281e2137a2a1ec480"><td class="memSeparator" colspan="2"> </td></tr> 144<tr class="memitem:afda65e12f4465bde4d8017b55365d750"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#afda65e12f4465bde4d8017b55365d750">MPL3115_DR_STATUS_POW_MASK</a>   ((uint8_t) 0x40)</td></tr> 145<tr class="separator:afda65e12f4465bde4d8017b55365d750"><td class="memSeparator" colspan="2"> </td></tr> 146<tr class="memitem:a1308d3135d1d0a1a91e175c26d81ef05"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a1308d3135d1d0a1a91e175c26d81ef05">MPL3115_DR_STATUS_POW_SHIFT</a>   ((uint8_t) 6)</td></tr> 147<tr class="separator:a1308d3135d1d0a1a91e175c26d81ef05"><td class="memSeparator" colspan="2"> </td></tr> 148<tr class="memitem:ae8d156077a19484139b0ea6ec0980121"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ae8d156077a19484139b0ea6ec0980121">MPL3115_DR_STATUS_PTOW_MASK</a>   ((uint8_t) 0x80)</td></tr> 149<tr class="separator:ae8d156077a19484139b0ea6ec0980121"><td class="memSeparator" colspan="2"> </td></tr> 150<tr class="memitem:a7e129f1c677c94d911e8eb5750002734"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a7e129f1c677c94d911e8eb5750002734">MPL3115_DR_STATUS_PTOW_SHIFT</a>   ((uint8_t) 7)</td></tr> 151<tr class="separator:a7e129f1c677c94d911e8eb5750002734"><td class="memSeparator" colspan="2"> </td></tr> 152<tr class="memitem:ac0f18512b61a6a019de923fee312cadf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ac0f18512b61a6a019de923fee312cadf">MPL3115_DR_STATUS_TDR_DRDY</a>   ((uint8_t) 0x02) /* Set to 1 whenever a Temperature data acquisition is */</td></tr> 153<tr class="separator:ac0f18512b61a6a019de923fee312cadf"><td class="memSeparator" colspan="2"> </td></tr> 154<tr class="memitem:a44baf12fd1c524de64cc09e325b3e275"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a44baf12fd1c524de64cc09e325b3e275">MPL3115_DR_STATUS_PDR_DRDY</a>   ((uint8_t) 0x04) /* Set to 1 whenever a new Pressure/Altitude data */</td></tr> 155<tr class="separator:a44baf12fd1c524de64cc09e325b3e275"><td class="memSeparator" colspan="2"> </td></tr> 156<tr class="memitem:a46a66f6385efb8b72a006adbf1ba2081"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a46a66f6385efb8b72a006adbf1ba2081">MPL3115_DR_STATUS_PTDR_DRDY</a>   ((uint8_t) 0x08) /* Signals that a new acquisition for either */</td></tr> 157<tr class="separator:a46a66f6385efb8b72a006adbf1ba2081"><td class="memSeparator" colspan="2"> </td></tr> 158<tr class="memitem:a381e6398c56307955a36ed51f011c7ea"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a381e6398c56307955a36ed51f011c7ea">MPL3115_DR_STATUS_TOW_OWR</a>   ((uint8_t) 0x20) /* Set to 1 whenever a new Temperature acquisition is */</td></tr> 159<tr class="separator:a381e6398c56307955a36ed51f011c7ea"><td class="memSeparator" colspan="2"> </td></tr> 160<tr class="memitem:a1cd6378e225c8a7c92898c9c1fbf2680"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a1cd6378e225c8a7c92898c9c1fbf2680">MPL3115_DR_STATUS_POW_OWR</a>   ((uint8_t) 0x40) /* Set to 1 whenever a new Pressure/Altitude */</td></tr> 161<tr class="separator:a1cd6378e225c8a7c92898c9c1fbf2680"><td class="memSeparator" colspan="2"> </td></tr> 162<tr class="memitem:a44be4c32feef15335fc6890ca309dbd0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a44be4c32feef15335fc6890ca309dbd0">MPL3115_DR_STATUS_PTOW_OWR</a>   ((uint8_t) 0x80) /* Set to 1 whenever new data is acquired before */</td></tr> 163<tr class="separator:a44be4c32feef15335fc6890ca309dbd0"><td class="memSeparator" colspan="2"> </td></tr> 164<tr class="memitem:a36de477d8322924f12ec1a6429b3c553"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a36de477d8322924f12ec1a6429b3c553">MPL3115_OUT_P_DELTA_LSB_PCD_MASK</a>   ((uint8_t) 0xF0)</td></tr> 165<tr class="separator:a36de477d8322924f12ec1a6429b3c553"><td class="memSeparator" colspan="2"> </td></tr> 166<tr class="memitem:aa44afc4bab12ed471306e4dfc35ad112"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aa44afc4bab12ed471306e4dfc35ad112">MPL3115_OUT_P_DELTA_LSB_PCD_SHIFT</a>   ((uint8_t) 4)</td></tr> 167<tr class="separator:aa44afc4bab12ed471306e4dfc35ad112"><td class="memSeparator" colspan="2"> </td></tr> 168<tr class="memitem:a72913cb6cb02de2cd3245229cf3cba95"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a72913cb6cb02de2cd3245229cf3cba95">MPL3115_OUT_T_DELTA_LSB_TCD_MASK</a>   ((uint8_t) 0xF0)</td></tr> 169<tr class="separator:a72913cb6cb02de2cd3245229cf3cba95"><td class="memSeparator" colspan="2"> </td></tr> 170<tr class="memitem:a5a495d98afcf98307753b9e4efea81b3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a5a495d98afcf98307753b9e4efea81b3">MPL3115_OUT_T_DELTA_LSB_TCD_SHIFT</a>   ((uint8_t) 4)</td></tr> 171<tr class="separator:a5a495d98afcf98307753b9e4efea81b3"><td class="memSeparator" colspan="2"> </td></tr> 172<tr class="memitem:a35919a3c4c82ad451a081b2f31396f81"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a35919a3c4c82ad451a081b2f31396f81">MPL3115_F_STATUS_F_CNT_MASK</a>   ((uint8_t) 0x3F)</td></tr> 173<tr class="separator:a35919a3c4c82ad451a081b2f31396f81"><td class="memSeparator" colspan="2"> </td></tr> 174<tr class="memitem:a08b37cfb37b3c0b4b3b3612ddb026a33"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a08b37cfb37b3c0b4b3b3612ddb026a33">MPL3115_F_STATUS_F_CNT_SHIFT</a>   ((uint8_t) 0)</td></tr> 175<tr class="separator:a08b37cfb37b3c0b4b3b3612ddb026a33"><td class="memSeparator" colspan="2"> </td></tr> 176<tr class="memitem:ac5479d3123a7d4e789d31b7a16b15783"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ac5479d3123a7d4e789d31b7a16b15783">MPL3115_F_STATUS_F_WMKF_FLAG_MASK</a>   ((uint8_t) 0x40)</td></tr> 177<tr class="separator:ac5479d3123a7d4e789d31b7a16b15783"><td class="memSeparator" colspan="2"> </td></tr> 178<tr class="memitem:aa92c371868b4713d08aa23da034a4636"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aa92c371868b4713d08aa23da034a4636">MPL3115_F_STATUS_F_WMKF_FLAG_SHIFT</a>   ((uint8_t) 6)</td></tr> 179<tr class="separator:aa92c371868b4713d08aa23da034a4636"><td class="memSeparator" colspan="2"> </td></tr> 180<tr class="memitem:a945d1022aa7962ba80308cab2af1bcf5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a945d1022aa7962ba80308cab2af1bcf5">MPL3115_F_STATUS_F_OVF_MASK</a>   ((uint8_t) 0x80)</td></tr> 181<tr class="separator:a945d1022aa7962ba80308cab2af1bcf5"><td class="memSeparator" colspan="2"> </td></tr> 182<tr class="memitem:aec8d95e0ca0be4e8c78e75f8895a7749"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aec8d95e0ca0be4e8c78e75f8895a7749">MPL3115_F_STATUS_F_OVF_SHIFT</a>   ((uint8_t) 7)</td></tr> 183<tr class="separator:aec8d95e0ca0be4e8c78e75f8895a7749"><td class="memSeparator" colspan="2"> </td></tr> 184<tr class="memitem:a94678b1f51547cacb0d80892a6dbb9da"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a94678b1f51547cacb0d80892a6dbb9da">MPL3115_F_STATUS_F_WMKF_FLAG_NOEVT</a>   ((uint8_t) 0x00) /* No FIFO watermark event detected. */</td></tr> 185<tr class="separator:a94678b1f51547cacb0d80892a6dbb9da"><td class="memSeparator" colspan="2"> </td></tr> 186<tr class="memitem:a7dc8bc72e5a0cea763eae697b84b5dbf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a7dc8bc72e5a0cea763eae697b84b5dbf">MPL3115_F_STATUS_F_WMKF_FLAG_EVTDET</a>   ((uint8_t) 0x40) /* FIFO Watermark event has been detected. */</td></tr> 187<tr class="separator:a7dc8bc72e5a0cea763eae697b84b5dbf"><td class="memSeparator" colspan="2"> </td></tr> 188<tr class="memitem:a2a2574341fee0bac266eef2bcaa0bd4d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a2a2574341fee0bac266eef2bcaa0bd4d">MPL3115_F_STATUS_F_OVF_NOOVFL</a>   ((uint8_t) 0x00) /* No FIFO overflow events detected. */</td></tr> 189<tr class="separator:a2a2574341fee0bac266eef2bcaa0bd4d"><td class="memSeparator" colspan="2"> </td></tr> 190<tr class="memitem:a818e0d4e7a7894985d00b1c17ef28716"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a818e0d4e7a7894985d00b1c17ef28716">MPL3115_F_STATUS_F_OVF_OVFLDET</a>   ((uint8_t) 0x80) /* FIFO Overflow event has been detected. */</td></tr> 191<tr class="separator:a818e0d4e7a7894985d00b1c17ef28716"><td class="memSeparator" colspan="2"> </td></tr> 192<tr class="memitem:a9c16fd3d1e5803476bf5fdde0d6beef8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a9c16fd3d1e5803476bf5fdde0d6beef8">MPL3115_F_SETUP_F_WMRK_MASK</a>   ((uint8_t) 0x3F)</td></tr> 193<tr class="separator:a9c16fd3d1e5803476bf5fdde0d6beef8"><td class="memSeparator" colspan="2"> </td></tr> 194<tr class="memitem:ad4418a7ce881169268ab78510d1cbd3f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ad4418a7ce881169268ab78510d1cbd3f">MPL3115_F_SETUP_F_WMRK_SHIFT</a>   ((uint8_t) 0)</td></tr> 195<tr class="separator:ad4418a7ce881169268ab78510d1cbd3f"><td class="memSeparator" colspan="2"> </td></tr> 196<tr class="memitem:a9841989c6cea0eb5a8dcc60b93a0931a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a9841989c6cea0eb5a8dcc60b93a0931a">MPL3115_F_SETUP_F_MODE_MASK</a>   ((uint8_t) 0xC0)</td></tr> 197<tr class="separator:a9841989c6cea0eb5a8dcc60b93a0931a"><td class="memSeparator" colspan="2"> </td></tr> 198<tr class="memitem:a8c0b36ac0e2f2bf37b75d209c7d36a7c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a8c0b36ac0e2f2bf37b75d209c7d36a7c">MPL3115_F_SETUP_F_MODE_SHIFT</a>   ((uint8_t) 6)</td></tr> 199<tr class="separator:a8c0b36ac0e2f2bf37b75d209c7d36a7c"><td class="memSeparator" colspan="2"> </td></tr> 200<tr class="memitem:acc8cfcddad4d4a31f9e5ad1bbecc14c5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#acc8cfcddad4d4a31f9e5ad1bbecc14c5">MPL3115_F_SETUP_F_MODE_FIFO_OFF</a>   ((uint8_t) 0x00) /* FIFO is disabled. */</td></tr> 201<tr class="separator:acc8cfcddad4d4a31f9e5ad1bbecc14c5"><td class="memSeparator" colspan="2"> </td></tr> 202<tr class="memitem:a21baf2bf8ce6c22805bdb0f7294991a7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a21baf2bf8ce6c22805bdb0f7294991a7">MPL3115_F_SETUP_F_MODE_CIR_MODE</a>   ((uint8_t) 0x40) /* FIFO contains the most recent samples when overflowed */</td></tr> 203<tr class="separator:a21baf2bf8ce6c22805bdb0f7294991a7"><td class="memSeparator" colspan="2"> </td></tr> 204<tr class="memitem:ae4345c3fb1e9179fd784e3f46065c5ce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ae4345c3fb1e9179fd784e3f46065c5ce">MPL3115_F_SETUP_F_MODE_STOP_MODE</a>   ((uint8_t) 0x80) /* FIFO stops accepting new samples when overflowed. */</td></tr> 205<tr class="separator:ae4345c3fb1e9179fd784e3f46065c5ce"><td class="memSeparator" colspan="2"> </td></tr> 206<tr class="memitem:a5fd68b02f8f9e4fdefb2ad13e3c0dbc3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a5fd68b02f8f9e4fdefb2ad13e3c0dbc3">MPL3115_SYSMOD_SYSMOD_MASK</a>   ((uint8_t) 0x01)</td></tr> 207<tr class="separator:a5fd68b02f8f9e4fdefb2ad13e3c0dbc3"><td class="memSeparator" colspan="2"> </td></tr> 208<tr class="memitem:aa920b97a0dbd8a3fc3b0bce2b0f12155"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aa920b97a0dbd8a3fc3b0bce2b0f12155">MPL3115_SYSMOD_SYSMOD_SHIFT</a>   ((uint8_t) 0)</td></tr> 209<tr class="separator:aa920b97a0dbd8a3fc3b0bce2b0f12155"><td class="memSeparator" colspan="2"> </td></tr> 210<tr class="memitem:a1c515fd5032c7ba14aa644d5c290964d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a1c515fd5032c7ba14aa644d5c290964d">MPL3115_SYSMOD_SYSMOD_STANDBY</a>   ((uint8_t) 0x00) /* STANDBY Mode. */</td></tr> 211<tr class="separator:a1c515fd5032c7ba14aa644d5c290964d"><td class="memSeparator" colspan="2"> </td></tr> 212<tr class="memitem:a60699b0f17c03b3d6fc8c52c3bb34866"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a60699b0f17c03b3d6fc8c52c3bb34866">MPL3115_SYSMOD_SYSMOD_ACTIVE</a>   ((uint8_t) 0x01) /* ACTIVE Mode. */</td></tr> 213<tr class="separator:a60699b0f17c03b3d6fc8c52c3bb34866"><td class="memSeparator" colspan="2"> </td></tr> 214<tr class="memitem:a1fd29ded0804aebb878a5f1359859827"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a1fd29ded0804aebb878a5f1359859827">MPL3115_INT_SOURCE_SRC_TCHG_MASK</a>   ((uint8_t) 0x01)</td></tr> 215<tr class="separator:a1fd29ded0804aebb878a5f1359859827"><td class="memSeparator" colspan="2"> </td></tr> 216<tr class="memitem:adbf9dc78d3850bb355f63c0987794cab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#adbf9dc78d3850bb355f63c0987794cab">MPL3115_INT_SOURCE_SRC_TCHG_SHIFT</a>   ((uint8_t) 0)</td></tr> 217<tr class="separator:adbf9dc78d3850bb355f63c0987794cab"><td class="memSeparator" colspan="2"> </td></tr> 218<tr class="memitem:a9a749a54b9cce7b08a30b877e7d24a18"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a9a749a54b9cce7b08a30b877e7d24a18">MPL3115_INT_SOURCE_SRC_PCHG_MASK</a>   ((uint8_t) 0x02)</td></tr> 219<tr class="separator:a9a749a54b9cce7b08a30b877e7d24a18"><td class="memSeparator" colspan="2"> </td></tr> 220<tr class="memitem:ac0463528b8c81029d1df0c62a451467e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ac0463528b8c81029d1df0c62a451467e">MPL3115_INT_SOURCE_SRC_PCHG_SHIFT</a>   ((uint8_t) 1)</td></tr> 221<tr class="separator:ac0463528b8c81029d1df0c62a451467e"><td class="memSeparator" colspan="2"> </td></tr> 222<tr class="memitem:a6e9d00eee8b14a02059db7799e2219fd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a6e9d00eee8b14a02059db7799e2219fd">MPL3115_INT_SOURCE_SRC_TTH_MASK</a>   ((uint8_t) 0x04)</td></tr> 223<tr class="separator:a6e9d00eee8b14a02059db7799e2219fd"><td class="memSeparator" colspan="2"> </td></tr> 224<tr class="memitem:a01577879ce9a1f7e3eab92104b357e79"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a01577879ce9a1f7e3eab92104b357e79">MPL3115_INT_SOURCE_SRC_TTH_SHIFT</a>   ((uint8_t) 2)</td></tr> 225<tr class="separator:a01577879ce9a1f7e3eab92104b357e79"><td class="memSeparator" colspan="2"> </td></tr> 226<tr class="memitem:ada4f27ffc2857351a14229b801f4b607"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ada4f27ffc2857351a14229b801f4b607">MPL3115_INT_SOURCE_SRC_PTH_MASK</a>   ((uint8_t) 0x08)</td></tr> 227<tr class="separator:ada4f27ffc2857351a14229b801f4b607"><td class="memSeparator" colspan="2"> </td></tr> 228<tr class="memitem:a9fe746bf63da432c43a5960ccab9878c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a9fe746bf63da432c43a5960ccab9878c">MPL3115_INT_SOURCE_SRC_PTH_SHIFT</a>   ((uint8_t) 3)</td></tr> 229<tr class="separator:a9fe746bf63da432c43a5960ccab9878c"><td class="memSeparator" colspan="2"> </td></tr> 230<tr class="memitem:ac37ec3ad0957634fbf9e18f78b0ec729"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ac37ec3ad0957634fbf9e18f78b0ec729">MPL3115_INT_SOURCE_SRC_TW_MASK</a>   ((uint8_t) 0x10)</td></tr> 231<tr class="separator:ac37ec3ad0957634fbf9e18f78b0ec729"><td class="memSeparator" colspan="2"> </td></tr> 232<tr class="memitem:a5427d943e81ad25883b95c195f8fdcf6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a5427d943e81ad25883b95c195f8fdcf6">MPL3115_INT_SOURCE_SRC_TW_SHIFT</a>   ((uint8_t) 4)</td></tr> 233<tr class="separator:a5427d943e81ad25883b95c195f8fdcf6"><td class="memSeparator" colspan="2"> </td></tr> 234<tr class="memitem:a1a3546568bde601f9cfc66276c01401a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a1a3546568bde601f9cfc66276c01401a">MPL3115_INT_SOURCE_SRC_PW_MASK</a>   ((uint8_t) 0x20)</td></tr> 235<tr class="separator:a1a3546568bde601f9cfc66276c01401a"><td class="memSeparator" colspan="2"> </td></tr> 236<tr class="memitem:a6fcf0b38ad99813b601c25f81e5dfdcf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a6fcf0b38ad99813b601c25f81e5dfdcf">MPL3115_INT_SOURCE_SRC_PW_SHIFT</a>   ((uint8_t) 5)</td></tr> 237<tr class="separator:a6fcf0b38ad99813b601c25f81e5dfdcf"><td class="memSeparator" colspan="2"> </td></tr> 238<tr class="memitem:af374af318b693c43c45d32de142c3624"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#af374af318b693c43c45d32de142c3624">MPL3115_INT_SOURCE_SRC_FIFO_MASK</a>   ((uint8_t) 0x40)</td></tr> 239<tr class="separator:af374af318b693c43c45d32de142c3624"><td class="memSeparator" colspan="2"> </td></tr> 240<tr class="memitem:a73169156c84ffe283a7008759382506f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a73169156c84ffe283a7008759382506f">MPL3115_INT_SOURCE_SRC_FIFO_SHIFT</a>   ((uint8_t) 6)</td></tr> 241<tr class="separator:a73169156c84ffe283a7008759382506f"><td class="memSeparator" colspan="2"> </td></tr> 242<tr class="memitem:ad4a7acc5f07466676936f0896dc0c4f3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ad4a7acc5f07466676936f0896dc0c4f3">MPL3115_INT_SOURCE_SRC_DRDY_MASK</a>   ((uint8_t) 0x80)</td></tr> 243<tr class="separator:ad4a7acc5f07466676936f0896dc0c4f3"><td class="memSeparator" colspan="2"> </td></tr> 244<tr class="memitem:a7908b859e4eb6e22f978d0e318baef5d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a7908b859e4eb6e22f978d0e318baef5d">MPL3115_INT_SOURCE_SRC_DRDY_SHIFT</a>   ((uint8_t) 7)</td></tr> 245<tr class="separator:a7908b859e4eb6e22f978d0e318baef5d"><td class="memSeparator" colspan="2"> </td></tr> 246<tr class="memitem:ae14b3c6e1aaf975b888235b46e15168b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ae14b3c6e1aaf975b888235b46e15168b">MPL3115_PT_DATA_CFG_TDEFE_MASK</a>   ((uint8_t) 0x01)</td></tr> 247<tr class="separator:ae14b3c6e1aaf975b888235b46e15168b"><td class="memSeparator" colspan="2"> </td></tr> 248<tr class="memitem:a17a416c9b288e5278123b84d5184adb5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a17a416c9b288e5278123b84d5184adb5">MPL3115_PT_DATA_CFG_TDEFE_SHIFT</a>   ((uint8_t) 0)</td></tr> 249<tr class="separator:a17a416c9b288e5278123b84d5184adb5"><td class="memSeparator" colspan="2"> </td></tr> 250<tr class="memitem:ab050ad8ca1cbe1b14e3377debeac377f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ab050ad8ca1cbe1b14e3377debeac377f">MPL3115_PT_DATA_CFG_PDEFE_MASK</a>   ((uint8_t) 0x02)</td></tr> 251<tr class="separator:ab050ad8ca1cbe1b14e3377debeac377f"><td class="memSeparator" colspan="2"> </td></tr> 252<tr class="memitem:a043b82d706ace97f37703d057c7a0e35"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a043b82d706ace97f37703d057c7a0e35">MPL3115_PT_DATA_CFG_PDEFE_SHIFT</a>   ((uint8_t) 1)</td></tr> 253<tr class="separator:a043b82d706ace97f37703d057c7a0e35"><td class="memSeparator" colspan="2"> </td></tr> 254<tr class="memitem:a5bc785b6960d05c17b641834f09f616f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a5bc785b6960d05c17b641834f09f616f">MPL3115_PT_DATA_CFG_DREM_MASK</a>   ((uint8_t) 0x04)</td></tr> 255<tr class="separator:a5bc785b6960d05c17b641834f09f616f"><td class="memSeparator" colspan="2"> </td></tr> 256<tr class="memitem:a928d2536eeda6849e1e36ff7310aab15"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a928d2536eeda6849e1e36ff7310aab15">MPL3115_PT_DATA_CFG_DREM_SHIFT</a>   ((uint8_t) 2)</td></tr> 257<tr class="separator:a928d2536eeda6849e1e36ff7310aab15"><td class="memSeparator" colspan="2"> </td></tr> 258<tr class="memitem:affc22457d15d0c09ed4557dc5dcabbd0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#affc22457d15d0c09ed4557dc5dcabbd0">MPL3115_PT_DATA_CFG_TDEFE_DISABLED</a>   ((uint8_t) 0x00) /* Event detection disabled. */</td></tr> 259<tr class="separator:affc22457d15d0c09ed4557dc5dcabbd0"><td class="memSeparator" colspan="2"> </td></tr> 260<tr class="memitem:aed81fbf7d01fa3d81821e8c67b291a11"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aed81fbf7d01fa3d81821e8c67b291a11">MPL3115_PT_DATA_CFG_TDEFE_ENABLED</a>   ((uint8_t) 0x01) /* Event detection enabled. Raise event flag on new */</td></tr> 261<tr class="separator:aed81fbf7d01fa3d81821e8c67b291a11"><td class="memSeparator" colspan="2"> </td></tr> 262<tr class="memitem:a581b97d7fa33083a169eb712d7b4f59c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a581b97d7fa33083a169eb712d7b4f59c">MPL3115_PT_DATA_CFG_PDEFE_DISABLED</a>   ((uint8_t) 0x00) /* Event detection disabled. */</td></tr> 263<tr class="separator:a581b97d7fa33083a169eb712d7b4f59c"><td class="memSeparator" colspan="2"> </td></tr> 264<tr class="memitem:a99c6f6abfc2e5a3572c8f67d410daeb8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a99c6f6abfc2e5a3572c8f67d410daeb8">MPL3115_PT_DATA_CFG_PDEFE_ENABLED</a>   ((uint8_t) 0x02) /* Event detection enabled. Raise event flag on new */</td></tr> 265<tr class="separator:a99c6f6abfc2e5a3572c8f67d410daeb8"><td class="memSeparator" colspan="2"> </td></tr> 266<tr class="memitem:a966ce529b34012c716d889815098acab"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a966ce529b34012c716d889815098acab">MPL3115_PT_DATA_CFG_DREM_DISABLED</a>   ((uint8_t) 0x00) /* Event detection disabled. */</td></tr> 267<tr class="separator:a966ce529b34012c716d889815098acab"><td class="memSeparator" colspan="2"> </td></tr> 268<tr class="memitem:a0445fe6ad3db50f7c88f12c8294ad56f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a0445fe6ad3db50f7c88f12c8294ad56f">MPL3115_PT_DATA_CFG_DREM_ENABLED</a>   ((uint8_t) 0x04) /* Event detection enabled. Generate data ready */</td></tr> 269<tr class="separator:a0445fe6ad3db50f7c88f12c8294ad56f"><td class="memSeparator" colspan="2"> </td></tr> 270<tr class="memitem:ad51169475e83b1d075d6c8888cf84f24"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ad51169475e83b1d075d6c8888cf84f24">MPL3115_P_MIN_LSB_MINPAD_MASK</a>   ((uint8_t) 0xF0)</td></tr> 271<tr class="separator:ad51169475e83b1d075d6c8888cf84f24"><td class="memSeparator" colspan="2"> </td></tr> 272<tr class="memitem:a9955169eb370e07f52f415d8fa8836b7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a9955169eb370e07f52f415d8fa8836b7">MPL3115_P_MIN_LSB_MINPAD_SHIFT</a>   ((uint8_t) 4)</td></tr> 273<tr class="separator:a9955169eb370e07f52f415d8fa8836b7"><td class="memSeparator" colspan="2"> </td></tr> 274<tr class="memitem:af31fe2ce2f1ec81d9896b9b7f317904d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#af31fe2ce2f1ec81d9896b9b7f317904d">MPL3115_T_MIN_LSB_MINTD_MASK</a>   ((uint8_t) 0xF0)</td></tr> 275<tr class="separator:af31fe2ce2f1ec81d9896b9b7f317904d"><td class="memSeparator" colspan="2"> </td></tr> 276<tr class="memitem:ad87d79d47981c22bc7176362d24770e5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ad87d79d47981c22bc7176362d24770e5">MPL3115_T_MIN_LSB_MINTD_SHIFT</a>   ((uint8_t) 4)</td></tr> 277<tr class="separator:ad87d79d47981c22bc7176362d24770e5"><td class="memSeparator" colspan="2"> </td></tr> 278<tr class="memitem:ace4b5c17eeb5218d623ceb7bd89e99de"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ace4b5c17eeb5218d623ceb7bd89e99de">MPL3115_P_MAX_LSB_MAXPAD_MASK</a>   ((uint8_t) 0xF0)</td></tr> 279<tr class="separator:ace4b5c17eeb5218d623ceb7bd89e99de"><td class="memSeparator" colspan="2"> </td></tr> 280<tr class="memitem:aae7eef92a016d9d075ce45bbe7652de8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aae7eef92a016d9d075ce45bbe7652de8">MPL3115_P_MAX_LSB_MAXPAD_SHIFT</a>   ((uint8_t) 4)</td></tr> 281<tr class="separator:aae7eef92a016d9d075ce45bbe7652de8"><td class="memSeparator" colspan="2"> </td></tr> 282<tr class="memitem:a6e16984ded1ca5e7ba2ddbd288faad1d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a6e16984ded1ca5e7ba2ddbd288faad1d">MPL3115_T_MAX_LSB_MAXTD_MASK</a>   ((uint8_t) 0xF0)</td></tr> 283<tr class="separator:a6e16984ded1ca5e7ba2ddbd288faad1d"><td class="memSeparator" colspan="2"> </td></tr> 284<tr class="memitem:aa784ee12136024d741fce81696497afb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aa784ee12136024d741fce81696497afb">MPL3115_T_MAX_LSB_MAXTD_SHIFT</a>   ((uint8_t) 4)</td></tr> 285<tr class="separator:aa784ee12136024d741fce81696497afb"><td class="memSeparator" colspan="2"> </td></tr> 286<tr class="memitem:a94dea01c807e1932cd7f86cbf6dcb0c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a94dea01c807e1932cd7f86cbf6dcb0c4">MPL3115_CTRL_REG1_SBYB_MASK</a>   ((uint8_t) 0x01)</td></tr> 287<tr class="separator:a94dea01c807e1932cd7f86cbf6dcb0c4"><td class="memSeparator" colspan="2"> </td></tr> 288<tr class="memitem:aac7c3008606d73301718467ec2f2b0b9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aac7c3008606d73301718467ec2f2b0b9">MPL3115_CTRL_REG1_SBYB_SHIFT</a>   ((uint8_t) 0)</td></tr> 289<tr class="separator:aac7c3008606d73301718467ec2f2b0b9"><td class="memSeparator" colspan="2"> </td></tr> 290<tr class="memitem:ac6679c4b648df6b80727094040169499"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ac6679c4b648df6b80727094040169499">MPL3115_CTRL_REG1_OST_MASK</a>   ((uint8_t) 0x02)</td></tr> 291<tr class="separator:ac6679c4b648df6b80727094040169499"><td class="memSeparator" colspan="2"> </td></tr> 292<tr class="memitem:a31c71240e57ccaf452e247995531bb34"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a31c71240e57ccaf452e247995531bb34">MPL3115_CTRL_REG1_OST_SHIFT</a>   ((uint8_t) 1)</td></tr> 293<tr class="separator:a31c71240e57ccaf452e247995531bb34"><td class="memSeparator" colspan="2"> </td></tr> 294<tr class="memitem:ad75b6c4c4c0d67399b37c3724f3bf59a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ad75b6c4c4c0d67399b37c3724f3bf59a">MPL3115_CTRL_REG1_RST_MASK</a>   ((uint8_t) 0x04)</td></tr> 295<tr class="separator:ad75b6c4c4c0d67399b37c3724f3bf59a"><td class="memSeparator" colspan="2"> </td></tr> 296<tr class="memitem:aba3e7d6f1be4a3942a15fee9987c90a2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aba3e7d6f1be4a3942a15fee9987c90a2">MPL3115_CTRL_REG1_RST_SHIFT</a>   ((uint8_t) 2)</td></tr> 297<tr class="separator:aba3e7d6f1be4a3942a15fee9987c90a2"><td class="memSeparator" colspan="2"> </td></tr> 298<tr class="memitem:a7c79d49c0e6d885233e0cc7614d27b79"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a7c79d49c0e6d885233e0cc7614d27b79">MPL3115_CTRL_REG1_OS_MASK</a>   ((uint8_t) 0x38)</td></tr> 299<tr class="separator:a7c79d49c0e6d885233e0cc7614d27b79"><td class="memSeparator" colspan="2"> </td></tr> 300<tr class="memitem:ad9cfb7c748148dbf5538ccd5954785f9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ad9cfb7c748148dbf5538ccd5954785f9">MPL3115_CTRL_REG1_OS_SHIFT</a>   ((uint8_t) 3)</td></tr> 301<tr class="separator:ad9cfb7c748148dbf5538ccd5954785f9"><td class="memSeparator" colspan="2"> </td></tr> 302<tr class="memitem:a84a8191355b0e173d58e8a326af87ccf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a84a8191355b0e173d58e8a326af87ccf">MPL3115_CTRL_REG1_RAW_MASK</a>   ((uint8_t) 0x40)</td></tr> 303<tr class="separator:a84a8191355b0e173d58e8a326af87ccf"><td class="memSeparator" colspan="2"> </td></tr> 304<tr class="memitem:a099bb88b3801182e2f9d358690b49ad6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a099bb88b3801182e2f9d358690b49ad6">MPL3115_CTRL_REG1_RAW_SHIFT</a>   ((uint8_t) 6)</td></tr> 305<tr class="separator:a099bb88b3801182e2f9d358690b49ad6"><td class="memSeparator" colspan="2"> </td></tr> 306<tr class="memitem:a22459cf5c7fd4f97fc9e92c45f01b74b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a22459cf5c7fd4f97fc9e92c45f01b74b">MPL3115_CTRL_REG1_ALT_MASK</a>   ((uint8_t) 0x80)</td></tr> 307<tr class="separator:a22459cf5c7fd4f97fc9e92c45f01b74b"><td class="memSeparator" colspan="2"> </td></tr> 308<tr class="memitem:ac392a66703be27aabb15366d4d26029c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ac392a66703be27aabb15366d4d26029c">MPL3115_CTRL_REG1_ALT_SHIFT</a>   ((uint8_t) 7)</td></tr> 309<tr class="separator:ac392a66703be27aabb15366d4d26029c"><td class="memSeparator" colspan="2"> </td></tr> 310<tr class="memitem:a8e2be127e273914b26a33e8447586c73"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a8e2be127e273914b26a33e8447586c73">MPL3115_CTRL_REG1_SBYB_STANDBY</a>   ((uint8_t) 0x00) /* Standby Mode. */</td></tr> 311<tr class="separator:a8e2be127e273914b26a33e8447586c73"><td class="memSeparator" colspan="2"> </td></tr> 312<tr class="memitem:a70ee6ecf0544a29f4f0367d45b1dd6cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a70ee6ecf0544a29f4f0367d45b1dd6cd">MPL3115_CTRL_REG1_SBYB_ACTIVE</a>   ((uint8_t) 0x01) /* Active Mode. */</td></tr> 313<tr class="separator:a70ee6ecf0544a29f4f0367d45b1dd6cd"><td class="memSeparator" colspan="2"> </td></tr> 314<tr class="memitem:ad06b58cc7c08b26074e42acd990836eb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ad06b58cc7c08b26074e42acd990836eb">MPL3115_CTRL_REG1_OST_RESET</a>   ((uint8_t) 0x00) /* Reset OST Bit. */</td></tr> 315<tr class="separator:ad06b58cc7c08b26074e42acd990836eb"><td class="memSeparator" colspan="2"> </td></tr> 316<tr class="memitem:ae7779443a088a9a6a089224d9a6889fd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ae7779443a088a9a6a089224d9a6889fd">MPL3115_CTRL_REG1_OST_SET</a>   ((uint8_t) 0x02) /* SET OST Bit. */</td></tr> 317<tr class="separator:ae7779443a088a9a6a089224d9a6889fd"><td class="memSeparator" colspan="2"> </td></tr> 318<tr class="memitem:a6c024552174c3fb36077da2397d64b24"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a6c024552174c3fb36077da2397d64b24">MPL3115_CTRL_REG1_RST_DIS</a>   ((uint8_t) 0x00) /* Device reset disabled. */</td></tr> 319<tr class="separator:a6c024552174c3fb36077da2397d64b24"><td class="memSeparator" colspan="2"> </td></tr> 320<tr class="memitem:a99a5a1889ee2537b4006d8ca17b74449"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a99a5a1889ee2537b4006d8ca17b74449">MPL3115_CTRL_REG1_RST_EN</a>   ((uint8_t) 0x04) /* Device reset enabled. */</td></tr> 321<tr class="separator:a99a5a1889ee2537b4006d8ca17b74449"><td class="memSeparator" colspan="2"> </td></tr> 322<tr class="memitem:a68dffaaa33a2dd4e1e8dc9a7a88bbdf0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a68dffaaa33a2dd4e1e8dc9a7a88bbdf0">MPL3115_CTRL_REG1_OS_OSR_1</a>   ((uint8_t) 0x00) /* OSR = 1 and Minimum Time Between Data Samples 6 ms */</td></tr> 323<tr class="separator:a68dffaaa33a2dd4e1e8dc9a7a88bbdf0"><td class="memSeparator" colspan="2"> </td></tr> 324<tr class="memitem:ac56bc424e9d0ed7074cc98aeae329d6b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ac56bc424e9d0ed7074cc98aeae329d6b">MPL3115_CTRL_REG1_OS_OSR_2</a>   ((uint8_t) 0x08) /* OSR = 2 and Minimum Time Between Data Samples 10 ms */</td></tr> 325<tr class="separator:ac56bc424e9d0ed7074cc98aeae329d6b"><td class="memSeparator" colspan="2"> </td></tr> 326<tr class="memitem:a45d712c8dcafec42667b52768d319cdc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a45d712c8dcafec42667b52768d319cdc">MPL3115_CTRL_REG1_OS_OSR_4</a>   ((uint8_t) 0x10) /* OSR = 4 and Minimum Time Between Data Samples 18 ms */</td></tr> 327<tr class="separator:a45d712c8dcafec42667b52768d319cdc"><td class="memSeparator" colspan="2"> </td></tr> 328<tr class="memitem:a20b0a90aa855e98552f75b51e94e0c80"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a20b0a90aa855e98552f75b51e94e0c80">MPL3115_CTRL_REG1_OS_OSR_8</a>   ((uint8_t) 0x18) /* OSR = 8 and Minimum Time Between Data Samples 34 ms */</td></tr> 329<tr class="separator:a20b0a90aa855e98552f75b51e94e0c80"><td class="memSeparator" colspan="2"> </td></tr> 330<tr class="memitem:aad2ac45a77e17ab64eec41e296b9ae91"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aad2ac45a77e17ab64eec41e296b9ae91">MPL3115_CTRL_REG1_OS_OSR_16</a>   ((uint8_t) 0x20) /* OSR = 16 and Minimum Time Between Data Samples 66 */</td></tr> 331<tr class="separator:aad2ac45a77e17ab64eec41e296b9ae91"><td class="memSeparator" colspan="2"> </td></tr> 332<tr class="memitem:a5b865467b3cf8946d1c0f4006a80834d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a5b865467b3cf8946d1c0f4006a80834d">MPL3115_CTRL_REG1_OS_OSR_32</a>   ((uint8_t) 0x28) /* OSR = 32 and Minimum Time Between Data Samples 130 */</td></tr> 333<tr class="separator:a5b865467b3cf8946d1c0f4006a80834d"><td class="memSeparator" colspan="2"> </td></tr> 334<tr class="memitem:a2b40307b7830bbe10f810748476625c4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a2b40307b7830bbe10f810748476625c4">MPL3115_CTRL_REG1_OS_OSR_64</a>   ((uint8_t) 0x30) /* OSR = 64 and Minimum Time Between Data Samples 258 */</td></tr> 335<tr class="separator:a2b40307b7830bbe10f810748476625c4"><td class="memSeparator" colspan="2"> </td></tr> 336<tr class="memitem:a2dacb3fad8f0ff3cf52ca713e21aa504"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a2dacb3fad8f0ff3cf52ca713e21aa504">MPL3115_CTRL_REG1_OS_OSR_128</a>   ((uint8_t) 0x38) /* OSR = 128 and Minimum Time Between Data Samples 512 */</td></tr> 337<tr class="separator:a2dacb3fad8f0ff3cf52ca713e21aa504"><td class="memSeparator" colspan="2"> </td></tr> 338<tr class="memitem:acd62dea6edfa98d1480b9e58dbd164e8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#acd62dea6edfa98d1480b9e58dbd164e8">MPL3115_CTRL_REG1_RAW_DIS</a>   ((uint8_t) 0x00) /* Raw output disabled. */</td></tr> 339<tr class="separator:acd62dea6edfa98d1480b9e58dbd164e8"><td class="memSeparator" colspan="2"> </td></tr> 340<tr class="memitem:a5663f20ea832dd3d16e9322f3450d021"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a5663f20ea832dd3d16e9322f3450d021">MPL3115_CTRL_REG1_RAW_EN</a>   ((uint8_t) 0x40) /* Raw output enabled. */</td></tr> 341<tr class="separator:a5663f20ea832dd3d16e9322f3450d021"><td class="memSeparator" colspan="2"> </td></tr> 342<tr class="memitem:a3f2f4a1b85b89cb6e33d847a619906a7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a3f2f4a1b85b89cb6e33d847a619906a7">MPL3115_CTRL_REG1_ALT_ALT</a>   ((uint8_t) 0x80) /* Altimeter Mode. */</td></tr> 343<tr class="separator:a3f2f4a1b85b89cb6e33d847a619906a7"><td class="memSeparator" colspan="2"> </td></tr> 344<tr class="memitem:ab80e8752c821211241d79b98f39c2fcc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ab80e8752c821211241d79b98f39c2fcc">MPL3115_CTRL_REG1_ALT_BAR</a>   ((uint8_t) 0x00) /* Barometer Mode. */</td></tr> 345<tr class="separator:ab80e8752c821211241d79b98f39c2fcc"><td class="memSeparator" colspan="2"> </td></tr> 346<tr class="memitem:ac28df118faf0fe967f92fb3a67cc5770"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ac28df118faf0fe967f92fb3a67cc5770">MPL3115_CTRL_REG2_ST_MASK</a>   ((uint8_t) 0x0F)</td></tr> 347<tr class="separator:ac28df118faf0fe967f92fb3a67cc5770"><td class="memSeparator" colspan="2"> </td></tr> 348<tr class="memitem:a3f041ad8b3d9850002dbdea3fc082e41"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a3f041ad8b3d9850002dbdea3fc082e41">MPL3115_CTRL_REG2_ST_SHIFT</a>   ((uint8_t) 0)</td></tr> 349<tr class="separator:a3f041ad8b3d9850002dbdea3fc082e41"><td class="memSeparator" colspan="2"> </td></tr> 350<tr class="memitem:aa5d6e93837f55d38f5ae7ee2ca0ee2e1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aa5d6e93837f55d38f5ae7ee2ca0ee2e1">MPL3115_CTRL_REG2_ALARM_SEL_MASK</a>   ((uint8_t) 0x10)</td></tr> 351<tr class="separator:aa5d6e93837f55d38f5ae7ee2ca0ee2e1"><td class="memSeparator" colspan="2"> </td></tr> 352<tr class="memitem:a4889017be5dfe52c6c54f9a8688b107d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a4889017be5dfe52c6c54f9a8688b107d">MPL3115_CTRL_REG2_ALARM_SEL_SHIFT</a>   ((uint8_t) 4)</td></tr> 353<tr class="separator:a4889017be5dfe52c6c54f9a8688b107d"><td class="memSeparator" colspan="2"> </td></tr> 354<tr class="memitem:a36aa1a593328653441d9d653e5e04340"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a36aa1a593328653441d9d653e5e04340">MPL3115_CTRL_REG2_LOAD_OUTPUT_MASK</a>   ((uint8_t) 0x20)</td></tr> 355<tr class="separator:a36aa1a593328653441d9d653e5e04340"><td class="memSeparator" colspan="2"> </td></tr> 356<tr class="memitem:a04536602bd3a5c9dbf376d5b2bc4ae12"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a04536602bd3a5c9dbf376d5b2bc4ae12">MPL3115_CTRL_REG2_LOAD_OUTPUT_SHIFT</a>   ((uint8_t) 5)</td></tr> 357<tr class="separator:a04536602bd3a5c9dbf376d5b2bc4ae12"><td class="memSeparator" colspan="2"> </td></tr> 358<tr class="memitem:a9a3d4ea5db311061cf8cb71862b3dfff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a9a3d4ea5db311061cf8cb71862b3dfff">MPL3115_CTRL_REG2_ALARM_SEL_USE_TGT</a>   ((uint8_t) 0x00) /* The values in P_TGT_MSB, P_TGT_LSB and T_TGT are */</td></tr> 359<tr class="separator:a9a3d4ea5db311061cf8cb71862b3dfff"><td class="memSeparator" colspan="2"> </td></tr> 360<tr class="memitem:a09e2b41eff7e3bbdd2ed9e5b9dee6fd4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a09e2b41eff7e3bbdd2ed9e5b9dee6fd4">MPL3115_CTRL_REG2_ALARM_SEL_USE_OUT</a>   ((uint8_t) 0x10) /* The values in OUT_P/OUT_T are used for calculating */</td></tr> 361<tr class="separator:a09e2b41eff7e3bbdd2ed9e5b9dee6fd4"><td class="memSeparator" colspan="2"> </td></tr> 362<tr class="memitem:a85dff2bbde39992cb5515d43b4b1d37e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a85dff2bbde39992cb5515d43b4b1d37e">MPL3115_CTRL_REG2_LOAD_OUTPUT_DNL</a>   ((uint8_t) 0x00) /* Do not load OUT_P/OUT_T as target values. */</td></tr> 363<tr class="separator:a85dff2bbde39992cb5515d43b4b1d37e"><td class="memSeparator" colspan="2"> </td></tr> 364<tr class="memitem:a478ae73b0dbf47d441023466588ea42b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a478ae73b0dbf47d441023466588ea42b">MPL3115_CTRL_REG2_LOAD_OUTPUT_NXT_VAL</a>   ((uint8_t) 0x20) /* The next values of OUT_P/OUT_T are used to set the */</td></tr> 365<tr class="separator:a478ae73b0dbf47d441023466588ea42b"><td class="memSeparator" colspan="2"> </td></tr> 366<tr class="memitem:a5d23c6542bc024d473fea4db2a096825"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a5d23c6542bc024d473fea4db2a096825">MPL3115_CTRL_REG3_PP_OD2_MASK</a>   ((uint8_t) 0x01)</td></tr> 367<tr class="separator:a5d23c6542bc024d473fea4db2a096825"><td class="memSeparator" colspan="2"> </td></tr> 368<tr class="memitem:a414d818752de47b55726dbdb7d6cc750"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a414d818752de47b55726dbdb7d6cc750">MPL3115_CTRL_REG3_PP_OD2_SHIFT</a>   ((uint8_t) 0)</td></tr> 369<tr class="separator:a414d818752de47b55726dbdb7d6cc750"><td class="memSeparator" colspan="2"> </td></tr> 370<tr class="memitem:ab136feb305e2c502ffbf809ccbd76624"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ab136feb305e2c502ffbf809ccbd76624">MPL3115_CTRL_REG3_IPOL2_MASK</a>   ((uint8_t) 0x02)</td></tr> 371<tr class="separator:ab136feb305e2c502ffbf809ccbd76624"><td class="memSeparator" colspan="2"> </td></tr> 372<tr class="memitem:ac7ca0f927496474dd4d18111399ab0ec"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ac7ca0f927496474dd4d18111399ab0ec">MPL3115_CTRL_REG3_IPOL2_SHIFT</a>   ((uint8_t) 1)</td></tr> 373<tr class="separator:ac7ca0f927496474dd4d18111399ab0ec"><td class="memSeparator" colspan="2"> </td></tr> 374<tr class="memitem:a8bca48cb65f20cede39710be553a7a5f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a8bca48cb65f20cede39710be553a7a5f">MPL3115_CTRL_REG3_PP_OD1_MASK</a>   ((uint8_t) 0x10)</td></tr> 375<tr class="separator:a8bca48cb65f20cede39710be553a7a5f"><td class="memSeparator" colspan="2"> </td></tr> 376<tr class="memitem:a8ce84a3b128750420be0e169aec28973"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a8ce84a3b128750420be0e169aec28973">MPL3115_CTRL_REG3_PP_OD1_SHIFT</a>   ((uint8_t) 4)</td></tr> 377<tr class="separator:a8ce84a3b128750420be0e169aec28973"><td class="memSeparator" colspan="2"> </td></tr> 378<tr class="memitem:aa76fda3edf527d0ffc037f79f3835223"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aa76fda3edf527d0ffc037f79f3835223">MPL3115_CTRL_REG3_IPOL1_MASK</a>   ((uint8_t) 0x20)</td></tr> 379<tr class="separator:aa76fda3edf527d0ffc037f79f3835223"><td class="memSeparator" colspan="2"> </td></tr> 380<tr class="memitem:a9f1b5755605a00c812461539395a65fa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a9f1b5755605a00c812461539395a65fa">MPL3115_CTRL_REG3_IPOL1_SHIFT</a>   ((uint8_t) 5)</td></tr> 381<tr class="separator:a9f1b5755605a00c812461539395a65fa"><td class="memSeparator" colspan="2"> </td></tr> 382<tr class="memitem:aa05acf4d6326c3f0746049ab24fd3490"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aa05acf4d6326c3f0746049ab24fd3490">MPL3115_CTRL_REG3_PP_OD2_INTPULLUP</a>   ((uint8_t) 0x00) /* Internal Pull-up. */</td></tr> 383<tr class="separator:aa05acf4d6326c3f0746049ab24fd3490"><td class="memSeparator" colspan="2"> </td></tr> 384<tr class="memitem:a03ca554abae73e96f182f5b7010c5e9f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a03ca554abae73e96f182f5b7010c5e9f">MPL3115_CTRL_REG3_PP_OD2_OPENDRAIN</a>   ((uint8_t) 0x01) /* Open drain. */</td></tr> 385<tr class="separator:a03ca554abae73e96f182f5b7010c5e9f"><td class="memSeparator" colspan="2"> </td></tr> 386<tr class="memitem:aeda48cd09627d42182204754788ec21d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aeda48cd09627d42182204754788ec21d">MPL3115_CTRL_REG3_IPOL2_LOW</a>   ((uint8_t) 0x00) /* Active low. */</td></tr> 387<tr class="separator:aeda48cd09627d42182204754788ec21d"><td class="memSeparator" colspan="2"> </td></tr> 388<tr class="memitem:a8d60ccdc1ec80c7322fa5e19452267a1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a8d60ccdc1ec80c7322fa5e19452267a1">MPL3115_CTRL_REG3_IPOL2_HIGH</a>   ((uint8_t) 0x02) /* Active high. */</td></tr> 389<tr class="separator:a8d60ccdc1ec80c7322fa5e19452267a1"><td class="memSeparator" colspan="2"> </td></tr> 390<tr class="memitem:a413f89c315b706fb11e803199fd604f4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a413f89c315b706fb11e803199fd604f4">MPL3115_CTRL_REG3_PP_OD1_INTPULLUP</a>   ((uint8_t) 0x00) /* Internal Pull-up. */</td></tr> 391<tr class="separator:a413f89c315b706fb11e803199fd604f4"><td class="memSeparator" colspan="2"> </td></tr> 392<tr class="memitem:a72ec900ec2d8cf10e4ff389ccaf9dc51"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a72ec900ec2d8cf10e4ff389ccaf9dc51">MPL3115_CTRL_REG3_PP_OD1_OPENDRAIN</a>   ((uint8_t) 0x10) /* Open drain. */</td></tr> 393<tr class="separator:a72ec900ec2d8cf10e4ff389ccaf9dc51"><td class="memSeparator" colspan="2"> </td></tr> 394<tr class="memitem:a9242852e558cb832b28a80c47774f442"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a9242852e558cb832b28a80c47774f442">MPL3115_CTRL_REG3_IPOL1_LOW</a>   ((uint8_t) 0x00) /* Active low. */</td></tr> 395<tr class="separator:a9242852e558cb832b28a80c47774f442"><td class="memSeparator" colspan="2"> </td></tr> 396<tr class="memitem:aaf5258c31326fded1409a49ee648fe0c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aaf5258c31326fded1409a49ee648fe0c">MPL3115_CTRL_REG3_IPOL1_HIGH</a>   ((uint8_t) 0x20) /* Active high. */</td></tr> 397<tr class="separator:aaf5258c31326fded1409a49ee648fe0c"><td class="memSeparator" colspan="2"> </td></tr> 398<tr class="memitem:a90378a64fedf62f36095e6cc6acd8c46"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a90378a64fedf62f36095e6cc6acd8c46">MPL3115_CTRL_REG4_INT_EN_TCHG_MASK</a>   ((uint8_t) 0x01)</td></tr> 399<tr class="separator:a90378a64fedf62f36095e6cc6acd8c46"><td class="memSeparator" colspan="2"> </td></tr> 400<tr class="memitem:af18eb1070286833ff979aa1441fafd90"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#af18eb1070286833ff979aa1441fafd90">MPL3115_CTRL_REG4_INT_EN_TCHG_SHIFT</a>   ((uint8_t) 0)</td></tr> 401<tr class="separator:af18eb1070286833ff979aa1441fafd90"><td class="memSeparator" colspan="2"> </td></tr> 402<tr class="memitem:a81e0550a7d14684ff436416d1a0754a2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a81e0550a7d14684ff436416d1a0754a2">MPL3115_CTRL_REG4_INT_EN_PCHG_MASK</a>   ((uint8_t) 0x02)</td></tr> 403<tr class="separator:a81e0550a7d14684ff436416d1a0754a2"><td class="memSeparator" colspan="2"> </td></tr> 404<tr class="memitem:af51c90fb7f494a077f753a056b431d09"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#af51c90fb7f494a077f753a056b431d09">MPL3115_CTRL_REG4_INT_EN_PCHG_SHIFT</a>   ((uint8_t) 1)</td></tr> 405<tr class="separator:af51c90fb7f494a077f753a056b431d09"><td class="memSeparator" colspan="2"> </td></tr> 406<tr class="memitem:ad64338f1c610e12469afdf84fb3b7b3f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ad64338f1c610e12469afdf84fb3b7b3f">MPL3115_CTRL_REG4_INT_EN_TTH_MASK</a>   ((uint8_t) 0x04)</td></tr> 407<tr class="separator:ad64338f1c610e12469afdf84fb3b7b3f"><td class="memSeparator" colspan="2"> </td></tr> 408<tr class="memitem:a9eb6447b9d75614446db95de9f2ac8fc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a9eb6447b9d75614446db95de9f2ac8fc">MPL3115_CTRL_REG4_INT_EN_TTH_SHIFT</a>   ((uint8_t) 2)</td></tr> 409<tr class="separator:a9eb6447b9d75614446db95de9f2ac8fc"><td class="memSeparator" colspan="2"> </td></tr> 410<tr class="memitem:a804700bbee91fda1cf2bfc7164f32ffd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a804700bbee91fda1cf2bfc7164f32ffd">MPL3115_CTRL_REG4_INT_EN_PTH_MASK</a>   ((uint8_t) 0x08)</td></tr> 411<tr class="separator:a804700bbee91fda1cf2bfc7164f32ffd"><td class="memSeparator" colspan="2"> </td></tr> 412<tr class="memitem:a0615ee884d52be98f9bf8ddb0b4a3b19"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a0615ee884d52be98f9bf8ddb0b4a3b19">MPL3115_CTRL_REG4_INT_EN_PTH_SHIFT</a>   ((uint8_t) 3)</td></tr> 413<tr class="separator:a0615ee884d52be98f9bf8ddb0b4a3b19"><td class="memSeparator" colspan="2"> </td></tr> 414<tr class="memitem:aa91973eb0a48bfdd391ac67b6e6a9d4c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aa91973eb0a48bfdd391ac67b6e6a9d4c">MPL3115_CTRL_REG4_INT_EN_TW_MASK</a>   ((uint8_t) 0x10)</td></tr> 415<tr class="separator:aa91973eb0a48bfdd391ac67b6e6a9d4c"><td class="memSeparator" colspan="2"> </td></tr> 416<tr class="memitem:ad79c13ed815215dfae41a484499634dd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ad79c13ed815215dfae41a484499634dd">MPL3115_CTRL_REG4_INT_EN_TW_SHIFT</a>   ((uint8_t) 4)</td></tr> 417<tr class="separator:ad79c13ed815215dfae41a484499634dd"><td class="memSeparator" colspan="2"> </td></tr> 418<tr class="memitem:a5049495fbac4f03ecfb5d40823d569f1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a5049495fbac4f03ecfb5d40823d569f1">MPL3115_CTRL_REG4_INT_EN_PW_MASK</a>   ((uint8_t) 0x20)</td></tr> 419<tr class="separator:a5049495fbac4f03ecfb5d40823d569f1"><td class="memSeparator" colspan="2"> </td></tr> 420<tr class="memitem:a5884a4f5ff4df445c47cc2a328d53c30"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a5884a4f5ff4df445c47cc2a328d53c30">MPL3115_CTRL_REG4_INT_EN_PW_SHIFT</a>   ((uint8_t) 5)</td></tr> 421<tr class="separator:a5884a4f5ff4df445c47cc2a328d53c30"><td class="memSeparator" colspan="2"> </td></tr> 422<tr class="memitem:ad14ca9932c39cb742826ca5739a1def5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ad14ca9932c39cb742826ca5739a1def5">MPL3115_CTRL_REG4_INT_EN_FIFO_MASK</a>   ((uint8_t) 0x40)</td></tr> 423<tr class="separator:ad14ca9932c39cb742826ca5739a1def5"><td class="memSeparator" colspan="2"> </td></tr> 424<tr class="memitem:ab4647c31a23cf18db4a0deb3e7a15226"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ab4647c31a23cf18db4a0deb3e7a15226">MPL3115_CTRL_REG4_INT_EN_FIFO_SHIFT</a>   ((uint8_t) 6)</td></tr> 425<tr class="separator:ab4647c31a23cf18db4a0deb3e7a15226"><td class="memSeparator" colspan="2"> </td></tr> 426<tr class="memitem:ac123e0d313722ab43f6f5ea921b967b5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ac123e0d313722ab43f6f5ea921b967b5">MPL3115_CTRL_REG4_INT_EN_DRDY_MASK</a>   ((uint8_t) 0x80)</td></tr> 427<tr class="separator:ac123e0d313722ab43f6f5ea921b967b5"><td class="memSeparator" colspan="2"> </td></tr> 428<tr class="memitem:a3fa0d84d0b99924be238d670c01559a7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a3fa0d84d0b99924be238d670c01559a7">MPL3115_CTRL_REG4_INT_EN_DRDY_SHIFT</a>   ((uint8_t) 7)</td></tr> 429<tr class="separator:a3fa0d84d0b99924be238d670c01559a7"><td class="memSeparator" colspan="2"> </td></tr> 430<tr class="memitem:a18a23fbdb2a35d45ace89497253701e7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a18a23fbdb2a35d45ace89497253701e7">MPL3115_CTRL_REG4_INT_EN_TCHG_INTDISABLED</a>   ((uint8_t) 0x00) /* Temperature Change interrupt disabled. */</td></tr> 431<tr class="separator:a18a23fbdb2a35d45ace89497253701e7"><td class="memSeparator" colspan="2"> </td></tr> 432<tr class="memitem:ac064637fcc83659fc918e3cc79da67ea"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ac064637fcc83659fc918e3cc79da67ea">MPL3115_CTRL_REG4_INT_EN_TCHG_INTENABLED</a>   ((uint8_t) 0x01) /* Temperature Change interrupt enabled */</td></tr> 433<tr class="separator:ac064637fcc83659fc918e3cc79da67ea"><td class="memSeparator" colspan="2"> </td></tr> 434<tr class="memitem:a9b52878844cf9194ffdb409bb0618184"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a9b52878844cf9194ffdb409bb0618184">MPL3115_CTRL_REG4_INT_EN_PCHG_INTDISABLED</a>   ((uint8_t) 0x00) /* Pressure Change interrupt disabled. */</td></tr> 435<tr class="separator:a9b52878844cf9194ffdb409bb0618184"><td class="memSeparator" colspan="2"> </td></tr> 436<tr class="memitem:a52353637f2b04c37b0290fd8ea767d3d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a52353637f2b04c37b0290fd8ea767d3d">MPL3115_CTRL_REG4_INT_EN_PCHG_INTENABLED</a>   ((uint8_t) 0x02) /* Pressure Change interrupt enabled */</td></tr> 437<tr class="separator:a52353637f2b04c37b0290fd8ea767d3d"><td class="memSeparator" colspan="2"> </td></tr> 438<tr class="memitem:aea607846f6f40ab0f4b2191b8c78f1d7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aea607846f6f40ab0f4b2191b8c78f1d7">MPL3115_CTRL_REG4_INT_EN_TTH_INTDISABLED</a>   ((uint8_t) 0x00) /* Temperature Threshold interrupt disabled. */</td></tr> 439<tr class="separator:aea607846f6f40ab0f4b2191b8c78f1d7"><td class="memSeparator" colspan="2"> </td></tr> 440<tr class="memitem:af2387e0a1e448d982b69be8fac4087be"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#af2387e0a1e448d982b69be8fac4087be">MPL3115_CTRL_REG4_INT_EN_TTH_INTENABLED</a>   ((uint8_t) 0x04) /* Temperature Threshold interrupt enabled */</td></tr> 441<tr class="separator:af2387e0a1e448d982b69be8fac4087be"><td class="memSeparator" colspan="2"> </td></tr> 442<tr class="memitem:a49d4018c5ef4b65f018f580453f57e81"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a49d4018c5ef4b65f018f580453f57e81">MPL3115_CTRL_REG4_INT_EN_PTH_INTDISABLED</a>   ((uint8_t) 0x00) /* Pressure Threshold interrupt disabled. */</td></tr> 443<tr class="separator:a49d4018c5ef4b65f018f580453f57e81"><td class="memSeparator" colspan="2"> </td></tr> 444<tr class="memitem:a84b8c8b4dc8942ece843bfea32f794ad"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a84b8c8b4dc8942ece843bfea32f794ad">MPL3115_CTRL_REG4_INT_EN_PTH_INTENABLED</a>   ((uint8_t) 0x08) /* Pressure Threshold interrupt enabled */</td></tr> 445<tr class="separator:a84b8c8b4dc8942ece843bfea32f794ad"><td class="memSeparator" colspan="2"> </td></tr> 446<tr class="memitem:a9eb86dcc319611cf2b1dfe0663db864f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a9eb86dcc319611cf2b1dfe0663db864f">MPL3115_CTRL_REG4_INT_EN_TW_INTDISABLED</a>   ((uint8_t) 0x00) /* Temperature window interrupt disabled. */</td></tr> 447<tr class="separator:a9eb86dcc319611cf2b1dfe0663db864f"><td class="memSeparator" colspan="2"> </td></tr> 448<tr class="memitem:a7cbe54536f810883d9e774c9211ab4b2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a7cbe54536f810883d9e774c9211ab4b2">MPL3115_CTRL_REG4_INT_EN_TW_INTENABLED</a>   ((uint8_t) 0x10) /* Temperature window interrupt enabled */</td></tr> 449<tr class="separator:a7cbe54536f810883d9e774c9211ab4b2"><td class="memSeparator" colspan="2"> </td></tr> 450<tr class="memitem:a410164d8d3c92ca04ffa293de80b9d06"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a410164d8d3c92ca04ffa293de80b9d06">MPL3115_CTRL_REG4_INT_EN_PW_INTDISABLED</a>   ((uint8_t) 0x00) /* Pressure window interrupt disabled. */</td></tr> 451<tr class="separator:a410164d8d3c92ca04ffa293de80b9d06"><td class="memSeparator" colspan="2"> </td></tr> 452<tr class="memitem:a75d3aac3d842293265ddc4780f85ba07"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a75d3aac3d842293265ddc4780f85ba07">MPL3115_CTRL_REG4_INT_EN_PW_INTENABLED</a>   ((uint8_t) 0x20) /* Pressure window interrupt enabled */</td></tr> 453<tr class="separator:a75d3aac3d842293265ddc4780f85ba07"><td class="memSeparator" colspan="2"> </td></tr> 454<tr class="memitem:ae98ea6ba4a54643b93a0ed874b54a900"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ae98ea6ba4a54643b93a0ed874b54a900">MPL3115_CTRL_REG4_INT_EN_FIFO_INTDISABLED</a>   ((uint8_t) 0x00) /* FIFO interrupt disabled. */</td></tr> 455<tr class="separator:ae98ea6ba4a54643b93a0ed874b54a900"><td class="memSeparator" colspan="2"> </td></tr> 456<tr class="memitem:a076dcc85ccca69a56fab3c61e00f9568"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a076dcc85ccca69a56fab3c61e00f9568">MPL3115_CTRL_REG4_INT_EN_FIFO_INTENABLED</a>   ((uint8_t) 0x40) /* FIFO interrupt enabled */</td></tr> 457<tr class="separator:a076dcc85ccca69a56fab3c61e00f9568"><td class="memSeparator" colspan="2"> </td></tr> 458<tr class="memitem:accb4389f4d4a673144fb17fc8bcfe41b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#accb4389f4d4a673144fb17fc8bcfe41b">MPL3115_CTRL_REG4_INT_EN_DRDY_INTDISABLED</a>   ((uint8_t) 0x00) /* Data Ready interrupt disabled. */</td></tr> 459<tr class="separator:accb4389f4d4a673144fb17fc8bcfe41b"><td class="memSeparator" colspan="2"> </td></tr> 460<tr class="memitem:a73ea011b11f8ed1a45968aceb8d77e00"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a73ea011b11f8ed1a45968aceb8d77e00">MPL3115_CTRL_REG4_INT_EN_DRDY_INTENABLED</a>   ((uint8_t) 0x80) /* Data Ready interrupt enabled. */</td></tr> 461<tr class="separator:a73ea011b11f8ed1a45968aceb8d77e00"><td class="memSeparator" colspan="2"> </td></tr> 462<tr class="memitem:a3504b1a3a27221296db3f859fb0b8673"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a3504b1a3a27221296db3f859fb0b8673">MPL3115_CTRL_REG5_INT_CFG_TCHG_MASK</a>   ((uint8_t) 0x01)</td></tr> 463<tr class="separator:a3504b1a3a27221296db3f859fb0b8673"><td class="memSeparator" colspan="2"> </td></tr> 464<tr class="memitem:a432fa2c8f25c6d273c33a99c66017f24"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a432fa2c8f25c6d273c33a99c66017f24">MPL3115_CTRL_REG5_INT_CFG_TCHG_SHIFT</a>   ((uint8_t) 0)</td></tr> 465<tr class="separator:a432fa2c8f25c6d273c33a99c66017f24"><td class="memSeparator" colspan="2"> </td></tr> 466<tr class="memitem:ae8157b3557d618b730f674ac4424e94e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ae8157b3557d618b730f674ac4424e94e">MPL3115_CTRL_REG5_INT_CFG_PCHG_MASK</a>   ((uint8_t) 0x02)</td></tr> 467<tr class="separator:ae8157b3557d618b730f674ac4424e94e"><td class="memSeparator" colspan="2"> </td></tr> 468<tr class="memitem:ad174e725d032ece38ddd76d5bbf83527"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ad174e725d032ece38ddd76d5bbf83527">MPL3115_CTRL_REG5_INT_CFG_PCHG_SHIFT</a>   ((uint8_t) 1)</td></tr> 469<tr class="separator:ad174e725d032ece38ddd76d5bbf83527"><td class="memSeparator" colspan="2"> </td></tr> 470<tr class="memitem:a812521783c42efcd69ade9cfb647d897"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a812521783c42efcd69ade9cfb647d897">MPL3115_CTRL_REG5_INT_CFG_TTH_MASK</a>   ((uint8_t) 0x04)</td></tr> 471<tr class="separator:a812521783c42efcd69ade9cfb647d897"><td class="memSeparator" colspan="2"> </td></tr> 472<tr class="memitem:ad2314793688864239d1d6459e4433442"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ad2314793688864239d1d6459e4433442">MPL3115_CTRL_REG5_INT_CFG_TTH_SHIFT</a>   ((uint8_t) 2)</td></tr> 473<tr class="separator:ad2314793688864239d1d6459e4433442"><td class="memSeparator" colspan="2"> </td></tr> 474<tr class="memitem:a24261a2540f59d5cbffa9679341fd262"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a24261a2540f59d5cbffa9679341fd262">MPL3115_CTRL_REG5_INT_CFG_PTH_MASK</a>   ((uint8_t) 0x08)</td></tr> 475<tr class="separator:a24261a2540f59d5cbffa9679341fd262"><td class="memSeparator" colspan="2"> </td></tr> 476<tr class="memitem:aefbfdd514011ac477e3af4883c1f6290"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aefbfdd514011ac477e3af4883c1f6290">MPL3115_CTRL_REG5_INT_CFG_PTH_SHIFT</a>   ((uint8_t) 3)</td></tr> 477<tr class="separator:aefbfdd514011ac477e3af4883c1f6290"><td class="memSeparator" colspan="2"> </td></tr> 478<tr class="memitem:a6c309bc16979148dc1c6de21dad6460b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a6c309bc16979148dc1c6de21dad6460b">MPL3115_CTRL_REG5_INT_CFG_TW_MASK</a>   ((uint8_t) 0x10)</td></tr> 479<tr class="separator:a6c309bc16979148dc1c6de21dad6460b"><td class="memSeparator" colspan="2"> </td></tr> 480<tr class="memitem:a5ac72c55b2d3b5b87dbabfda350a0b0c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a5ac72c55b2d3b5b87dbabfda350a0b0c">MPL3115_CTRL_REG5_INT_CFG_TW_SHIFT</a>   ((uint8_t) 4)</td></tr> 481<tr class="separator:a5ac72c55b2d3b5b87dbabfda350a0b0c"><td class="memSeparator" colspan="2"> </td></tr> 482<tr class="memitem:a231c3114f2b7d23a1ef6ea9bb771d9f6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a231c3114f2b7d23a1ef6ea9bb771d9f6">MPL3115_CTRL_REG5_INT_CFG_PW_MASK</a>   ((uint8_t) 0x20)</td></tr> 483<tr class="separator:a231c3114f2b7d23a1ef6ea9bb771d9f6"><td class="memSeparator" colspan="2"> </td></tr> 484<tr class="memitem:af9d1820b255d51ff1bfa0786709ccca4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#af9d1820b255d51ff1bfa0786709ccca4">MPL3115_CTRL_REG5_INT_CFG_PW_SHIFT</a>   ((uint8_t) 5)</td></tr> 485<tr class="separator:af9d1820b255d51ff1bfa0786709ccca4"><td class="memSeparator" colspan="2"> </td></tr> 486<tr class="memitem:a839cd4bef0fef992432fa9caa968fbd0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a839cd4bef0fef992432fa9caa968fbd0">MPL3115_CTRL_REG5_INT_CFG_FIFO_MASK</a>   ((uint8_t) 0x40)</td></tr> 487<tr class="separator:a839cd4bef0fef992432fa9caa968fbd0"><td class="memSeparator" colspan="2"> </td></tr> 488<tr class="memitem:a01a3b52419a42e920cc285c0e253934f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a01a3b52419a42e920cc285c0e253934f">MPL3115_CTRL_REG5_INT_CFG_FIFO_SHIFT</a>   ((uint8_t) 6)</td></tr> 489<tr class="separator:a01a3b52419a42e920cc285c0e253934f"><td class="memSeparator" colspan="2"> </td></tr> 490<tr class="memitem:a2c09df333671ff1a425a7fb2910b3503"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a2c09df333671ff1a425a7fb2910b3503">MPL3115_CTRL_REG5_INT_CFG_DRDY_MASK</a>   ((uint8_t) 0x80)</td></tr> 491<tr class="separator:a2c09df333671ff1a425a7fb2910b3503"><td class="memSeparator" colspan="2"> </td></tr> 492<tr class="memitem:aca663796294f73dc6c74f0f48a84ecc0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aca663796294f73dc6c74f0f48a84ecc0">MPL3115_CTRL_REG5_INT_CFG_DRDY_SHIFT</a>   ((uint8_t) 7)</td></tr> 493<tr class="separator:aca663796294f73dc6c74f0f48a84ecc0"><td class="memSeparator" colspan="2"> </td></tr> 494<tr class="memitem:a54876a1efabc2cc7643e22f25a717107"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a54876a1efabc2cc7643e22f25a717107">MPL3115_CTRL_REG5_INT_CFG_TCHG_INT2</a>   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td></tr> 495<tr class="separator:a54876a1efabc2cc7643e22f25a717107"><td class="memSeparator" colspan="2"> </td></tr> 496<tr class="memitem:a34fca04f1cd640cd838f05e09be14284"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a34fca04f1cd640cd838f05e09be14284">MPL3115_CTRL_REG5_INT_CFG_TCHG_INT1</a>   ((uint8_t) 0x01) /* Interrupt is routed to INT1 Pin. */</td></tr> 497<tr class="separator:a34fca04f1cd640cd838f05e09be14284"><td class="memSeparator" colspan="2"> </td></tr> 498<tr class="memitem:aa37fafaa8c6efb8aa6be218977b7f90d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aa37fafaa8c6efb8aa6be218977b7f90d">MPL3115_CTRL_REG5_INT_CFG_PCHG_INT2</a>   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td></tr> 499<tr class="separator:aa37fafaa8c6efb8aa6be218977b7f90d"><td class="memSeparator" colspan="2"> </td></tr> 500<tr class="memitem:a0a91f8481cc1b0b95ee4ae115bdc8872"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a0a91f8481cc1b0b95ee4ae115bdc8872">MPL3115_CTRL_REG5_INT_CFG_PCHG_INT1</a>   ((uint8_t) 0x02) /* Interrupt is routed to INT1 Pin. */</td></tr> 501<tr class="separator:a0a91f8481cc1b0b95ee4ae115bdc8872"><td class="memSeparator" colspan="2"> </td></tr> 502<tr class="memitem:a7f18da3606c0287af39ec72836475cd5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a7f18da3606c0287af39ec72836475cd5">MPL3115_CTRL_REG5_INT_CFG_TTH_INT2</a>   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td></tr> 503<tr class="separator:a7f18da3606c0287af39ec72836475cd5"><td class="memSeparator" colspan="2"> </td></tr> 504<tr class="memitem:a0c817b2729a52e7b72f8b8ca8361b1bc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a0c817b2729a52e7b72f8b8ca8361b1bc">MPL3115_CTRL_REG5_INT_CFG_TTH_INT1</a>   ((uint8_t) 0x04) /* Interrupt is routed to INT1 Pin. */</td></tr> 505<tr class="separator:a0c817b2729a52e7b72f8b8ca8361b1bc"><td class="memSeparator" colspan="2"> </td></tr> 506<tr class="memitem:a6cf3af3bd934e7a84359f48878d730b4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a6cf3af3bd934e7a84359f48878d730b4">MPL3115_CTRL_REG5_INT_CFG_PTH_INT2</a>   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td></tr> 507<tr class="separator:a6cf3af3bd934e7a84359f48878d730b4"><td class="memSeparator" colspan="2"> </td></tr> 508<tr class="memitem:a1b5a3e4c2aa03a1e201bf4befc6ddf07"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a1b5a3e4c2aa03a1e201bf4befc6ddf07">MPL3115_CTRL_REG5_INT_CFG_PTH_INT1</a>   ((uint8_t) 0x08) /* Interrupt is routed to INT1 Pin. */</td></tr> 509<tr class="separator:a1b5a3e4c2aa03a1e201bf4befc6ddf07"><td class="memSeparator" colspan="2"> </td></tr> 510<tr class="memitem:a7206aea7078ab82047e17ba4a905ad51"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a7206aea7078ab82047e17ba4a905ad51">MPL3115_CTRL_REG5_INT_CFG_TW_INT2</a>   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td></tr> 511<tr class="separator:a7206aea7078ab82047e17ba4a905ad51"><td class="memSeparator" colspan="2"> </td></tr> 512<tr class="memitem:a0581750fb73190470dc0c243d3bad331"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a0581750fb73190470dc0c243d3bad331">MPL3115_CTRL_REG5_INT_CFG_TW_INT1</a>   ((uint8_t) 0x10) /* Interrupt is routed to INT1 Pin. */</td></tr> 513<tr class="separator:a0581750fb73190470dc0c243d3bad331"><td class="memSeparator" colspan="2"> </td></tr> 514<tr class="memitem:a93b429469198933fe215257bdd77aaa8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a93b429469198933fe215257bdd77aaa8">MPL3115_CTRL_REG5_INT_CFG_PW_INT2</a>   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td></tr> 515<tr class="separator:a93b429469198933fe215257bdd77aaa8"><td class="memSeparator" colspan="2"> </td></tr> 516<tr class="memitem:a35372af04361279f84bfac9c583aa542"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a35372af04361279f84bfac9c583aa542">MPL3115_CTRL_REG5_INT_CFG_PW_INT1</a>   ((uint8_t) 0x20) /* Interrupt is routed to INT1 Pin. */</td></tr> 517<tr class="separator:a35372af04361279f84bfac9c583aa542"><td class="memSeparator" colspan="2"> </td></tr> 518<tr class="memitem:a9e43bbb0f00c1a86bde24836b1685276"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a9e43bbb0f00c1a86bde24836b1685276">MPL3115_CTRL_REG5_INT_CFG_FIFO_INT2</a>   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td></tr> 519<tr class="separator:a9e43bbb0f00c1a86bde24836b1685276"><td class="memSeparator" colspan="2"> </td></tr> 520<tr class="memitem:ad39882a49fcd082b41b63ae72c49f935"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ad39882a49fcd082b41b63ae72c49f935">MPL3115_CTRL_REG5_INT_CFG_FIFO_INT1</a>   ((uint8_t) 0x40) /* Interrupt is routed to INT1 Pin. */</td></tr> 521<tr class="separator:ad39882a49fcd082b41b63ae72c49f935"><td class="memSeparator" colspan="2"> </td></tr> 522<tr class="memitem:a25da6c22118996ce8510d586b35ed41f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a25da6c22118996ce8510d586b35ed41f">MPL3115_CTRL_REG5_INT_CFG_DRDY_INT2</a>   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td></tr> 523<tr class="separator:a25da6c22118996ce8510d586b35ed41f"><td class="memSeparator" colspan="2"> </td></tr> 524<tr class="memitem:a1d1149a27993ab77cfb7e15388ef3eed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a1d1149a27993ab77cfb7e15388ef3eed">MPL3115_CTRL_REG5_INT_CFG_DRDY_INT1</a>   ((uint8_t) 0x80) /* Interrupt is routed to INT1 Pin. */</td></tr> 525<tr class="separator:a1d1149a27993ab77cfb7e15388ef3eed"><td class="memSeparator" colspan="2"> </td></tr> 526</table><table class="memberdecls"> 527<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a> 528Typedefs</h2></td></tr> 529<tr class="memitem:aeb6260bf1468bc6c399536151a6e8abd"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aeb6260bf1468bc6c399536151a6e8abd">MPL3115_STATUS_t</a></td></tr> 530<tr class="separator:aeb6260bf1468bc6c399536151a6e8abd"><td class="memSeparator" colspan="2"> </td></tr> 531<tr class="memitem:af1b9d300e1fb105418ccfef662682a1b"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#af1b9d300e1fb105418ccfef662682a1b">MPL3115_OUT_P_MSB_t</a></td></tr> 532<tr class="separator:af1b9d300e1fb105418ccfef662682a1b"><td class="memSeparator" colspan="2"> </td></tr> 533<tr class="memitem:ae4e74e1434042e63de21138ba44952ce"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ae4e74e1434042e63de21138ba44952ce">MPL3115_OUT_P_CSB_t</a></td></tr> 534<tr class="separator:ae4e74e1434042e63de21138ba44952ce"><td class="memSeparator" colspan="2"> </td></tr> 535<tr class="memitem:a36f7f4416ea8ba004daa329ab6dd0e8b"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a36f7f4416ea8ba004daa329ab6dd0e8b">MPL3115_OUT_T_MSB_t</a></td></tr> 536<tr class="separator:a36f7f4416ea8ba004daa329ab6dd0e8b"><td class="memSeparator" colspan="2"> </td></tr> 537<tr class="memitem:a35c2c10df63e32c630a88b4815cd85ec"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a35c2c10df63e32c630a88b4815cd85ec">MPL3115_OUT_P_DELTA_MSB_t</a></td></tr> 538<tr class="separator:a35c2c10df63e32c630a88b4815cd85ec"><td class="memSeparator" colspan="2"> </td></tr> 539<tr class="memitem:a3bb03a14e07574c178ce325d31b75a0b"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a3bb03a14e07574c178ce325d31b75a0b">MPL3115_OUT_P_DELTA_CSB_t</a></td></tr> 540<tr class="separator:a3bb03a14e07574c178ce325d31b75a0b"><td class="memSeparator" colspan="2"> </td></tr> 541<tr class="memitem:a5d22e37bf6076e0552d0db1a50a889b7"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a5d22e37bf6076e0552d0db1a50a889b7">MPL3115_OUT_T_DELTA_MSB_t</a></td></tr> 542<tr class="separator:a5d22e37bf6076e0552d0db1a50a889b7"><td class="memSeparator" colspan="2"> </td></tr> 543<tr class="memitem:a65eb5c40f431e32439c4ea4f0c986fbb"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a65eb5c40f431e32439c4ea4f0c986fbb">MPL3115_WHO_AM_I_t</a></td></tr> 544<tr class="separator:a65eb5c40f431e32439c4ea4f0c986fbb"><td class="memSeparator" colspan="2"> </td></tr> 545<tr class="memitem:ab0dced61f62843fd963a0ff736549f43"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ab0dced61f62843fd963a0ff736549f43">MPL3115_F_DATA_t</a></td></tr> 546<tr class="separator:ab0dced61f62843fd963a0ff736549f43"><td class="memSeparator" colspan="2"> </td></tr> 547<tr class="memitem:a3cd38775cbbc3272e326e8956c8bcedd"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a3cd38775cbbc3272e326e8956c8bcedd">MPL3115_TIME_DLY_t</a></td></tr> 548<tr class="separator:a3cd38775cbbc3272e326e8956c8bcedd"><td class="memSeparator" colspan="2"> </td></tr> 549<tr class="memitem:a10b324adea9f3a8c4332206d986acb8c"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a10b324adea9f3a8c4332206d986acb8c">MPL3115_BAR_IN_MSB_t</a></td></tr> 550<tr class="separator:a10b324adea9f3a8c4332206d986acb8c"><td class="memSeparator" colspan="2"> </td></tr> 551<tr class="memitem:aa48ec2d41260b631e053b86b23d441d4"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aa48ec2d41260b631e053b86b23d441d4">MPL3115_BAR_IN_LSB_t</a></td></tr> 552<tr class="separator:aa48ec2d41260b631e053b86b23d441d4"><td class="memSeparator" colspan="2"> </td></tr> 553<tr class="memitem:a87441a0d7edde60c847667b7c106a05d"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a87441a0d7edde60c847667b7c106a05d">MPL3115_P_TGT_MSB_t</a></td></tr> 554<tr class="separator:a87441a0d7edde60c847667b7c106a05d"><td class="memSeparator" colspan="2"> </td></tr> 555<tr class="memitem:afb211dd82bad222751ceaf9f922be3f6"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#afb211dd82bad222751ceaf9f922be3f6">MPL3115_P_TGT_LSB_t</a></td></tr> 556<tr class="separator:afb211dd82bad222751ceaf9f922be3f6"><td class="memSeparator" colspan="2"> </td></tr> 557<tr class="memitem:a80ceabbb7bd356d87beffd6af15e4d38"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a80ceabbb7bd356d87beffd6af15e4d38">MPL3115_T_TGT_t</a></td></tr> 558<tr class="separator:a80ceabbb7bd356d87beffd6af15e4d38"><td class="memSeparator" colspan="2"> </td></tr> 559<tr class="memitem:a8c26ac0eb10d3879a0aa884100fe6970"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a8c26ac0eb10d3879a0aa884100fe6970">MPL3115_P_WND_MSB_t</a></td></tr> 560<tr class="separator:a8c26ac0eb10d3879a0aa884100fe6970"><td class="memSeparator" colspan="2"> </td></tr> 561<tr class="memitem:a130bdb7df393fad5c5a34e813aa8adbc"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a130bdb7df393fad5c5a34e813aa8adbc">MPL3115_P_WND_LSB_t</a></td></tr> 562<tr class="separator:a130bdb7df393fad5c5a34e813aa8adbc"><td class="memSeparator" colspan="2"> </td></tr> 563<tr class="memitem:a58f4a99e6fecdbef6145f67f6fb16a3d"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a58f4a99e6fecdbef6145f67f6fb16a3d">MPL3115_T_WND_t</a></td></tr> 564<tr class="separator:a58f4a99e6fecdbef6145f67f6fb16a3d"><td class="memSeparator" colspan="2"> </td></tr> 565<tr class="memitem:ac8c19948a2d178747a3f91dcca3b534f"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ac8c19948a2d178747a3f91dcca3b534f">MPL3115_P_MIN_MSB_t</a></td></tr> 566<tr class="separator:ac8c19948a2d178747a3f91dcca3b534f"><td class="memSeparator" colspan="2"> </td></tr> 567<tr class="memitem:aac857531a29c1db44fd96dbb7a8faf88"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aac857531a29c1db44fd96dbb7a8faf88">MPL3115_P_MIN_CSB_t</a></td></tr> 568<tr class="separator:aac857531a29c1db44fd96dbb7a8faf88"><td class="memSeparator" colspan="2"> </td></tr> 569<tr class="memitem:a1195eafecc03e6b53b87ec09c67ab403"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a1195eafecc03e6b53b87ec09c67ab403">MPL3115_T_MIN_MSB_t</a></td></tr> 570<tr class="separator:a1195eafecc03e6b53b87ec09c67ab403"><td class="memSeparator" colspan="2"> </td></tr> 571<tr class="memitem:aa46f4c5c6ee8dfbbb05f053eecacc01b"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#aa46f4c5c6ee8dfbbb05f053eecacc01b">MPL3115_P_MAX_MSB_t</a></td></tr> 572<tr class="separator:aa46f4c5c6ee8dfbbb05f053eecacc01b"><td class="memSeparator" colspan="2"> </td></tr> 573<tr class="memitem:a38d264ff20f5dcc27df1b930a3e4157e"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a38d264ff20f5dcc27df1b930a3e4157e">MPL3115_P_MAX_CSB_t</a></td></tr> 574<tr class="separator:a38d264ff20f5dcc27df1b930a3e4157e"><td class="memSeparator" colspan="2"> </td></tr> 575<tr class="memitem:a358a07b8c2e905da5b3c6d6f709a8f56"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a358a07b8c2e905da5b3c6d6f709a8f56">MPL3115_T_MAX_MSB_t</a></td></tr> 576<tr class="separator:a358a07b8c2e905da5b3c6d6f709a8f56"><td class="memSeparator" colspan="2"> </td></tr> 577<tr class="memitem:a5cdeec97d9148b6d05b54b9b661e064d"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a5cdeec97d9148b6d05b54b9b661e064d">MPL3115_OFF_P_t</a></td></tr> 578<tr class="separator:a5cdeec97d9148b6d05b54b9b661e064d"><td class="memSeparator" colspan="2"> </td></tr> 579<tr class="memitem:ab9a5ef789c751e055a9456aa945c459a"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#ab9a5ef789c751e055a9456aa945c459a">MPL3115_OFF_T_t</a></td></tr> 580<tr class="separator:ab9a5ef789c751e055a9456aa945c459a"><td class="memSeparator" colspan="2"> </td></tr> 581<tr class="memitem:a52f32385275cb613bf9b92104a499fd5"><td class="memItemLeft" align="right" valign="top">typedef uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="a00158.html#a52f32385275cb613bf9b92104a499fd5">MPL3115_OFF_H_t</a></td></tr> 582<tr class="separator:a52f32385275cb613bf9b92104a499fd5"><td class="memSeparator" colspan="2"> </td></tr> 583</table><table class="memberdecls"> 584<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a> 585Enumerations</h2></td></tr> 586<tr class="memitem:a5e7fba63eebd783231b18f414e8a138f"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom">{ <br /> 587  <a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fac696f351b06fd13728ed9e4081407ea8">MPL3115_STATUS</a> = 0x00, 588<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa4b32656f953887759d9479b54ad7f478">MPL3115_OUT_P_MSB</a> = 0x01, 589<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138faebbc6302fa6ae42e8f30bbb385cd0f50">MPL3115_OUT_P_CSB</a> = 0x02, 590<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138faeed07b8649c8cdbc0c019076e7783de2">MPL3115_OUT_P_LSB</a> = 0x03, 591<br /> 592  <a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa19a01cbd71c0958c0292fc14f92d1eae">MPL3115_OUT_T_MSB</a> = 0x04, 593<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa425080d97f0ca9005c814125df9d1b16">MPL3115_OUT_T_LSB</a> = 0x05, 594<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa6e1f4185c6bca5d6093442f512deb974">MPL3115_DR_STATUS</a> = 0x06, 595<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fac9a7536848baaf412a05d1e61427bce4">MPL3115_OUT_P_DELTA_MSB</a> = 0x07, 596<br /> 597  <a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa11c61b39a12210b48877baa3913f4e24">MPL3115_OUT_P_DELTA_CSB</a> = 0x08, 598<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138faa6540022336a473d63f43da8ca25bfa9">MPL3115_OUT_P_DELTA_LSB</a> = 0x09, 599<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fafb0c62bb6fdcf3597f3121a11f4abe1d">MPL3115_OUT_T_DELTA_MSB</a> = 0x0A, 600<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa13683bccaddb007fe3e73a76fd5cd2bc">MPL3115_OUT_T_DELTA_LSB</a> = 0x0B, 601<br /> 602  <a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fabed78897e96609e9cfe9511e93fcc376">MPL3115_WHO_AM_I</a> = 0x0C, 603<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138faeabe95d2f044c687218d61a67709997b">MPL3115_F_STATUS</a> = 0x0D, 604<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138faed5aec44153fef483b5bab0c8a4030e2">MPL3115_F_DATA</a> = 0x0E, 605<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa886b40b5039aa812e9a4f305673a6976">MPL3115_F_SETUP</a> = 0x0F, 606<br /> 607  <a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa88d0ab0b20c0dad6c03125afa65243a2">MPL3115_TIME_DLY</a> = 0x10, 608<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa41aa199a4bdabe49f6e37f006cb27e9c">MPL3115_SYSMOD</a> = 0x11, 609<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa66c2f93194b8725513cbfba3f4792a6e">MPL3115_INT_SOURCE</a> = 0x12, 610<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa3a6cac6298c53c71338701340e44e91e">MPL3115_PT_DATA_CFG</a> = 0x13, 611<br /> 612  <a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fae80d116774740d147186dc92019a7ed0">MPL3115_BAR_IN_MSB</a> = 0x14, 613<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa623c60eef709a16a40091aad61aa3a1e">MPL3115_BAR_IN_LSB</a> = 0x15, 614<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fad3e73722ce305b1049cfcf08973ad86b">MPL3115_P_TGT_MSB</a> = 0x16, 615<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa85cfc3cac13d56d7f156d96d92bc8334">MPL3115_P_TGT_LSB</a> = 0x17, 616<br /> 617  <a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa032e20d3fe40813052ae775e492dc184">MPL3115_T_TGT</a> = 0x18, 618<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fac408622e3bcb422554a15d4ae4bd4b96">MPL3115_P_WND_MSB</a> = 0x19, 619<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa8ea110374ba5a8ae159d5fa28a8782e1">MPL3115_P_WND_LSB</a> = 0x1A, 620<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138faff927cef6ba3e71a574707b8cdb16707">MPL3115_T_WND</a> = 0x1B, 621<br /> 622  <a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fadd4c4725ddcf17a7884789f323f41244">MPL3115_P_MIN_MSB</a> = 0x1C, 623<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa9e3427cd9cf877757c9cdcb6e0491296">MPL3115_P_MIN_CSB</a> = 0x1D, 624<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa9a0990787e320158756a56f2f6e33bab">MPL3115_P_MIN_LSB</a> = 0x1E, 625<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138faa5a0cf9aaba08a005bcd3e8df1dd1460">MPL3115_T_MIN_MSB</a> = 0x1F, 626<br /> 627  <a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa459a80b9097d1682b83a66122d978498">MPL3115_T_MIN_LSB</a> = 0x20, 628<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa29d9016b4b095eab3c11c62802d0b52b">MPL3115_P_MAX_MSB</a> = 0x21, 629<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa58b4ef369bc016529e6b751d320b12a7">MPL3115_P_MAX_CSB</a> = 0x22, 630<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa840c36411fa60a417bb134e814c77ac3">MPL3115_P_MAX_LSB</a> = 0x23, 631<br /> 632  <a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fad60a7d08dfcfe61948d88af641a17971">MPL3115_T_MAX_MSB</a> = 0x24, 633<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138faa94dddc4189c317b4979b2c17f5e5e61">MPL3115_T_MAX_LSB</a> = 0x25, 634<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fae97689a65dd8c6b5b8b6a1fa495173ff">MPL3115_CTRL_REG1</a> = 0x26, 635<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa0dfa407b266ae466f075e7877f2d348d">MPL3115_CTRL_REG2</a> = 0x27, 636<br /> 637  <a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa8d52d3ccafa6a1dd31f9c687d79fb26d">MPL3115_CTRL_REG3</a> = 0x28, 638<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa3a1254faf6b314fbd34f2e43c69d19de">MPL3115_CTRL_REG4</a> = 0x29, 639<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa0d3fada88b16401cbdcf76e2fb8e5560">MPL3115_CTRL_REG5</a> = 0x2A, 640<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138faae65077bd2e0d039d0d8613b50041d1b">MPL3115_OFF_P</a> = 0x2B, 641<br /> 642  <a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa4c880f709ee92bb48faa9c72dab56818">MPL3115_OFF_T</a> = 0x2C, 643<a class="el" href="a00158.html#a5e7fba63eebd783231b18f414e8a138fa4c1f6517a5115b80b89ee20458e85960">MPL3115_OFF_H</a> = 0x2D 644<br /> 645 }</td></tr> 646<tr class="separator:a5e7fba63eebd783231b18f414e8a138f"><td class="memSeparator" colspan="2"> </td></tr> 647</table> 648<h2 class="groupheader">Macro Definition Documentation</h2> 649<a id="a3f2f4a1b85b89cb6e33d847a619906a7"></a> 650<h2 class="memtitle"><span class="permalink"><a href="#a3f2f4a1b85b89cb6e33d847a619906a7">◆ </a></span>MPL3115_CTRL_REG1_ALT_ALT</h2> 651 652<div class="memitem"> 653<div class="memproto"> 654 <table class="memname"> 655 <tr> 656 <td class="memname">#define MPL3115_CTRL_REG1_ALT_ALT   ((uint8_t) 0x80) /* Altimeter Mode. */</td> 657 </tr> 658 </table> 659</div><div class="memdoc"> 660 661<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00888">888</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 662 663</div> 664</div> 665<a id="ab80e8752c821211241d79b98f39c2fcc"></a> 666<h2 class="memtitle"><span class="permalink"><a href="#ab80e8752c821211241d79b98f39c2fcc">◆ </a></span>MPL3115_CTRL_REG1_ALT_BAR</h2> 667 668<div class="memitem"> 669<div class="memproto"> 670 <table class="memname"> 671 <tr> 672 <td class="memname">#define MPL3115_CTRL_REG1_ALT_BAR   ((uint8_t) 0x00) /* Barometer Mode. */</td> 673 </tr> 674 </table> 675</div><div class="memdoc"> 676 677<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00889">889</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 678 679</div> 680</div> 681<a id="a22459cf5c7fd4f97fc9e92c45f01b74b"></a> 682<h2 class="memtitle"><span class="permalink"><a href="#a22459cf5c7fd4f97fc9e92c45f01b74b">◆ </a></span>MPL3115_CTRL_REG1_ALT_MASK</h2> 683 684<div class="memitem"> 685<div class="memproto"> 686 <table class="memname"> 687 <tr> 688 <td class="memname">#define MPL3115_CTRL_REG1_ALT_MASK   ((uint8_t) 0x80)</td> 689 </tr> 690 </table> 691</div><div class="memdoc"> 692 693<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00861">861</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 694 695</div> 696</div> 697<a id="ac392a66703be27aabb15366d4d26029c"></a> 698<h2 class="memtitle"><span class="permalink"><a href="#ac392a66703be27aabb15366d4d26029c">◆ </a></span>MPL3115_CTRL_REG1_ALT_SHIFT</h2> 699 700<div class="memitem"> 701<div class="memproto"> 702 <table class="memname"> 703 <tr> 704 <td class="memname">#define MPL3115_CTRL_REG1_ALT_SHIFT   ((uint8_t) 7)</td> 705 </tr> 706 </table> 707</div><div class="memdoc"> 708 709<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00862">862</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 710 711</div> 712</div> 713<a id="a7c79d49c0e6d885233e0cc7614d27b79"></a> 714<h2 class="memtitle"><span class="permalink"><a href="#a7c79d49c0e6d885233e0cc7614d27b79">◆ </a></span>MPL3115_CTRL_REG1_OS_MASK</h2> 715 716<div class="memitem"> 717<div class="memproto"> 718 <table class="memname"> 719 <tr> 720 <td class="memname">#define MPL3115_CTRL_REG1_OS_MASK   ((uint8_t) 0x38)</td> 721 </tr> 722 </table> 723</div><div class="memdoc"> 724 725<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00855">855</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 726 727</div> 728</div> 729<a id="a68dffaaa33a2dd4e1e8dc9a7a88bbdf0"></a> 730<h2 class="memtitle"><span class="permalink"><a href="#a68dffaaa33a2dd4e1e8dc9a7a88bbdf0">◆ </a></span>MPL3115_CTRL_REG1_OS_OSR_1</h2> 731 732<div class="memitem"> 733<div class="memproto"> 734 <table class="memname"> 735 <tr> 736 <td class="memname">#define MPL3115_CTRL_REG1_OS_OSR_1   ((uint8_t) 0x00) /* OSR = 1 and Minimum Time Between Data Samples 6 ms */</td> 737 </tr> 738 </table> 739</div><div class="memdoc"> 740 741<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00874">874</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 742 743</div> 744</div> 745<a id="a2dacb3fad8f0ff3cf52ca713e21aa504"></a> 746<h2 class="memtitle"><span class="permalink"><a href="#a2dacb3fad8f0ff3cf52ca713e21aa504">◆ </a></span>MPL3115_CTRL_REG1_OS_OSR_128</h2> 747 748<div class="memitem"> 749<div class="memproto"> 750 <table class="memname"> 751 <tr> 752 <td class="memname">#define MPL3115_CTRL_REG1_OS_OSR_128   ((uint8_t) 0x38) /* OSR = 128 and Minimum Time Between Data Samples 512 */</td> 753 </tr> 754 </table> 755</div><div class="memdoc"> 756 757<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00884">884</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 758 759</div> 760</div> 761<a id="aad2ac45a77e17ab64eec41e296b9ae91"></a> 762<h2 class="memtitle"><span class="permalink"><a href="#aad2ac45a77e17ab64eec41e296b9ae91">◆ </a></span>MPL3115_CTRL_REG1_OS_OSR_16</h2> 763 764<div class="memitem"> 765<div class="memproto"> 766 <table class="memname"> 767 <tr> 768 <td class="memname">#define MPL3115_CTRL_REG1_OS_OSR_16   ((uint8_t) 0x20) /* OSR = 16 and Minimum Time Between Data Samples 66 */</td> 769 </tr> 770 </table> 771</div><div class="memdoc"> 772 773<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00878">878</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 774 775</div> 776</div> 777<a id="ac56bc424e9d0ed7074cc98aeae329d6b"></a> 778<h2 class="memtitle"><span class="permalink"><a href="#ac56bc424e9d0ed7074cc98aeae329d6b">◆ </a></span>MPL3115_CTRL_REG1_OS_OSR_2</h2> 779 780<div class="memitem"> 781<div class="memproto"> 782 <table class="memname"> 783 <tr> 784 <td class="memname">#define MPL3115_CTRL_REG1_OS_OSR_2   ((uint8_t) 0x08) /* OSR = 2 and Minimum Time Between Data Samples 10 ms */</td> 785 </tr> 786 </table> 787</div><div class="memdoc"> 788 789<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00875">875</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 790 791</div> 792</div> 793<a id="a5b865467b3cf8946d1c0f4006a80834d"></a> 794<h2 class="memtitle"><span class="permalink"><a href="#a5b865467b3cf8946d1c0f4006a80834d">◆ </a></span>MPL3115_CTRL_REG1_OS_OSR_32</h2> 795 796<div class="memitem"> 797<div class="memproto"> 798 <table class="memname"> 799 <tr> 800 <td class="memname">#define MPL3115_CTRL_REG1_OS_OSR_32   ((uint8_t) 0x28) /* OSR = 32 and Minimum Time Between Data Samples 130 */</td> 801 </tr> 802 </table> 803</div><div class="memdoc"> 804 805<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00880">880</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 806 807</div> 808</div> 809<a id="a45d712c8dcafec42667b52768d319cdc"></a> 810<h2 class="memtitle"><span class="permalink"><a href="#a45d712c8dcafec42667b52768d319cdc">◆ </a></span>MPL3115_CTRL_REG1_OS_OSR_4</h2> 811 812<div class="memitem"> 813<div class="memproto"> 814 <table class="memname"> 815 <tr> 816 <td class="memname">#define MPL3115_CTRL_REG1_OS_OSR_4   ((uint8_t) 0x10) /* OSR = 4 and Minimum Time Between Data Samples 18 ms */</td> 817 </tr> 818 </table> 819</div><div class="memdoc"> 820 821<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00876">876</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 822 823</div> 824</div> 825<a id="a2b40307b7830bbe10f810748476625c4"></a> 826<h2 class="memtitle"><span class="permalink"><a href="#a2b40307b7830bbe10f810748476625c4">◆ </a></span>MPL3115_CTRL_REG1_OS_OSR_64</h2> 827 828<div class="memitem"> 829<div class="memproto"> 830 <table class="memname"> 831 <tr> 832 <td class="memname">#define MPL3115_CTRL_REG1_OS_OSR_64   ((uint8_t) 0x30) /* OSR = 64 and Minimum Time Between Data Samples 258 */</td> 833 </tr> 834 </table> 835</div><div class="memdoc"> 836 837<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00882">882</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 838 839</div> 840</div> 841<a id="a20b0a90aa855e98552f75b51e94e0c80"></a> 842<h2 class="memtitle"><span class="permalink"><a href="#a20b0a90aa855e98552f75b51e94e0c80">◆ </a></span>MPL3115_CTRL_REG1_OS_OSR_8</h2> 843 844<div class="memitem"> 845<div class="memproto"> 846 <table class="memname"> 847 <tr> 848 <td class="memname">#define MPL3115_CTRL_REG1_OS_OSR_8   ((uint8_t) 0x18) /* OSR = 8 and Minimum Time Between Data Samples 34 ms */</td> 849 </tr> 850 </table> 851</div><div class="memdoc"> 852 853<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00877">877</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 854 855</div> 856</div> 857<a id="ad9cfb7c748148dbf5538ccd5954785f9"></a> 858<h2 class="memtitle"><span class="permalink"><a href="#ad9cfb7c748148dbf5538ccd5954785f9">◆ </a></span>MPL3115_CTRL_REG1_OS_SHIFT</h2> 859 860<div class="memitem"> 861<div class="memproto"> 862 <table class="memname"> 863 <tr> 864 <td class="memname">#define MPL3115_CTRL_REG1_OS_SHIFT   ((uint8_t) 3)</td> 865 </tr> 866 </table> 867</div><div class="memdoc"> 868 869<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00856">856</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 870 871</div> 872</div> 873<a id="ac6679c4b648df6b80727094040169499"></a> 874<h2 class="memtitle"><span class="permalink"><a href="#ac6679c4b648df6b80727094040169499">◆ </a></span>MPL3115_CTRL_REG1_OST_MASK</h2> 875 876<div class="memitem"> 877<div class="memproto"> 878 <table class="memname"> 879 <tr> 880 <td class="memname">#define MPL3115_CTRL_REG1_OST_MASK   ((uint8_t) 0x02)</td> 881 </tr> 882 </table> 883</div><div class="memdoc"> 884 885<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00849">849</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 886 887<p class="reference">Referenced by <a class="el" href="a00401_source.html#l00227">main()</a>.</p> 888 889</div> 890</div> 891<a id="ad06b58cc7c08b26074e42acd990836eb"></a> 892<h2 class="memtitle"><span class="permalink"><a href="#ad06b58cc7c08b26074e42acd990836eb">◆ </a></span>MPL3115_CTRL_REG1_OST_RESET</h2> 893 894<div class="memitem"> 895<div class="memproto"> 896 <table class="memname"> 897 <tr> 898 <td class="memname">#define MPL3115_CTRL_REG1_OST_RESET   ((uint8_t) 0x00) /* Reset OST Bit. */</td> 899 </tr> 900 </table> 901</div><div class="memdoc"> 902 903<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00870">870</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 904 905<p class="reference">Referenced by <a class="el" href="a00401_source.html#l00227">main()</a>.</p> 906 907</div> 908</div> 909<a id="ae7779443a088a9a6a089224d9a6889fd"></a> 910<h2 class="memtitle"><span class="permalink"><a href="#ae7779443a088a9a6a089224d9a6889fd">◆ </a></span>MPL3115_CTRL_REG1_OST_SET</h2> 911 912<div class="memitem"> 913<div class="memproto"> 914 <table class="memname"> 915 <tr> 916 <td class="memname">#define MPL3115_CTRL_REG1_OST_SET   ((uint8_t) 0x02) /* SET OST Bit. */</td> 917 </tr> 918 </table> 919</div><div class="memdoc"> 920 921<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00871">871</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 922 923</div> 924</div> 925<a id="a31c71240e57ccaf452e247995531bb34"></a> 926<h2 class="memtitle"><span class="permalink"><a href="#a31c71240e57ccaf452e247995531bb34">◆ </a></span>MPL3115_CTRL_REG1_OST_SHIFT</h2> 927 928<div class="memitem"> 929<div class="memproto"> 930 <table class="memname"> 931 <tr> 932 <td class="memname">#define MPL3115_CTRL_REG1_OST_SHIFT   ((uint8_t) 1)</td> 933 </tr> 934 </table> 935</div><div class="memdoc"> 936 937<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00850">850</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 938 939</div> 940</div> 941<a id="acd62dea6edfa98d1480b9e58dbd164e8"></a> 942<h2 class="memtitle"><span class="permalink"><a href="#acd62dea6edfa98d1480b9e58dbd164e8">◆ </a></span>MPL3115_CTRL_REG1_RAW_DIS</h2> 943 944<div class="memitem"> 945<div class="memproto"> 946 <table class="memname"> 947 <tr> 948 <td class="memname">#define MPL3115_CTRL_REG1_RAW_DIS   ((uint8_t) 0x00) /* Raw output disabled. */</td> 949 </tr> 950 </table> 951</div><div class="memdoc"> 952 953<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00886">886</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 954 955</div> 956</div> 957<a id="a5663f20ea832dd3d16e9322f3450d021"></a> 958<h2 class="memtitle"><span class="permalink"><a href="#a5663f20ea832dd3d16e9322f3450d021">◆ </a></span>MPL3115_CTRL_REG1_RAW_EN</h2> 959 960<div class="memitem"> 961<div class="memproto"> 962 <table class="memname"> 963 <tr> 964 <td class="memname">#define MPL3115_CTRL_REG1_RAW_EN   ((uint8_t) 0x40) /* Raw output enabled. */</td> 965 </tr> 966 </table> 967</div><div class="memdoc"> 968 969<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00887">887</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 970 971</div> 972</div> 973<a id="a84a8191355b0e173d58e8a326af87ccf"></a> 974<h2 class="memtitle"><span class="permalink"><a href="#a84a8191355b0e173d58e8a326af87ccf">◆ </a></span>MPL3115_CTRL_REG1_RAW_MASK</h2> 975 976<div class="memitem"> 977<div class="memproto"> 978 <table class="memname"> 979 <tr> 980 <td class="memname">#define MPL3115_CTRL_REG1_RAW_MASK   ((uint8_t) 0x40)</td> 981 </tr> 982 </table> 983</div><div class="memdoc"> 984 985<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00858">858</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 986 987</div> 988</div> 989<a id="a099bb88b3801182e2f9d358690b49ad6"></a> 990<h2 class="memtitle"><span class="permalink"><a href="#a099bb88b3801182e2f9d358690b49ad6">◆ </a></span>MPL3115_CTRL_REG1_RAW_SHIFT</h2> 991 992<div class="memitem"> 993<div class="memproto"> 994 <table class="memname"> 995 <tr> 996 <td class="memname">#define MPL3115_CTRL_REG1_RAW_SHIFT   ((uint8_t) 6)</td> 997 </tr> 998 </table> 999</div><div class="memdoc"> 1000 1001<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00859">859</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1002 1003</div> 1004</div> 1005<a id="a6c024552174c3fb36077da2397d64b24"></a> 1006<h2 class="memtitle"><span class="permalink"><a href="#a6c024552174c3fb36077da2397d64b24">◆ </a></span>MPL3115_CTRL_REG1_RST_DIS</h2> 1007 1008<div class="memitem"> 1009<div class="memproto"> 1010 <table class="memname"> 1011 <tr> 1012 <td class="memname">#define MPL3115_CTRL_REG1_RST_DIS   ((uint8_t) 0x00) /* Device reset disabled. */</td> 1013 </tr> 1014 </table> 1015</div><div class="memdoc"> 1016 1017<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00872">872</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1018 1019</div> 1020</div> 1021<a id="a99a5a1889ee2537b4006d8ca17b74449"></a> 1022<h2 class="memtitle"><span class="permalink"><a href="#a99a5a1889ee2537b4006d8ca17b74449">◆ </a></span>MPL3115_CTRL_REG1_RST_EN</h2> 1023 1024<div class="memitem"> 1025<div class="memproto"> 1026 <table class="memname"> 1027 <tr> 1028 <td class="memname">#define MPL3115_CTRL_REG1_RST_EN   ((uint8_t) 0x04) /* Device reset enabled. */</td> 1029 </tr> 1030 </table> 1031</div><div class="memdoc"> 1032 1033<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00873">873</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1034 1035<p class="reference">Referenced by <a class="el" href="a00161_source.html#l00133">MPL3115_I2C_DeInit()</a>.</p> 1036 1037</div> 1038</div> 1039<a id="ad75b6c4c4c0d67399b37c3724f3bf59a"></a> 1040<h2 class="memtitle"><span class="permalink"><a href="#ad75b6c4c4c0d67399b37c3724f3bf59a">◆ </a></span>MPL3115_CTRL_REG1_RST_MASK</h2> 1041 1042<div class="memitem"> 1043<div class="memproto"> 1044 <table class="memname"> 1045 <tr> 1046 <td class="memname">#define MPL3115_CTRL_REG1_RST_MASK   ((uint8_t) 0x04)</td> 1047 </tr> 1048 </table> 1049</div><div class="memdoc"> 1050 1051<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00852">852</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1052 1053<p class="reference">Referenced by <a class="el" href="a00161_source.html#l00133">MPL3115_I2C_DeInit()</a>.</p> 1054 1055</div> 1056</div> 1057<a id="aba3e7d6f1be4a3942a15fee9987c90a2"></a> 1058<h2 class="memtitle"><span class="permalink"><a href="#aba3e7d6f1be4a3942a15fee9987c90a2">◆ </a></span>MPL3115_CTRL_REG1_RST_SHIFT</h2> 1059 1060<div class="memitem"> 1061<div class="memproto"> 1062 <table class="memname"> 1063 <tr> 1064 <td class="memname">#define MPL3115_CTRL_REG1_RST_SHIFT   ((uint8_t) 2)</td> 1065 </tr> 1066 </table> 1067</div><div class="memdoc"> 1068 1069<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00853">853</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1070 1071</div> 1072</div> 1073<a id="a70ee6ecf0544a29f4f0367d45b1dd6cd"></a> 1074<h2 class="memtitle"><span class="permalink"><a href="#a70ee6ecf0544a29f4f0367d45b1dd6cd">◆ </a></span>MPL3115_CTRL_REG1_SBYB_ACTIVE</h2> 1075 1076<div class="memitem"> 1077<div class="memproto"> 1078 <table class="memname"> 1079 <tr> 1080 <td class="memname">#define MPL3115_CTRL_REG1_SBYB_ACTIVE   ((uint8_t) 0x01) /* Active Mode. */</td> 1081 </tr> 1082 </table> 1083</div><div class="memdoc"> 1084 1085<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00869">869</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1086 1087<p class="reference">Referenced by <a class="el" href="a00161_source.html#l00061">MPL3115_I2C_Configure()</a>.</p> 1088 1089</div> 1090</div> 1091<a id="a94dea01c807e1932cd7f86cbf6dcb0c4"></a> 1092<h2 class="memtitle"><span class="permalink"><a href="#a94dea01c807e1932cd7f86cbf6dcb0c4">◆ </a></span>MPL3115_CTRL_REG1_SBYB_MASK</h2> 1093 1094<div class="memitem"> 1095<div class="memproto"> 1096 <table class="memname"> 1097 <tr> 1098 <td class="memname">#define MPL3115_CTRL_REG1_SBYB_MASK   ((uint8_t) 0x01)</td> 1099 </tr> 1100 </table> 1101</div><div class="memdoc"> 1102 1103<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00846">846</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1104 1105<p class="reference">Referenced by <a class="el" href="a00161_source.html#l00061">MPL3115_I2C_Configure()</a>.</p> 1106 1107</div> 1108</div> 1109<a id="aac7c3008606d73301718467ec2f2b0b9"></a> 1110<h2 class="memtitle"><span class="permalink"><a href="#aac7c3008606d73301718467ec2f2b0b9">◆ </a></span>MPL3115_CTRL_REG1_SBYB_SHIFT</h2> 1111 1112<div class="memitem"> 1113<div class="memproto"> 1114 <table class="memname"> 1115 <tr> 1116 <td class="memname">#define MPL3115_CTRL_REG1_SBYB_SHIFT   ((uint8_t) 0)</td> 1117 </tr> 1118 </table> 1119</div><div class="memdoc"> 1120 1121<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00847">847</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1122 1123</div> 1124</div> 1125<a id="a8e2be127e273914b26a33e8447586c73"></a> 1126<h2 class="memtitle"><span class="permalink"><a href="#a8e2be127e273914b26a33e8447586c73">◆ </a></span>MPL3115_CTRL_REG1_SBYB_STANDBY</h2> 1127 1128<div class="memitem"> 1129<div class="memproto"> 1130 <table class="memname"> 1131 <tr> 1132 <td class="memname">#define MPL3115_CTRL_REG1_SBYB_STANDBY   ((uint8_t) 0x00) /* Standby Mode. */</td> 1133 </tr> 1134 </table> 1135</div><div class="memdoc"> 1136 1137<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00868">868</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1138 1139<p class="reference">Referenced by <a class="el" href="a00161_source.html#l00061">MPL3115_I2C_Configure()</a>.</p> 1140 1141</div> 1142</div> 1143<a id="aa5d6e93837f55d38f5ae7ee2ca0ee2e1"></a> 1144<h2 class="memtitle"><span class="permalink"><a href="#aa5d6e93837f55d38f5ae7ee2ca0ee2e1">◆ </a></span>MPL3115_CTRL_REG2_ALARM_SEL_MASK</h2> 1145 1146<div class="memitem"> 1147<div class="memproto"> 1148 <table class="memname"> 1149 <tr> 1150 <td class="memname">#define MPL3115_CTRL_REG2_ALARM_SEL_MASK   ((uint8_t) 0x10)</td> 1151 </tr> 1152 </table> 1153</div><div class="memdoc"> 1154 1155<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00919">919</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1156 1157</div> 1158</div> 1159<a id="a4889017be5dfe52c6c54f9a8688b107d"></a> 1160<h2 class="memtitle"><span class="permalink"><a href="#a4889017be5dfe52c6c54f9a8688b107d">◆ </a></span>MPL3115_CTRL_REG2_ALARM_SEL_SHIFT</h2> 1161 1162<div class="memitem"> 1163<div class="memproto"> 1164 <table class="memname"> 1165 <tr> 1166 <td class="memname">#define MPL3115_CTRL_REG2_ALARM_SEL_SHIFT   ((uint8_t) 4)</td> 1167 </tr> 1168 </table> 1169</div><div class="memdoc"> 1170 1171<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00920">920</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1172 1173</div> 1174</div> 1175<a id="a09e2b41eff7e3bbdd2ed9e5b9dee6fd4"></a> 1176<h2 class="memtitle"><span class="permalink"><a href="#a09e2b41eff7e3bbdd2ed9e5b9dee6fd4">◆ </a></span>MPL3115_CTRL_REG2_ALARM_SEL_USE_OUT</h2> 1177 1178<div class="memitem"> 1179<div class="memproto"> 1180 <table class="memname"> 1181 <tr> 1182 <td class="memname">#define MPL3115_CTRL_REG2_ALARM_SEL_USE_OUT   ((uint8_t) 0x10) /* The values in OUT_P/OUT_T are used for calculating */</td> 1183 </tr> 1184 </table> 1185</div><div class="memdoc"> 1186 1187<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00931">931</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1188 1189</div> 1190</div> 1191<a id="a9a3d4ea5db311061cf8cb71862b3dfff"></a> 1192<h2 class="memtitle"><span class="permalink"><a href="#a9a3d4ea5db311061cf8cb71862b3dfff">◆ </a></span>MPL3115_CTRL_REG2_ALARM_SEL_USE_TGT</h2> 1193 1194<div class="memitem"> 1195<div class="memproto"> 1196 <table class="memname"> 1197 <tr> 1198 <td class="memname">#define MPL3115_CTRL_REG2_ALARM_SEL_USE_TGT   ((uint8_t) 0x00) /* The values in P_TGT_MSB, P_TGT_LSB and T_TGT are */</td> 1199 </tr> 1200 </table> 1201</div><div class="memdoc"> 1202 1203<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00929">929</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1204 1205</div> 1206</div> 1207<a id="a85dff2bbde39992cb5515d43b4b1d37e"></a> 1208<h2 class="memtitle"><span class="permalink"><a href="#a85dff2bbde39992cb5515d43b4b1d37e">◆ </a></span>MPL3115_CTRL_REG2_LOAD_OUTPUT_DNL</h2> 1209 1210<div class="memitem"> 1211<div class="memproto"> 1212 <table class="memname"> 1213 <tr> 1214 <td class="memname">#define MPL3115_CTRL_REG2_LOAD_OUTPUT_DNL   ((uint8_t) 0x00) /* Do not load OUT_P/OUT_T as target values. */</td> 1215 </tr> 1216 </table> 1217</div><div class="memdoc"> 1218 1219<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00933">933</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1220 1221</div> 1222</div> 1223<a id="a36aa1a593328653441d9d653e5e04340"></a> 1224<h2 class="memtitle"><span class="permalink"><a href="#a36aa1a593328653441d9d653e5e04340">◆ </a></span>MPL3115_CTRL_REG2_LOAD_OUTPUT_MASK</h2> 1225 1226<div class="memitem"> 1227<div class="memproto"> 1228 <table class="memname"> 1229 <tr> 1230 <td class="memname">#define MPL3115_CTRL_REG2_LOAD_OUTPUT_MASK   ((uint8_t) 0x20)</td> 1231 </tr> 1232 </table> 1233</div><div class="memdoc"> 1234 1235<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00922">922</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1236 1237</div> 1238</div> 1239<a id="a478ae73b0dbf47d441023466588ea42b"></a> 1240<h2 class="memtitle"><span class="permalink"><a href="#a478ae73b0dbf47d441023466588ea42b">◆ </a></span>MPL3115_CTRL_REG2_LOAD_OUTPUT_NXT_VAL</h2> 1241 1242<div class="memitem"> 1243<div class="memproto"> 1244 <table class="memname"> 1245 <tr> 1246 <td class="memname">#define MPL3115_CTRL_REG2_LOAD_OUTPUT_NXT_VAL   ((uint8_t) 0x20) /* The next values of OUT_P/OUT_T are used to set the */</td> 1247 </tr> 1248 </table> 1249</div><div class="memdoc"> 1250 1251<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00934">934</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1252 1253</div> 1254</div> 1255<a id="a04536602bd3a5c9dbf376d5b2bc4ae12"></a> 1256<h2 class="memtitle"><span class="permalink"><a href="#a04536602bd3a5c9dbf376d5b2bc4ae12">◆ </a></span>MPL3115_CTRL_REG2_LOAD_OUTPUT_SHIFT</h2> 1257 1258<div class="memitem"> 1259<div class="memproto"> 1260 <table class="memname"> 1261 <tr> 1262 <td class="memname">#define MPL3115_CTRL_REG2_LOAD_OUTPUT_SHIFT   ((uint8_t) 5)</td> 1263 </tr> 1264 </table> 1265</div><div class="memdoc"> 1266 1267<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00923">923</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1268 1269</div> 1270</div> 1271<a id="ac28df118faf0fe967f92fb3a67cc5770"></a> 1272<h2 class="memtitle"><span class="permalink"><a href="#ac28df118faf0fe967f92fb3a67cc5770">◆ </a></span>MPL3115_CTRL_REG2_ST_MASK</h2> 1273 1274<div class="memitem"> 1275<div class="memproto"> 1276 <table class="memname"> 1277 <tr> 1278 <td class="memname">#define MPL3115_CTRL_REG2_ST_MASK   ((uint8_t) 0x0F)</td> 1279 </tr> 1280 </table> 1281</div><div class="memdoc"> 1282 1283<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00916">916</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1284 1285</div> 1286</div> 1287<a id="a3f041ad8b3d9850002dbdea3fc082e41"></a> 1288<h2 class="memtitle"><span class="permalink"><a href="#a3f041ad8b3d9850002dbdea3fc082e41">◆ </a></span>MPL3115_CTRL_REG2_ST_SHIFT</h2> 1289 1290<div class="memitem"> 1291<div class="memproto"> 1292 <table class="memname"> 1293 <tr> 1294 <td class="memname">#define MPL3115_CTRL_REG2_ST_SHIFT   ((uint8_t) 0)</td> 1295 </tr> 1296 </table> 1297</div><div class="memdoc"> 1298 1299<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00917">917</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1300 1301</div> 1302</div> 1303<a id="aaf5258c31326fded1409a49ee648fe0c"></a> 1304<h2 class="memtitle"><span class="permalink"><a href="#aaf5258c31326fded1409a49ee648fe0c">◆ </a></span>MPL3115_CTRL_REG3_IPOL1_HIGH</h2> 1305 1306<div class="memitem"> 1307<div class="memproto"> 1308 <table class="memname"> 1309 <tr> 1310 <td class="memname">#define MPL3115_CTRL_REG3_IPOL1_HIGH   ((uint8_t) 0x20) /* Active high. */</td> 1311 </tr> 1312 </table> 1313</div><div class="memdoc"> 1314 1315<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00990">990</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1316 1317</div> 1318</div> 1319<a id="a9242852e558cb832b28a80c47774f442"></a> 1320<h2 class="memtitle"><span class="permalink"><a href="#a9242852e558cb832b28a80c47774f442">◆ </a></span>MPL3115_CTRL_REG3_IPOL1_LOW</h2> 1321 1322<div class="memitem"> 1323<div class="memproto"> 1324 <table class="memname"> 1325 <tr> 1326 <td class="memname">#define MPL3115_CTRL_REG3_IPOL1_LOW   ((uint8_t) 0x00) /* Active low. */</td> 1327 </tr> 1328 </table> 1329</div><div class="memdoc"> 1330 1331<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00989">989</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1332 1333</div> 1334</div> 1335<a id="aa76fda3edf527d0ffc037f79f3835223"></a> 1336<h2 class="memtitle"><span class="permalink"><a href="#aa76fda3edf527d0ffc037f79f3835223">◆ </a></span>MPL3115_CTRL_REG3_IPOL1_MASK</h2> 1337 1338<div class="memitem"> 1339<div class="memproto"> 1340 <table class="memname"> 1341 <tr> 1342 <td class="memname">#define MPL3115_CTRL_REG3_IPOL1_MASK   ((uint8_t) 0x20)</td> 1343 </tr> 1344 </table> 1345</div><div class="memdoc"> 1346 1347<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00976">976</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1348 1349</div> 1350</div> 1351<a id="a9f1b5755605a00c812461539395a65fa"></a> 1352<h2 class="memtitle"><span class="permalink"><a href="#a9f1b5755605a00c812461539395a65fa">◆ </a></span>MPL3115_CTRL_REG3_IPOL1_SHIFT</h2> 1353 1354<div class="memitem"> 1355<div class="memproto"> 1356 <table class="memname"> 1357 <tr> 1358 <td class="memname">#define MPL3115_CTRL_REG3_IPOL1_SHIFT   ((uint8_t) 5)</td> 1359 </tr> 1360 </table> 1361</div><div class="memdoc"> 1362 1363<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00977">977</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1364 1365</div> 1366</div> 1367<a id="a8d60ccdc1ec80c7322fa5e19452267a1"></a> 1368<h2 class="memtitle"><span class="permalink"><a href="#a8d60ccdc1ec80c7322fa5e19452267a1">◆ </a></span>MPL3115_CTRL_REG3_IPOL2_HIGH</h2> 1369 1370<div class="memitem"> 1371<div class="memproto"> 1372 <table class="memname"> 1373 <tr> 1374 <td class="memname">#define MPL3115_CTRL_REG3_IPOL2_HIGH   ((uint8_t) 0x02) /* Active high. */</td> 1375 </tr> 1376 </table> 1377</div><div class="memdoc"> 1378 1379<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00986">986</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1380 1381</div> 1382</div> 1383<a id="aeda48cd09627d42182204754788ec21d"></a> 1384<h2 class="memtitle"><span class="permalink"><a href="#aeda48cd09627d42182204754788ec21d">◆ </a></span>MPL3115_CTRL_REG3_IPOL2_LOW</h2> 1385 1386<div class="memitem"> 1387<div class="memproto"> 1388 <table class="memname"> 1389 <tr> 1390 <td class="memname">#define MPL3115_CTRL_REG3_IPOL2_LOW   ((uint8_t) 0x00) /* Active low. */</td> 1391 </tr> 1392 </table> 1393</div><div class="memdoc"> 1394 1395<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00985">985</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1396 1397</div> 1398</div> 1399<a id="ab136feb305e2c502ffbf809ccbd76624"></a> 1400<h2 class="memtitle"><span class="permalink"><a href="#ab136feb305e2c502ffbf809ccbd76624">◆ </a></span>MPL3115_CTRL_REG3_IPOL2_MASK</h2> 1401 1402<div class="memitem"> 1403<div class="memproto"> 1404 <table class="memname"> 1405 <tr> 1406 <td class="memname">#define MPL3115_CTRL_REG3_IPOL2_MASK   ((uint8_t) 0x02)</td> 1407 </tr> 1408 </table> 1409</div><div class="memdoc"> 1410 1411<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00970">970</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1412 1413</div> 1414</div> 1415<a id="ac7ca0f927496474dd4d18111399ab0ec"></a> 1416<h2 class="memtitle"><span class="permalink"><a href="#ac7ca0f927496474dd4d18111399ab0ec">◆ </a></span>MPL3115_CTRL_REG3_IPOL2_SHIFT</h2> 1417 1418<div class="memitem"> 1419<div class="memproto"> 1420 <table class="memname"> 1421 <tr> 1422 <td class="memname">#define MPL3115_CTRL_REG3_IPOL2_SHIFT   ((uint8_t) 1)</td> 1423 </tr> 1424 </table> 1425</div><div class="memdoc"> 1426 1427<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00971">971</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1428 1429</div> 1430</div> 1431<a id="a413f89c315b706fb11e803199fd604f4"></a> 1432<h2 class="memtitle"><span class="permalink"><a href="#a413f89c315b706fb11e803199fd604f4">◆ </a></span>MPL3115_CTRL_REG3_PP_OD1_INTPULLUP</h2> 1433 1434<div class="memitem"> 1435<div class="memproto"> 1436 <table class="memname"> 1437 <tr> 1438 <td class="memname">#define MPL3115_CTRL_REG3_PP_OD1_INTPULLUP   ((uint8_t) 0x00) /* Internal Pull-up. */</td> 1439 </tr> 1440 </table> 1441</div><div class="memdoc"> 1442 1443<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00987">987</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1444 1445</div> 1446</div> 1447<a id="a8bca48cb65f20cede39710be553a7a5f"></a> 1448<h2 class="memtitle"><span class="permalink"><a href="#a8bca48cb65f20cede39710be553a7a5f">◆ </a></span>MPL3115_CTRL_REG3_PP_OD1_MASK</h2> 1449 1450<div class="memitem"> 1451<div class="memproto"> 1452 <table class="memname"> 1453 <tr> 1454 <td class="memname">#define MPL3115_CTRL_REG3_PP_OD1_MASK   ((uint8_t) 0x10)</td> 1455 </tr> 1456 </table> 1457</div><div class="memdoc"> 1458 1459<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00973">973</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1460 1461</div> 1462</div> 1463<a id="a72ec900ec2d8cf10e4ff389ccaf9dc51"></a> 1464<h2 class="memtitle"><span class="permalink"><a href="#a72ec900ec2d8cf10e4ff389ccaf9dc51">◆ </a></span>MPL3115_CTRL_REG3_PP_OD1_OPENDRAIN</h2> 1465 1466<div class="memitem"> 1467<div class="memproto"> 1468 <table class="memname"> 1469 <tr> 1470 <td class="memname">#define MPL3115_CTRL_REG3_PP_OD1_OPENDRAIN   ((uint8_t) 0x10) /* Open drain. */</td> 1471 </tr> 1472 </table> 1473</div><div class="memdoc"> 1474 1475<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00988">988</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1476 1477</div> 1478</div> 1479<a id="a8ce84a3b128750420be0e169aec28973"></a> 1480<h2 class="memtitle"><span class="permalink"><a href="#a8ce84a3b128750420be0e169aec28973">◆ </a></span>MPL3115_CTRL_REG3_PP_OD1_SHIFT</h2> 1481 1482<div class="memitem"> 1483<div class="memproto"> 1484 <table class="memname"> 1485 <tr> 1486 <td class="memname">#define MPL3115_CTRL_REG3_PP_OD1_SHIFT   ((uint8_t) 4)</td> 1487 </tr> 1488 </table> 1489</div><div class="memdoc"> 1490 1491<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00974">974</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1492 1493</div> 1494</div> 1495<a id="aa05acf4d6326c3f0746049ab24fd3490"></a> 1496<h2 class="memtitle"><span class="permalink"><a href="#aa05acf4d6326c3f0746049ab24fd3490">◆ </a></span>MPL3115_CTRL_REG3_PP_OD2_INTPULLUP</h2> 1497 1498<div class="memitem"> 1499<div class="memproto"> 1500 <table class="memname"> 1501 <tr> 1502 <td class="memname">#define MPL3115_CTRL_REG3_PP_OD2_INTPULLUP   ((uint8_t) 0x00) /* Internal Pull-up. */</td> 1503 </tr> 1504 </table> 1505</div><div class="memdoc"> 1506 1507<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00983">983</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1508 1509</div> 1510</div> 1511<a id="a5d23c6542bc024d473fea4db2a096825"></a> 1512<h2 class="memtitle"><span class="permalink"><a href="#a5d23c6542bc024d473fea4db2a096825">◆ </a></span>MPL3115_CTRL_REG3_PP_OD2_MASK</h2> 1513 1514<div class="memitem"> 1515<div class="memproto"> 1516 <table class="memname"> 1517 <tr> 1518 <td class="memname">#define MPL3115_CTRL_REG3_PP_OD2_MASK   ((uint8_t) 0x01)</td> 1519 </tr> 1520 </table> 1521</div><div class="memdoc"> 1522 1523<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00967">967</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1524 1525</div> 1526</div> 1527<a id="a03ca554abae73e96f182f5b7010c5e9f"></a> 1528<h2 class="memtitle"><span class="permalink"><a href="#a03ca554abae73e96f182f5b7010c5e9f">◆ </a></span>MPL3115_CTRL_REG3_PP_OD2_OPENDRAIN</h2> 1529 1530<div class="memitem"> 1531<div class="memproto"> 1532 <table class="memname"> 1533 <tr> 1534 <td class="memname">#define MPL3115_CTRL_REG3_PP_OD2_OPENDRAIN   ((uint8_t) 0x01) /* Open drain. */</td> 1535 </tr> 1536 </table> 1537</div><div class="memdoc"> 1538 1539<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00984">984</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1540 1541</div> 1542</div> 1543<a id="a414d818752de47b55726dbdb7d6cc750"></a> 1544<h2 class="memtitle"><span class="permalink"><a href="#a414d818752de47b55726dbdb7d6cc750">◆ </a></span>MPL3115_CTRL_REG3_PP_OD2_SHIFT</h2> 1545 1546<div class="memitem"> 1547<div class="memproto"> 1548 <table class="memname"> 1549 <tr> 1550 <td class="memname">#define MPL3115_CTRL_REG3_PP_OD2_SHIFT   ((uint8_t) 0)</td> 1551 </tr> 1552 </table> 1553</div><div class="memdoc"> 1554 1555<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00968">968</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1556 1557</div> 1558</div> 1559<a id="accb4389f4d4a673144fb17fc8bcfe41b"></a> 1560<h2 class="memtitle"><span class="permalink"><a href="#accb4389f4d4a673144fb17fc8bcfe41b">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_DRDY_INTDISABLED</h2> 1561 1562<div class="memitem"> 1563<div class="memproto"> 1564 <table class="memname"> 1565 <tr> 1566 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_DRDY_INTDISABLED   ((uint8_t) 0x00) /* Data Ready interrupt disabled. */</td> 1567 </tr> 1568 </table> 1569</div><div class="memdoc"> 1570 1571<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01069">1069</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1572 1573</div> 1574</div> 1575<a id="a73ea011b11f8ed1a45968aceb8d77e00"></a> 1576<h2 class="memtitle"><span class="permalink"><a href="#a73ea011b11f8ed1a45968aceb8d77e00">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_DRDY_INTENABLED</h2> 1577 1578<div class="memitem"> 1579<div class="memproto"> 1580 <table class="memname"> 1581 <tr> 1582 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_DRDY_INTENABLED   ((uint8_t) 0x80) /* Data Ready interrupt enabled. */</td> 1583 </tr> 1584 </table> 1585</div><div class="memdoc"> 1586 1587<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01070">1070</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1588 1589</div> 1590</div> 1591<a id="ac123e0d313722ab43f6f5ea921b967b5"></a> 1592<h2 class="memtitle"><span class="permalink"><a href="#ac123e0d313722ab43f6f5ea921b967b5">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_DRDY_MASK</h2> 1593 1594<div class="memitem"> 1595<div class="memproto"> 1596 <table class="memname"> 1597 <tr> 1598 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_DRDY_MASK   ((uint8_t) 0x80)</td> 1599 </tr> 1600 </table> 1601</div><div class="memdoc"> 1602 1603<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01048">1048</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1604 1605</div> 1606</div> 1607<a id="a3fa0d84d0b99924be238d670c01559a7"></a> 1608<h2 class="memtitle"><span class="permalink"><a href="#a3fa0d84d0b99924be238d670c01559a7">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_DRDY_SHIFT</h2> 1609 1610<div class="memitem"> 1611<div class="memproto"> 1612 <table class="memname"> 1613 <tr> 1614 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_DRDY_SHIFT   ((uint8_t) 7)</td> 1615 </tr> 1616 </table> 1617</div><div class="memdoc"> 1618 1619<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01049">1049</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1620 1621</div> 1622</div> 1623<a id="ae98ea6ba4a54643b93a0ed874b54a900"></a> 1624<h2 class="memtitle"><span class="permalink"><a href="#ae98ea6ba4a54643b93a0ed874b54a900">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_FIFO_INTDISABLED</h2> 1625 1626<div class="memitem"> 1627<div class="memproto"> 1628 <table class="memname"> 1629 <tr> 1630 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_FIFO_INTDISABLED   ((uint8_t) 0x00) /* FIFO interrupt disabled. */</td> 1631 </tr> 1632 </table> 1633</div><div class="memdoc"> 1634 1635<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01067">1067</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1636 1637</div> 1638</div> 1639<a id="a076dcc85ccca69a56fab3c61e00f9568"></a> 1640<h2 class="memtitle"><span class="permalink"><a href="#a076dcc85ccca69a56fab3c61e00f9568">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_FIFO_INTENABLED</h2> 1641 1642<div class="memitem"> 1643<div class="memproto"> 1644 <table class="memname"> 1645 <tr> 1646 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_FIFO_INTENABLED   ((uint8_t) 0x40) /* FIFO interrupt enabled */</td> 1647 </tr> 1648 </table> 1649</div><div class="memdoc"> 1650 1651<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01068">1068</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1652 1653</div> 1654</div> 1655<a id="ad14ca9932c39cb742826ca5739a1def5"></a> 1656<h2 class="memtitle"><span class="permalink"><a href="#ad14ca9932c39cb742826ca5739a1def5">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_FIFO_MASK</h2> 1657 1658<div class="memitem"> 1659<div class="memproto"> 1660 <table class="memname"> 1661 <tr> 1662 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_FIFO_MASK   ((uint8_t) 0x40)</td> 1663 </tr> 1664 </table> 1665</div><div class="memdoc"> 1666 1667<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01045">1045</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1668 1669</div> 1670</div> 1671<a id="ab4647c31a23cf18db4a0deb3e7a15226"></a> 1672<h2 class="memtitle"><span class="permalink"><a href="#ab4647c31a23cf18db4a0deb3e7a15226">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_FIFO_SHIFT</h2> 1673 1674<div class="memitem"> 1675<div class="memproto"> 1676 <table class="memname"> 1677 <tr> 1678 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_FIFO_SHIFT   ((uint8_t) 6)</td> 1679 </tr> 1680 </table> 1681</div><div class="memdoc"> 1682 1683<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01046">1046</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1684 1685</div> 1686</div> 1687<a id="a9b52878844cf9194ffdb409bb0618184"></a> 1688<h2 class="memtitle"><span class="permalink"><a href="#a9b52878844cf9194ffdb409bb0618184">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_PCHG_INTDISABLED</h2> 1689 1690<div class="memitem"> 1691<div class="memproto"> 1692 <table class="memname"> 1693 <tr> 1694 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_PCHG_INTDISABLED   ((uint8_t) 0x00) /* Pressure Change interrupt disabled. */</td> 1695 </tr> 1696 </table> 1697</div><div class="memdoc"> 1698 1699<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01057">1057</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1700 1701</div> 1702</div> 1703<a id="a52353637f2b04c37b0290fd8ea767d3d"></a> 1704<h2 class="memtitle"><span class="permalink"><a href="#a52353637f2b04c37b0290fd8ea767d3d">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_PCHG_INTENABLED</h2> 1705 1706<div class="memitem"> 1707<div class="memproto"> 1708 <table class="memname"> 1709 <tr> 1710 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_PCHG_INTENABLED   ((uint8_t) 0x02) /* Pressure Change interrupt enabled */</td> 1711 </tr> 1712 </table> 1713</div><div class="memdoc"> 1714 1715<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01058">1058</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1716 1717</div> 1718</div> 1719<a id="a81e0550a7d14684ff436416d1a0754a2"></a> 1720<h2 class="memtitle"><span class="permalink"><a href="#a81e0550a7d14684ff436416d1a0754a2">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_PCHG_MASK</h2> 1721 1722<div class="memitem"> 1723<div class="memproto"> 1724 <table class="memname"> 1725 <tr> 1726 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_PCHG_MASK   ((uint8_t) 0x02)</td> 1727 </tr> 1728 </table> 1729</div><div class="memdoc"> 1730 1731<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01030">1030</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1732 1733</div> 1734</div> 1735<a id="af51c90fb7f494a077f753a056b431d09"></a> 1736<h2 class="memtitle"><span class="permalink"><a href="#af51c90fb7f494a077f753a056b431d09">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_PCHG_SHIFT</h2> 1737 1738<div class="memitem"> 1739<div class="memproto"> 1740 <table class="memname"> 1741 <tr> 1742 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_PCHG_SHIFT   ((uint8_t) 1)</td> 1743 </tr> 1744 </table> 1745</div><div class="memdoc"> 1746 1747<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01031">1031</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1748 1749</div> 1750</div> 1751<a id="a49d4018c5ef4b65f018f580453f57e81"></a> 1752<h2 class="memtitle"><span class="permalink"><a href="#a49d4018c5ef4b65f018f580453f57e81">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_PTH_INTDISABLED</h2> 1753 1754<div class="memitem"> 1755<div class="memproto"> 1756 <table class="memname"> 1757 <tr> 1758 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_PTH_INTDISABLED   ((uint8_t) 0x00) /* Pressure Threshold interrupt disabled. */</td> 1759 </tr> 1760 </table> 1761</div><div class="memdoc"> 1762 1763<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01061">1061</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1764 1765</div> 1766</div> 1767<a id="a84b8c8b4dc8942ece843bfea32f794ad"></a> 1768<h2 class="memtitle"><span class="permalink"><a href="#a84b8c8b4dc8942ece843bfea32f794ad">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_PTH_INTENABLED</h2> 1769 1770<div class="memitem"> 1771<div class="memproto"> 1772 <table class="memname"> 1773 <tr> 1774 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_PTH_INTENABLED   ((uint8_t) 0x08) /* Pressure Threshold interrupt enabled */</td> 1775 </tr> 1776 </table> 1777</div><div class="memdoc"> 1778 1779<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01062">1062</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1780 1781</div> 1782</div> 1783<a id="a804700bbee91fda1cf2bfc7164f32ffd"></a> 1784<h2 class="memtitle"><span class="permalink"><a href="#a804700bbee91fda1cf2bfc7164f32ffd">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_PTH_MASK</h2> 1785 1786<div class="memitem"> 1787<div class="memproto"> 1788 <table class="memname"> 1789 <tr> 1790 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_PTH_MASK   ((uint8_t) 0x08)</td> 1791 </tr> 1792 </table> 1793</div><div class="memdoc"> 1794 1795<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01036">1036</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1796 1797</div> 1798</div> 1799<a id="a0615ee884d52be98f9bf8ddb0b4a3b19"></a> 1800<h2 class="memtitle"><span class="permalink"><a href="#a0615ee884d52be98f9bf8ddb0b4a3b19">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_PTH_SHIFT</h2> 1801 1802<div class="memitem"> 1803<div class="memproto"> 1804 <table class="memname"> 1805 <tr> 1806 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_PTH_SHIFT   ((uint8_t) 3)</td> 1807 </tr> 1808 </table> 1809</div><div class="memdoc"> 1810 1811<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01037">1037</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1812 1813</div> 1814</div> 1815<a id="a410164d8d3c92ca04ffa293de80b9d06"></a> 1816<h2 class="memtitle"><span class="permalink"><a href="#a410164d8d3c92ca04ffa293de80b9d06">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_PW_INTDISABLED</h2> 1817 1818<div class="memitem"> 1819<div class="memproto"> 1820 <table class="memname"> 1821 <tr> 1822 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_PW_INTDISABLED   ((uint8_t) 0x00) /* Pressure window interrupt disabled. */</td> 1823 </tr> 1824 </table> 1825</div><div class="memdoc"> 1826 1827<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01065">1065</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1828 1829</div> 1830</div> 1831<a id="a75d3aac3d842293265ddc4780f85ba07"></a> 1832<h2 class="memtitle"><span class="permalink"><a href="#a75d3aac3d842293265ddc4780f85ba07">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_PW_INTENABLED</h2> 1833 1834<div class="memitem"> 1835<div class="memproto"> 1836 <table class="memname"> 1837 <tr> 1838 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_PW_INTENABLED   ((uint8_t) 0x20) /* Pressure window interrupt enabled */</td> 1839 </tr> 1840 </table> 1841</div><div class="memdoc"> 1842 1843<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01066">1066</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1844 1845</div> 1846</div> 1847<a id="a5049495fbac4f03ecfb5d40823d569f1"></a> 1848<h2 class="memtitle"><span class="permalink"><a href="#a5049495fbac4f03ecfb5d40823d569f1">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_PW_MASK</h2> 1849 1850<div class="memitem"> 1851<div class="memproto"> 1852 <table class="memname"> 1853 <tr> 1854 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_PW_MASK   ((uint8_t) 0x20)</td> 1855 </tr> 1856 </table> 1857</div><div class="memdoc"> 1858 1859<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01042">1042</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1860 1861</div> 1862</div> 1863<a id="a5884a4f5ff4df445c47cc2a328d53c30"></a> 1864<h2 class="memtitle"><span class="permalink"><a href="#a5884a4f5ff4df445c47cc2a328d53c30">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_PW_SHIFT</h2> 1865 1866<div class="memitem"> 1867<div class="memproto"> 1868 <table class="memname"> 1869 <tr> 1870 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_PW_SHIFT   ((uint8_t) 5)</td> 1871 </tr> 1872 </table> 1873</div><div class="memdoc"> 1874 1875<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01043">1043</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1876 1877</div> 1878</div> 1879<a id="a18a23fbdb2a35d45ace89497253701e7"></a> 1880<h2 class="memtitle"><span class="permalink"><a href="#a18a23fbdb2a35d45ace89497253701e7">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_TCHG_INTDISABLED</h2> 1881 1882<div class="memitem"> 1883<div class="memproto"> 1884 <table class="memname"> 1885 <tr> 1886 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_TCHG_INTDISABLED   ((uint8_t) 0x00) /* Temperature Change interrupt disabled. */</td> 1887 </tr> 1888 </table> 1889</div><div class="memdoc"> 1890 1891<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01055">1055</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1892 1893</div> 1894</div> 1895<a id="ac064637fcc83659fc918e3cc79da67ea"></a> 1896<h2 class="memtitle"><span class="permalink"><a href="#ac064637fcc83659fc918e3cc79da67ea">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_TCHG_INTENABLED</h2> 1897 1898<div class="memitem"> 1899<div class="memproto"> 1900 <table class="memname"> 1901 <tr> 1902 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_TCHG_INTENABLED   ((uint8_t) 0x01) /* Temperature Change interrupt enabled */</td> 1903 </tr> 1904 </table> 1905</div><div class="memdoc"> 1906 1907<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01056">1056</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1908 1909</div> 1910</div> 1911<a id="a90378a64fedf62f36095e6cc6acd8c46"></a> 1912<h2 class="memtitle"><span class="permalink"><a href="#a90378a64fedf62f36095e6cc6acd8c46">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_TCHG_MASK</h2> 1913 1914<div class="memitem"> 1915<div class="memproto"> 1916 <table class="memname"> 1917 <tr> 1918 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_TCHG_MASK   ((uint8_t) 0x01)</td> 1919 </tr> 1920 </table> 1921</div><div class="memdoc"> 1922 1923<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01027">1027</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1924 1925</div> 1926</div> 1927<a id="af18eb1070286833ff979aa1441fafd90"></a> 1928<h2 class="memtitle"><span class="permalink"><a href="#af18eb1070286833ff979aa1441fafd90">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_TCHG_SHIFT</h2> 1929 1930<div class="memitem"> 1931<div class="memproto"> 1932 <table class="memname"> 1933 <tr> 1934 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_TCHG_SHIFT   ((uint8_t) 0)</td> 1935 </tr> 1936 </table> 1937</div><div class="memdoc"> 1938 1939<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01028">1028</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1940 1941</div> 1942</div> 1943<a id="aea607846f6f40ab0f4b2191b8c78f1d7"></a> 1944<h2 class="memtitle"><span class="permalink"><a href="#aea607846f6f40ab0f4b2191b8c78f1d7">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_TTH_INTDISABLED</h2> 1945 1946<div class="memitem"> 1947<div class="memproto"> 1948 <table class="memname"> 1949 <tr> 1950 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_TTH_INTDISABLED   ((uint8_t) 0x00) /* Temperature Threshold interrupt disabled. */</td> 1951 </tr> 1952 </table> 1953</div><div class="memdoc"> 1954 1955<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01059">1059</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1956 1957</div> 1958</div> 1959<a id="af2387e0a1e448d982b69be8fac4087be"></a> 1960<h2 class="memtitle"><span class="permalink"><a href="#af2387e0a1e448d982b69be8fac4087be">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_TTH_INTENABLED</h2> 1961 1962<div class="memitem"> 1963<div class="memproto"> 1964 <table class="memname"> 1965 <tr> 1966 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_TTH_INTENABLED   ((uint8_t) 0x04) /* Temperature Threshold interrupt enabled */</td> 1967 </tr> 1968 </table> 1969</div><div class="memdoc"> 1970 1971<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01060">1060</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1972 1973</div> 1974</div> 1975<a id="ad64338f1c610e12469afdf84fb3b7b3f"></a> 1976<h2 class="memtitle"><span class="permalink"><a href="#ad64338f1c610e12469afdf84fb3b7b3f">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_TTH_MASK</h2> 1977 1978<div class="memitem"> 1979<div class="memproto"> 1980 <table class="memname"> 1981 <tr> 1982 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_TTH_MASK   ((uint8_t) 0x04)</td> 1983 </tr> 1984 </table> 1985</div><div class="memdoc"> 1986 1987<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01033">1033</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 1988 1989</div> 1990</div> 1991<a id="a9eb6447b9d75614446db95de9f2ac8fc"></a> 1992<h2 class="memtitle"><span class="permalink"><a href="#a9eb6447b9d75614446db95de9f2ac8fc">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_TTH_SHIFT</h2> 1993 1994<div class="memitem"> 1995<div class="memproto"> 1996 <table class="memname"> 1997 <tr> 1998 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_TTH_SHIFT   ((uint8_t) 2)</td> 1999 </tr> 2000 </table> 2001</div><div class="memdoc"> 2002 2003<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01034">1034</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2004 2005</div> 2006</div> 2007<a id="a9eb86dcc319611cf2b1dfe0663db864f"></a> 2008<h2 class="memtitle"><span class="permalink"><a href="#a9eb86dcc319611cf2b1dfe0663db864f">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_TW_INTDISABLED</h2> 2009 2010<div class="memitem"> 2011<div class="memproto"> 2012 <table class="memname"> 2013 <tr> 2014 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_TW_INTDISABLED   ((uint8_t) 0x00) /* Temperature window interrupt disabled. */</td> 2015 </tr> 2016 </table> 2017</div><div class="memdoc"> 2018 2019<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01063">1063</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2020 2021</div> 2022</div> 2023<a id="a7cbe54536f810883d9e774c9211ab4b2"></a> 2024<h2 class="memtitle"><span class="permalink"><a href="#a7cbe54536f810883d9e774c9211ab4b2">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_TW_INTENABLED</h2> 2025 2026<div class="memitem"> 2027<div class="memproto"> 2028 <table class="memname"> 2029 <tr> 2030 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_TW_INTENABLED   ((uint8_t) 0x10) /* Temperature window interrupt enabled */</td> 2031 </tr> 2032 </table> 2033</div><div class="memdoc"> 2034 2035<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01064">1064</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2036 2037</div> 2038</div> 2039<a id="aa91973eb0a48bfdd391ac67b6e6a9d4c"></a> 2040<h2 class="memtitle"><span class="permalink"><a href="#aa91973eb0a48bfdd391ac67b6e6a9d4c">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_TW_MASK</h2> 2041 2042<div class="memitem"> 2043<div class="memproto"> 2044 <table class="memname"> 2045 <tr> 2046 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_TW_MASK   ((uint8_t) 0x10)</td> 2047 </tr> 2048 </table> 2049</div><div class="memdoc"> 2050 2051<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01039">1039</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2052 2053</div> 2054</div> 2055<a id="ad79c13ed815215dfae41a484499634dd"></a> 2056<h2 class="memtitle"><span class="permalink"><a href="#ad79c13ed815215dfae41a484499634dd">◆ </a></span>MPL3115_CTRL_REG4_INT_EN_TW_SHIFT</h2> 2057 2058<div class="memitem"> 2059<div class="memproto"> 2060 <table class="memname"> 2061 <tr> 2062 <td class="memname">#define MPL3115_CTRL_REG4_INT_EN_TW_SHIFT   ((uint8_t) 4)</td> 2063 </tr> 2064 </table> 2065</div><div class="memdoc"> 2066 2067<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01040">1040</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2068 2069</div> 2070</div> 2071<a id="a1d1149a27993ab77cfb7e15388ef3eed"></a> 2072<h2 class="memtitle"><span class="permalink"><a href="#a1d1149a27993ab77cfb7e15388ef3eed">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_DRDY_INT1</h2> 2073 2074<div class="memitem"> 2075<div class="memproto"> 2076 <table class="memname"> 2077 <tr> 2078 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_DRDY_INT1   ((uint8_t) 0x80) /* Interrupt is routed to INT1 Pin. */</td> 2079 </tr> 2080 </table> 2081</div><div class="memdoc"> 2082 2083<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01150">1150</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2084 2085</div> 2086</div> 2087<a id="a25da6c22118996ce8510d586b35ed41f"></a> 2088<h2 class="memtitle"><span class="permalink"><a href="#a25da6c22118996ce8510d586b35ed41f">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_DRDY_INT2</h2> 2089 2090<div class="memitem"> 2091<div class="memproto"> 2092 <table class="memname"> 2093 <tr> 2094 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_DRDY_INT2   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td> 2095 </tr> 2096 </table> 2097</div><div class="memdoc"> 2098 2099<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01149">1149</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2100 2101</div> 2102</div> 2103<a id="a2c09df333671ff1a425a7fb2910b3503"></a> 2104<h2 class="memtitle"><span class="permalink"><a href="#a2c09df333671ff1a425a7fb2910b3503">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_DRDY_MASK</h2> 2105 2106<div class="memitem"> 2107<div class="memproto"> 2108 <table class="memname"> 2109 <tr> 2110 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_DRDY_MASK   ((uint8_t) 0x80)</td> 2111 </tr> 2112 </table> 2113</div><div class="memdoc"> 2114 2115<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01128">1128</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2116 2117</div> 2118</div> 2119<a id="aca663796294f73dc6c74f0f48a84ecc0"></a> 2120<h2 class="memtitle"><span class="permalink"><a href="#aca663796294f73dc6c74f0f48a84ecc0">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_DRDY_SHIFT</h2> 2121 2122<div class="memitem"> 2123<div class="memproto"> 2124 <table class="memname"> 2125 <tr> 2126 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_DRDY_SHIFT   ((uint8_t) 7)</td> 2127 </tr> 2128 </table> 2129</div><div class="memdoc"> 2130 2131<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01129">1129</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2132 2133</div> 2134</div> 2135<a id="ad39882a49fcd082b41b63ae72c49f935"></a> 2136<h2 class="memtitle"><span class="permalink"><a href="#ad39882a49fcd082b41b63ae72c49f935">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_FIFO_INT1</h2> 2137 2138<div class="memitem"> 2139<div class="memproto"> 2140 <table class="memname"> 2141 <tr> 2142 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_FIFO_INT1   ((uint8_t) 0x40) /* Interrupt is routed to INT1 Pin. */</td> 2143 </tr> 2144 </table> 2145</div><div class="memdoc"> 2146 2147<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01148">1148</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2148 2149</div> 2150</div> 2151<a id="a9e43bbb0f00c1a86bde24836b1685276"></a> 2152<h2 class="memtitle"><span class="permalink"><a href="#a9e43bbb0f00c1a86bde24836b1685276">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_FIFO_INT2</h2> 2153 2154<div class="memitem"> 2155<div class="memproto"> 2156 <table class="memname"> 2157 <tr> 2158 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_FIFO_INT2   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td> 2159 </tr> 2160 </table> 2161</div><div class="memdoc"> 2162 2163<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01147">1147</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2164 2165</div> 2166</div> 2167<a id="a839cd4bef0fef992432fa9caa968fbd0"></a> 2168<h2 class="memtitle"><span class="permalink"><a href="#a839cd4bef0fef992432fa9caa968fbd0">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_FIFO_MASK</h2> 2169 2170<div class="memitem"> 2171<div class="memproto"> 2172 <table class="memname"> 2173 <tr> 2174 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_FIFO_MASK   ((uint8_t) 0x40)</td> 2175 </tr> 2176 </table> 2177</div><div class="memdoc"> 2178 2179<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01125">1125</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2180 2181</div> 2182</div> 2183<a id="a01a3b52419a42e920cc285c0e253934f"></a> 2184<h2 class="memtitle"><span class="permalink"><a href="#a01a3b52419a42e920cc285c0e253934f">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_FIFO_SHIFT</h2> 2185 2186<div class="memitem"> 2187<div class="memproto"> 2188 <table class="memname"> 2189 <tr> 2190 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_FIFO_SHIFT   ((uint8_t) 6)</td> 2191 </tr> 2192 </table> 2193</div><div class="memdoc"> 2194 2195<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01126">1126</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2196 2197</div> 2198</div> 2199<a id="a0a91f8481cc1b0b95ee4ae115bdc8872"></a> 2200<h2 class="memtitle"><span class="permalink"><a href="#a0a91f8481cc1b0b95ee4ae115bdc8872">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_PCHG_INT1</h2> 2201 2202<div class="memitem"> 2203<div class="memproto"> 2204 <table class="memname"> 2205 <tr> 2206 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_PCHG_INT1   ((uint8_t) 0x02) /* Interrupt is routed to INT1 Pin. */</td> 2207 </tr> 2208 </table> 2209</div><div class="memdoc"> 2210 2211<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01138">1138</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2212 2213</div> 2214</div> 2215<a id="aa37fafaa8c6efb8aa6be218977b7f90d"></a> 2216<h2 class="memtitle"><span class="permalink"><a href="#aa37fafaa8c6efb8aa6be218977b7f90d">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_PCHG_INT2</h2> 2217 2218<div class="memitem"> 2219<div class="memproto"> 2220 <table class="memname"> 2221 <tr> 2222 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_PCHG_INT2   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td> 2223 </tr> 2224 </table> 2225</div><div class="memdoc"> 2226 2227<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01137">1137</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2228 2229</div> 2230</div> 2231<a id="ae8157b3557d618b730f674ac4424e94e"></a> 2232<h2 class="memtitle"><span class="permalink"><a href="#ae8157b3557d618b730f674ac4424e94e">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_PCHG_MASK</h2> 2233 2234<div class="memitem"> 2235<div class="memproto"> 2236 <table class="memname"> 2237 <tr> 2238 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_PCHG_MASK   ((uint8_t) 0x02)</td> 2239 </tr> 2240 </table> 2241</div><div class="memdoc"> 2242 2243<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01110">1110</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2244 2245</div> 2246</div> 2247<a id="ad174e725d032ece38ddd76d5bbf83527"></a> 2248<h2 class="memtitle"><span class="permalink"><a href="#ad174e725d032ece38ddd76d5bbf83527">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_PCHG_SHIFT</h2> 2249 2250<div class="memitem"> 2251<div class="memproto"> 2252 <table class="memname"> 2253 <tr> 2254 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_PCHG_SHIFT   ((uint8_t) 1)</td> 2255 </tr> 2256 </table> 2257</div><div class="memdoc"> 2258 2259<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01111">1111</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2260 2261</div> 2262</div> 2263<a id="a1b5a3e4c2aa03a1e201bf4befc6ddf07"></a> 2264<h2 class="memtitle"><span class="permalink"><a href="#a1b5a3e4c2aa03a1e201bf4befc6ddf07">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_PTH_INT1</h2> 2265 2266<div class="memitem"> 2267<div class="memproto"> 2268 <table class="memname"> 2269 <tr> 2270 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_PTH_INT1   ((uint8_t) 0x08) /* Interrupt is routed to INT1 Pin. */</td> 2271 </tr> 2272 </table> 2273</div><div class="memdoc"> 2274 2275<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01142">1142</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2276 2277</div> 2278</div> 2279<a id="a6cf3af3bd934e7a84359f48878d730b4"></a> 2280<h2 class="memtitle"><span class="permalink"><a href="#a6cf3af3bd934e7a84359f48878d730b4">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_PTH_INT2</h2> 2281 2282<div class="memitem"> 2283<div class="memproto"> 2284 <table class="memname"> 2285 <tr> 2286 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_PTH_INT2   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td> 2287 </tr> 2288 </table> 2289</div><div class="memdoc"> 2290 2291<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01141">1141</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2292 2293</div> 2294</div> 2295<a id="a24261a2540f59d5cbffa9679341fd262"></a> 2296<h2 class="memtitle"><span class="permalink"><a href="#a24261a2540f59d5cbffa9679341fd262">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_PTH_MASK</h2> 2297 2298<div class="memitem"> 2299<div class="memproto"> 2300 <table class="memname"> 2301 <tr> 2302 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_PTH_MASK   ((uint8_t) 0x08)</td> 2303 </tr> 2304 </table> 2305</div><div class="memdoc"> 2306 2307<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01116">1116</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2308 2309</div> 2310</div> 2311<a id="aefbfdd514011ac477e3af4883c1f6290"></a> 2312<h2 class="memtitle"><span class="permalink"><a href="#aefbfdd514011ac477e3af4883c1f6290">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_PTH_SHIFT</h2> 2313 2314<div class="memitem"> 2315<div class="memproto"> 2316 <table class="memname"> 2317 <tr> 2318 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_PTH_SHIFT   ((uint8_t) 3)</td> 2319 </tr> 2320 </table> 2321</div><div class="memdoc"> 2322 2323<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01117">1117</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2324 2325</div> 2326</div> 2327<a id="a35372af04361279f84bfac9c583aa542"></a> 2328<h2 class="memtitle"><span class="permalink"><a href="#a35372af04361279f84bfac9c583aa542">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_PW_INT1</h2> 2329 2330<div class="memitem"> 2331<div class="memproto"> 2332 <table class="memname"> 2333 <tr> 2334 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_PW_INT1   ((uint8_t) 0x20) /* Interrupt is routed to INT1 Pin. */</td> 2335 </tr> 2336 </table> 2337</div><div class="memdoc"> 2338 2339<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01146">1146</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2340 2341</div> 2342</div> 2343<a id="a93b429469198933fe215257bdd77aaa8"></a> 2344<h2 class="memtitle"><span class="permalink"><a href="#a93b429469198933fe215257bdd77aaa8">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_PW_INT2</h2> 2345 2346<div class="memitem"> 2347<div class="memproto"> 2348 <table class="memname"> 2349 <tr> 2350 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_PW_INT2   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td> 2351 </tr> 2352 </table> 2353</div><div class="memdoc"> 2354 2355<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01145">1145</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2356 2357</div> 2358</div> 2359<a id="a231c3114f2b7d23a1ef6ea9bb771d9f6"></a> 2360<h2 class="memtitle"><span class="permalink"><a href="#a231c3114f2b7d23a1ef6ea9bb771d9f6">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_PW_MASK</h2> 2361 2362<div class="memitem"> 2363<div class="memproto"> 2364 <table class="memname"> 2365 <tr> 2366 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_PW_MASK   ((uint8_t) 0x20)</td> 2367 </tr> 2368 </table> 2369</div><div class="memdoc"> 2370 2371<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01122">1122</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2372 2373</div> 2374</div> 2375<a id="af9d1820b255d51ff1bfa0786709ccca4"></a> 2376<h2 class="memtitle"><span class="permalink"><a href="#af9d1820b255d51ff1bfa0786709ccca4">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_PW_SHIFT</h2> 2377 2378<div class="memitem"> 2379<div class="memproto"> 2380 <table class="memname"> 2381 <tr> 2382 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_PW_SHIFT   ((uint8_t) 5)</td> 2383 </tr> 2384 </table> 2385</div><div class="memdoc"> 2386 2387<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01123">1123</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2388 2389</div> 2390</div> 2391<a id="a34fca04f1cd640cd838f05e09be14284"></a> 2392<h2 class="memtitle"><span class="permalink"><a href="#a34fca04f1cd640cd838f05e09be14284">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_TCHG_INT1</h2> 2393 2394<div class="memitem"> 2395<div class="memproto"> 2396 <table class="memname"> 2397 <tr> 2398 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_TCHG_INT1   ((uint8_t) 0x01) /* Interrupt is routed to INT1 Pin. */</td> 2399 </tr> 2400 </table> 2401</div><div class="memdoc"> 2402 2403<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01136">1136</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2404 2405</div> 2406</div> 2407<a id="a54876a1efabc2cc7643e22f25a717107"></a> 2408<h2 class="memtitle"><span class="permalink"><a href="#a54876a1efabc2cc7643e22f25a717107">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_TCHG_INT2</h2> 2409 2410<div class="memitem"> 2411<div class="memproto"> 2412 <table class="memname"> 2413 <tr> 2414 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_TCHG_INT2   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td> 2415 </tr> 2416 </table> 2417</div><div class="memdoc"> 2418 2419<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01135">1135</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2420 2421</div> 2422</div> 2423<a id="a3504b1a3a27221296db3f859fb0b8673"></a> 2424<h2 class="memtitle"><span class="permalink"><a href="#a3504b1a3a27221296db3f859fb0b8673">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_TCHG_MASK</h2> 2425 2426<div class="memitem"> 2427<div class="memproto"> 2428 <table class="memname"> 2429 <tr> 2430 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_TCHG_MASK   ((uint8_t) 0x01)</td> 2431 </tr> 2432 </table> 2433</div><div class="memdoc"> 2434 2435<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01107">1107</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2436 2437</div> 2438</div> 2439<a id="a432fa2c8f25c6d273c33a99c66017f24"></a> 2440<h2 class="memtitle"><span class="permalink"><a href="#a432fa2c8f25c6d273c33a99c66017f24">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_TCHG_SHIFT</h2> 2441 2442<div class="memitem"> 2443<div class="memproto"> 2444 <table class="memname"> 2445 <tr> 2446 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_TCHG_SHIFT   ((uint8_t) 0)</td> 2447 </tr> 2448 </table> 2449</div><div class="memdoc"> 2450 2451<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01108">1108</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2452 2453</div> 2454</div> 2455<a id="a0c817b2729a52e7b72f8b8ca8361b1bc"></a> 2456<h2 class="memtitle"><span class="permalink"><a href="#a0c817b2729a52e7b72f8b8ca8361b1bc">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_TTH_INT1</h2> 2457 2458<div class="memitem"> 2459<div class="memproto"> 2460 <table class="memname"> 2461 <tr> 2462 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_TTH_INT1   ((uint8_t) 0x04) /* Interrupt is routed to INT1 Pin. */</td> 2463 </tr> 2464 </table> 2465</div><div class="memdoc"> 2466 2467<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01140">1140</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2468 2469</div> 2470</div> 2471<a id="a7f18da3606c0287af39ec72836475cd5"></a> 2472<h2 class="memtitle"><span class="permalink"><a href="#a7f18da3606c0287af39ec72836475cd5">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_TTH_INT2</h2> 2473 2474<div class="memitem"> 2475<div class="memproto"> 2476 <table class="memname"> 2477 <tr> 2478 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_TTH_INT2   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td> 2479 </tr> 2480 </table> 2481</div><div class="memdoc"> 2482 2483<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01139">1139</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2484 2485</div> 2486</div> 2487<a id="a812521783c42efcd69ade9cfb647d897"></a> 2488<h2 class="memtitle"><span class="permalink"><a href="#a812521783c42efcd69ade9cfb647d897">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_TTH_MASK</h2> 2489 2490<div class="memitem"> 2491<div class="memproto"> 2492 <table class="memname"> 2493 <tr> 2494 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_TTH_MASK   ((uint8_t) 0x04)</td> 2495 </tr> 2496 </table> 2497</div><div class="memdoc"> 2498 2499<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01113">1113</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2500 2501</div> 2502</div> 2503<a id="ad2314793688864239d1d6459e4433442"></a> 2504<h2 class="memtitle"><span class="permalink"><a href="#ad2314793688864239d1d6459e4433442">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_TTH_SHIFT</h2> 2505 2506<div class="memitem"> 2507<div class="memproto"> 2508 <table class="memname"> 2509 <tr> 2510 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_TTH_SHIFT   ((uint8_t) 2)</td> 2511 </tr> 2512 </table> 2513</div><div class="memdoc"> 2514 2515<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01114">1114</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2516 2517</div> 2518</div> 2519<a id="a0581750fb73190470dc0c243d3bad331"></a> 2520<h2 class="memtitle"><span class="permalink"><a href="#a0581750fb73190470dc0c243d3bad331">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_TW_INT1</h2> 2521 2522<div class="memitem"> 2523<div class="memproto"> 2524 <table class="memname"> 2525 <tr> 2526 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_TW_INT1   ((uint8_t) 0x10) /* Interrupt is routed to INT1 Pin. */</td> 2527 </tr> 2528 </table> 2529</div><div class="memdoc"> 2530 2531<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01144">1144</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2532 2533</div> 2534</div> 2535<a id="a7206aea7078ab82047e17ba4a905ad51"></a> 2536<h2 class="memtitle"><span class="permalink"><a href="#a7206aea7078ab82047e17ba4a905ad51">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_TW_INT2</h2> 2537 2538<div class="memitem"> 2539<div class="memproto"> 2540 <table class="memname"> 2541 <tr> 2542 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_TW_INT2   ((uint8_t) 0x00) /* Interrupt is routed to INT2 pin. */</td> 2543 </tr> 2544 </table> 2545</div><div class="memdoc"> 2546 2547<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01143">1143</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2548 2549</div> 2550</div> 2551<a id="a6c309bc16979148dc1c6de21dad6460b"></a> 2552<h2 class="memtitle"><span class="permalink"><a href="#a6c309bc16979148dc1c6de21dad6460b">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_TW_MASK</h2> 2553 2554<div class="memitem"> 2555<div class="memproto"> 2556 <table class="memname"> 2557 <tr> 2558 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_TW_MASK   ((uint8_t) 0x10)</td> 2559 </tr> 2560 </table> 2561</div><div class="memdoc"> 2562 2563<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01119">1119</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2564 2565</div> 2566</div> 2567<a id="a5ac72c55b2d3b5b87dbabfda350a0b0c"></a> 2568<h2 class="memtitle"><span class="permalink"><a href="#a5ac72c55b2d3b5b87dbabfda350a0b0c">◆ </a></span>MPL3115_CTRL_REG5_INT_CFG_TW_SHIFT</h2> 2569 2570<div class="memitem"> 2571<div class="memproto"> 2572 <table class="memname"> 2573 <tr> 2574 <td class="memname">#define MPL3115_CTRL_REG5_INT_CFG_TW_SHIFT   ((uint8_t) 4)</td> 2575 </tr> 2576 </table> 2577</div><div class="memdoc"> 2578 2579<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01120">1120</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2580 2581</div> 2582</div> 2583<a id="a44baf12fd1c524de64cc09e325b3e275"></a> 2584<h2 class="memtitle"><span class="permalink"><a href="#a44baf12fd1c524de64cc09e325b3e275">◆ </a></span>MPL3115_DR_STATUS_PDR_DRDY</h2> 2585 2586<div class="memitem"> 2587<div class="memproto"> 2588 <table class="memname"> 2589 <tr> 2590 <td class="memname">#define MPL3115_DR_STATUS_PDR_DRDY   ((uint8_t) 0x04) /* Set to 1 whenever a new Pressure/Altitude data */</td> 2591 </tr> 2592 </table> 2593</div><div class="memdoc"> 2594 2595<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00214">214</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2596 2597</div> 2598</div> 2599<a id="a005406500c3c97d56fd981a01ec15f7a"></a> 2600<h2 class="memtitle"><span class="permalink"><a href="#a005406500c3c97d56fd981a01ec15f7a">◆ </a></span>MPL3115_DR_STATUS_PDR_MASK</h2> 2601 2602<div class="memitem"> 2603<div class="memproto"> 2604 <table class="memname"> 2605 <tr> 2606 <td class="memname">#define MPL3115_DR_STATUS_PDR_MASK   ((uint8_t) 0x04)</td> 2607 </tr> 2608 </table> 2609</div><div class="memdoc"> 2610 2611<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00192">192</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2612 2613</div> 2614</div> 2615<a id="ab876c5246b97fc26245477edfd3ed460"></a> 2616<h2 class="memtitle"><span class="permalink"><a href="#ab876c5246b97fc26245477edfd3ed460">◆ </a></span>MPL3115_DR_STATUS_PDR_SHIFT</h2> 2617 2618<div class="memitem"> 2619<div class="memproto"> 2620 <table class="memname"> 2621 <tr> 2622 <td class="memname">#define MPL3115_DR_STATUS_PDR_SHIFT   ((uint8_t) 2)</td> 2623 </tr> 2624 </table> 2625</div><div class="memdoc"> 2626 2627<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00193">193</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2628 2629</div> 2630</div> 2631<a id="afda65e12f4465bde4d8017b55365d750"></a> 2632<h2 class="memtitle"><span class="permalink"><a href="#afda65e12f4465bde4d8017b55365d750">◆ </a></span>MPL3115_DR_STATUS_POW_MASK</h2> 2633 2634<div class="memitem"> 2635<div class="memproto"> 2636 <table class="memname"> 2637 <tr> 2638 <td class="memname">#define MPL3115_DR_STATUS_POW_MASK   ((uint8_t) 0x40)</td> 2639 </tr> 2640 </table> 2641</div><div class="memdoc"> 2642 2643<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00201">201</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2644 2645</div> 2646</div> 2647<a id="a1cd6378e225c8a7c92898c9c1fbf2680"></a> 2648<h2 class="memtitle"><span class="permalink"><a href="#a1cd6378e225c8a7c92898c9c1fbf2680">◆ </a></span>MPL3115_DR_STATUS_POW_OWR</h2> 2649 2650<div class="memitem"> 2651<div class="memproto"> 2652 <table class="memname"> 2653 <tr> 2654 <td class="memname">#define MPL3115_DR_STATUS_POW_OWR   ((uint8_t) 0x40) /* Set to 1 whenever a new Pressure/Altitude */</td> 2655 </tr> 2656 </table> 2657</div><div class="memdoc"> 2658 2659<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00226">226</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2660 2661</div> 2662</div> 2663<a id="a1308d3135d1d0a1a91e175c26d81ef05"></a> 2664<h2 class="memtitle"><span class="permalink"><a href="#a1308d3135d1d0a1a91e175c26d81ef05">◆ </a></span>MPL3115_DR_STATUS_POW_SHIFT</h2> 2665 2666<div class="memitem"> 2667<div class="memproto"> 2668 <table class="memname"> 2669 <tr> 2670 <td class="memname">#define MPL3115_DR_STATUS_POW_SHIFT   ((uint8_t) 6)</td> 2671 </tr> 2672 </table> 2673</div><div class="memdoc"> 2674 2675<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00202">202</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2676 2677</div> 2678</div> 2679<a id="a46a66f6385efb8b72a006adbf1ba2081"></a> 2680<h2 class="memtitle"><span class="permalink"><a href="#a46a66f6385efb8b72a006adbf1ba2081">◆ </a></span>MPL3115_DR_STATUS_PTDR_DRDY</h2> 2681 2682<div class="memitem"> 2683<div class="memproto"> 2684 <table class="memname"> 2685 <tr> 2686 <td class="memname">#define MPL3115_DR_STATUS_PTDR_DRDY   ((uint8_t) 0x08) /* Signals that a new acquisition for either */</td> 2687 </tr> 2688 </table> 2689</div><div class="memdoc"> 2690 2691<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00217">217</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2692 2693</div> 2694</div> 2695<a id="ad6c70d4b530705fd1ec9d00823fdd25c"></a> 2696<h2 class="memtitle"><span class="permalink"><a href="#ad6c70d4b530705fd1ec9d00823fdd25c">◆ </a></span>MPL3115_DR_STATUS_PTDR_MASK</h2> 2697 2698<div class="memitem"> 2699<div class="memproto"> 2700 <table class="memname"> 2701 <tr> 2702 <td class="memname">#define MPL3115_DR_STATUS_PTDR_MASK   ((uint8_t) 0x08)</td> 2703 </tr> 2704 </table> 2705</div><div class="memdoc"> 2706 2707<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00195">195</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2708 2709<p class="reference">Referenced by <a class="el" href="a04799_source.html#l00070">main()</a>.</p> 2710 2711</div> 2712</div> 2713<a id="af55b4914358d5738f049d9dd115607b5"></a> 2714<h2 class="memtitle"><span class="permalink"><a href="#af55b4914358d5738f049d9dd115607b5">◆ </a></span>MPL3115_DR_STATUS_PTDR_SHIFT</h2> 2715 2716<div class="memitem"> 2717<div class="memproto"> 2718 <table class="memname"> 2719 <tr> 2720 <td class="memname">#define MPL3115_DR_STATUS_PTDR_SHIFT   ((uint8_t) 3)</td> 2721 </tr> 2722 </table> 2723</div><div class="memdoc"> 2724 2725<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00196">196</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2726 2727</div> 2728</div> 2729<a id="ae8d156077a19484139b0ea6ec0980121"></a> 2730<h2 class="memtitle"><span class="permalink"><a href="#ae8d156077a19484139b0ea6ec0980121">◆ </a></span>MPL3115_DR_STATUS_PTOW_MASK</h2> 2731 2732<div class="memitem"> 2733<div class="memproto"> 2734 <table class="memname"> 2735 <tr> 2736 <td class="memname">#define MPL3115_DR_STATUS_PTOW_MASK   ((uint8_t) 0x80)</td> 2737 </tr> 2738 </table> 2739</div><div class="memdoc"> 2740 2741<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00204">204</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2742 2743</div> 2744</div> 2745<a id="a44be4c32feef15335fc6890ca309dbd0"></a> 2746<h2 class="memtitle"><span class="permalink"><a href="#a44be4c32feef15335fc6890ca309dbd0">◆ </a></span>MPL3115_DR_STATUS_PTOW_OWR</h2> 2747 2748<div class="memitem"> 2749<div class="memproto"> 2750 <table class="memname"> 2751 <tr> 2752 <td class="memname">#define MPL3115_DR_STATUS_PTOW_OWR   ((uint8_t) 0x80) /* Set to 1 whenever new data is acquired before */</td> 2753 </tr> 2754 </table> 2755</div><div class="memdoc"> 2756 2757<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00231">231</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2758 2759</div> 2760</div> 2761<a id="a7e129f1c677c94d911e8eb5750002734"></a> 2762<h2 class="memtitle"><span class="permalink"><a href="#a7e129f1c677c94d911e8eb5750002734">◆ </a></span>MPL3115_DR_STATUS_PTOW_SHIFT</h2> 2763 2764<div class="memitem"> 2765<div class="memproto"> 2766 <table class="memname"> 2767 <tr> 2768 <td class="memname">#define MPL3115_DR_STATUS_PTOW_SHIFT   ((uint8_t) 7)</td> 2769 </tr> 2770 </table> 2771</div><div class="memdoc"> 2772 2773<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00205">205</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2774 2775</div> 2776</div> 2777<a id="ac0f18512b61a6a019de923fee312cadf"></a> 2778<h2 class="memtitle"><span class="permalink"><a href="#ac0f18512b61a6a019de923fee312cadf">◆ </a></span>MPL3115_DR_STATUS_TDR_DRDY</h2> 2779 2780<div class="memitem"> 2781<div class="memproto"> 2782 <table class="memname"> 2783 <tr> 2784 <td class="memname">#define MPL3115_DR_STATUS_TDR_DRDY   ((uint8_t) 0x02) /* Set to 1 whenever a Temperature data acquisition is */</td> 2785 </tr> 2786 </table> 2787</div><div class="memdoc"> 2788 2789<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00211">211</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2790 2791</div> 2792</div> 2793<a id="abf359dcb24984479c64f2d58cbd49a1f"></a> 2794<h2 class="memtitle"><span class="permalink"><a href="#abf359dcb24984479c64f2d58cbd49a1f">◆ </a></span>MPL3115_DR_STATUS_TDR_MASK</h2> 2795 2796<div class="memitem"> 2797<div class="memproto"> 2798 <table class="memname"> 2799 <tr> 2800 <td class="memname">#define MPL3115_DR_STATUS_TDR_MASK   ((uint8_t) 0x02)</td> 2801 </tr> 2802 </table> 2803</div><div class="memdoc"> 2804 2805<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00189">189</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2806 2807</div> 2808</div> 2809<a id="ae9f269a77a51de22da277c96dce5aad3"></a> 2810<h2 class="memtitle"><span class="permalink"><a href="#ae9f269a77a51de22da277c96dce5aad3">◆ </a></span>MPL3115_DR_STATUS_TDR_SHIFT</h2> 2811 2812<div class="memitem"> 2813<div class="memproto"> 2814 <table class="memname"> 2815 <tr> 2816 <td class="memname">#define MPL3115_DR_STATUS_TDR_SHIFT   ((uint8_t) 1)</td> 2817 </tr> 2818 </table> 2819</div><div class="memdoc"> 2820 2821<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00190">190</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2822 2823</div> 2824</div> 2825<a id="a08d58a6372f8a9b0bfa48939a8da5583"></a> 2826<h2 class="memtitle"><span class="permalink"><a href="#a08d58a6372f8a9b0bfa48939a8da5583">◆ </a></span>MPL3115_DR_STATUS_TOW_MASK</h2> 2827 2828<div class="memitem"> 2829<div class="memproto"> 2830 <table class="memname"> 2831 <tr> 2832 <td class="memname">#define MPL3115_DR_STATUS_TOW_MASK   ((uint8_t) 0x20)</td> 2833 </tr> 2834 </table> 2835</div><div class="memdoc"> 2836 2837<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00198">198</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2838 2839</div> 2840</div> 2841<a id="a381e6398c56307955a36ed51f011c7ea"></a> 2842<h2 class="memtitle"><span class="permalink"><a href="#a381e6398c56307955a36ed51f011c7ea">◆ </a></span>MPL3115_DR_STATUS_TOW_OWR</h2> 2843 2844<div class="memitem"> 2845<div class="memproto"> 2846 <table class="memname"> 2847 <tr> 2848 <td class="memname">#define MPL3115_DR_STATUS_TOW_OWR   ((uint8_t) 0x20) /* Set to 1 whenever a new Temperature acquisition is */</td> 2849 </tr> 2850 </table> 2851</div><div class="memdoc"> 2852 2853<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00221">221</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2854 2855</div> 2856</div> 2857<a id="a28a2b06a5f48393281e2137a2a1ec480"></a> 2858<h2 class="memtitle"><span class="permalink"><a href="#a28a2b06a5f48393281e2137a2a1ec480">◆ </a></span>MPL3115_DR_STATUS_TOW_SHIFT</h2> 2859 2860<div class="memitem"> 2861<div class="memproto"> 2862 <table class="memname"> 2863 <tr> 2864 <td class="memname">#define MPL3115_DR_STATUS_TOW_SHIFT   ((uint8_t) 5)</td> 2865 </tr> 2866 </table> 2867</div><div class="memdoc"> 2868 2869<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00199">199</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2870 2871</div> 2872</div> 2873<a id="a21baf2bf8ce6c22805bdb0f7294991a7"></a> 2874<h2 class="memtitle"><span class="permalink"><a href="#a21baf2bf8ce6c22805bdb0f7294991a7">◆ </a></span>MPL3115_F_SETUP_F_MODE_CIR_MODE</h2> 2875 2876<div class="memitem"> 2877<div class="memproto"> 2878 <table class="memname"> 2879 <tr> 2880 <td class="memname">#define MPL3115_F_SETUP_F_MODE_CIR_MODE   ((uint8_t) 0x40) /* FIFO contains the most recent samples when overflowed */</td> 2881 </tr> 2882 </table> 2883</div><div class="memdoc"> 2884 2885<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00418">418</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2886 2887</div> 2888</div> 2889<a id="acc8cfcddad4d4a31f9e5ad1bbecc14c5"></a> 2890<h2 class="memtitle"><span class="permalink"><a href="#acc8cfcddad4d4a31f9e5ad1bbecc14c5">◆ </a></span>MPL3115_F_SETUP_F_MODE_FIFO_OFF</h2> 2891 2892<div class="memitem"> 2893<div class="memproto"> 2894 <table class="memname"> 2895 <tr> 2896 <td class="memname">#define MPL3115_F_SETUP_F_MODE_FIFO_OFF   ((uint8_t) 0x00) /* FIFO is disabled. */</td> 2897 </tr> 2898 </table> 2899</div><div class="memdoc"> 2900 2901<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00417">417</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2902 2903</div> 2904</div> 2905<a id="a9841989c6cea0eb5a8dcc60b93a0931a"></a> 2906<h2 class="memtitle"><span class="permalink"><a href="#a9841989c6cea0eb5a8dcc60b93a0931a">◆ </a></span>MPL3115_F_SETUP_F_MODE_MASK</h2> 2907 2908<div class="memitem"> 2909<div class="memproto"> 2910 <table class="memname"> 2911 <tr> 2912 <td class="memname">#define MPL3115_F_SETUP_F_MODE_MASK   ((uint8_t) 0xC0)</td> 2913 </tr> 2914 </table> 2915</div><div class="memdoc"> 2916 2917<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00410">410</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2918 2919</div> 2920</div> 2921<a id="a8c0b36ac0e2f2bf37b75d209c7d36a7c"></a> 2922<h2 class="memtitle"><span class="permalink"><a href="#a8c0b36ac0e2f2bf37b75d209c7d36a7c">◆ </a></span>MPL3115_F_SETUP_F_MODE_SHIFT</h2> 2923 2924<div class="memitem"> 2925<div class="memproto"> 2926 <table class="memname"> 2927 <tr> 2928 <td class="memname">#define MPL3115_F_SETUP_F_MODE_SHIFT   ((uint8_t) 6)</td> 2929 </tr> 2930 </table> 2931</div><div class="memdoc"> 2932 2933<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00411">411</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2934 2935</div> 2936</div> 2937<a id="ae4345c3fb1e9179fd784e3f46065c5ce"></a> 2938<h2 class="memtitle"><span class="permalink"><a href="#ae4345c3fb1e9179fd784e3f46065c5ce">◆ </a></span>MPL3115_F_SETUP_F_MODE_STOP_MODE</h2> 2939 2940<div class="memitem"> 2941<div class="memproto"> 2942 <table class="memname"> 2943 <tr> 2944 <td class="memname">#define MPL3115_F_SETUP_F_MODE_STOP_MODE   ((uint8_t) 0x80) /* FIFO stops accepting new samples when overflowed. */</td> 2945 </tr> 2946 </table> 2947</div><div class="memdoc"> 2948 2949<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00420">420</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2950 2951</div> 2952</div> 2953<a id="a9c16fd3d1e5803476bf5fdde0d6beef8"></a> 2954<h2 class="memtitle"><span class="permalink"><a href="#a9c16fd3d1e5803476bf5fdde0d6beef8">◆ </a></span>MPL3115_F_SETUP_F_WMRK_MASK</h2> 2955 2956<div class="memitem"> 2957<div class="memproto"> 2958 <table class="memname"> 2959 <tr> 2960 <td class="memname">#define MPL3115_F_SETUP_F_WMRK_MASK   ((uint8_t) 0x3F)</td> 2961 </tr> 2962 </table> 2963</div><div class="memdoc"> 2964 2965<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00407">407</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2966 2967</div> 2968</div> 2969<a id="ad4418a7ce881169268ab78510d1cbd3f"></a> 2970<h2 class="memtitle"><span class="permalink"><a href="#ad4418a7ce881169268ab78510d1cbd3f">◆ </a></span>MPL3115_F_SETUP_F_WMRK_SHIFT</h2> 2971 2972<div class="memitem"> 2973<div class="memproto"> 2974 <table class="memname"> 2975 <tr> 2976 <td class="memname">#define MPL3115_F_SETUP_F_WMRK_SHIFT   ((uint8_t) 0)</td> 2977 </tr> 2978 </table> 2979</div><div class="memdoc"> 2980 2981<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00408">408</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2982 2983</div> 2984</div> 2985<a id="a35919a3c4c82ad451a081b2f31396f81"></a> 2986<h2 class="memtitle"><span class="permalink"><a href="#a35919a3c4c82ad451a081b2f31396f81">◆ </a></span>MPL3115_F_STATUS_F_CNT_MASK</h2> 2987 2988<div class="memitem"> 2989<div class="memproto"> 2990 <table class="memname"> 2991 <tr> 2992 <td class="memname">#define MPL3115_F_STATUS_F_CNT_MASK   ((uint8_t) 0x3F)</td> 2993 </tr> 2994 </table> 2995</div><div class="memdoc"> 2996 2997<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00356">356</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 2998 2999</div> 3000</div> 3001<a id="a08b37cfb37b3c0b4b3b3612ddb026a33"></a> 3002<h2 class="memtitle"><span class="permalink"><a href="#a08b37cfb37b3c0b4b3b3612ddb026a33">◆ </a></span>MPL3115_F_STATUS_F_CNT_SHIFT</h2> 3003 3004<div class="memitem"> 3005<div class="memproto"> 3006 <table class="memname"> 3007 <tr> 3008 <td class="memname">#define MPL3115_F_STATUS_F_CNT_SHIFT   ((uint8_t) 0)</td> 3009 </tr> 3010 </table> 3011</div><div class="memdoc"> 3012 3013<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00357">357</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3014 3015</div> 3016</div> 3017<a id="a945d1022aa7962ba80308cab2af1bcf5"></a> 3018<h2 class="memtitle"><span class="permalink"><a href="#a945d1022aa7962ba80308cab2af1bcf5">◆ </a></span>MPL3115_F_STATUS_F_OVF_MASK</h2> 3019 3020<div class="memitem"> 3021<div class="memproto"> 3022 <table class="memname"> 3023 <tr> 3024 <td class="memname">#define MPL3115_F_STATUS_F_OVF_MASK   ((uint8_t) 0x80)</td> 3025 </tr> 3026 </table> 3027</div><div class="memdoc"> 3028 3029<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00362">362</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3030 3031</div> 3032</div> 3033<a id="a2a2574341fee0bac266eef2bcaa0bd4d"></a> 3034<h2 class="memtitle"><span class="permalink"><a href="#a2a2574341fee0bac266eef2bcaa0bd4d">◆ </a></span>MPL3115_F_STATUS_F_OVF_NOOVFL</h2> 3035 3036<div class="memitem"> 3037<div class="memproto"> 3038 <table class="memname"> 3039 <tr> 3040 <td class="memname">#define MPL3115_F_STATUS_F_OVF_NOOVFL   ((uint8_t) 0x00) /* No FIFO overflow events detected. */</td> 3041 </tr> 3042 </table> 3043</div><div class="memdoc"> 3044 3045<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00371">371</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3046 3047</div> 3048</div> 3049<a id="a818e0d4e7a7894985d00b1c17ef28716"></a> 3050<h2 class="memtitle"><span class="permalink"><a href="#a818e0d4e7a7894985d00b1c17ef28716">◆ </a></span>MPL3115_F_STATUS_F_OVF_OVFLDET</h2> 3051 3052<div class="memitem"> 3053<div class="memproto"> 3054 <table class="memname"> 3055 <tr> 3056 <td class="memname">#define MPL3115_F_STATUS_F_OVF_OVFLDET   ((uint8_t) 0x80) /* FIFO Overflow event has been detected. */</td> 3057 </tr> 3058 </table> 3059</div><div class="memdoc"> 3060 3061<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00372">372</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3062 3063</div> 3064</div> 3065<a id="aec8d95e0ca0be4e8c78e75f8895a7749"></a> 3066<h2 class="memtitle"><span class="permalink"><a href="#aec8d95e0ca0be4e8c78e75f8895a7749">◆ </a></span>MPL3115_F_STATUS_F_OVF_SHIFT</h2> 3067 3068<div class="memitem"> 3069<div class="memproto"> 3070 <table class="memname"> 3071 <tr> 3072 <td class="memname">#define MPL3115_F_STATUS_F_OVF_SHIFT   ((uint8_t) 7)</td> 3073 </tr> 3074 </table> 3075</div><div class="memdoc"> 3076 3077<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00363">363</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3078 3079</div> 3080</div> 3081<a id="a7dc8bc72e5a0cea763eae697b84b5dbf"></a> 3082<h2 class="memtitle"><span class="permalink"><a href="#a7dc8bc72e5a0cea763eae697b84b5dbf">◆ </a></span>MPL3115_F_STATUS_F_WMKF_FLAG_EVTDET</h2> 3083 3084<div class="memitem"> 3085<div class="memproto"> 3086 <table class="memname"> 3087 <tr> 3088 <td class="memname">#define MPL3115_F_STATUS_F_WMKF_FLAG_EVTDET   ((uint8_t) 0x40) /* FIFO Watermark event has been detected. */</td> 3089 </tr> 3090 </table> 3091</div><div class="memdoc"> 3092 3093<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00370">370</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3094 3095</div> 3096</div> 3097<a id="ac5479d3123a7d4e789d31b7a16b15783"></a> 3098<h2 class="memtitle"><span class="permalink"><a href="#ac5479d3123a7d4e789d31b7a16b15783">◆ </a></span>MPL3115_F_STATUS_F_WMKF_FLAG_MASK</h2> 3099 3100<div class="memitem"> 3101<div class="memproto"> 3102 <table class="memname"> 3103 <tr> 3104 <td class="memname">#define MPL3115_F_STATUS_F_WMKF_FLAG_MASK   ((uint8_t) 0x40)</td> 3105 </tr> 3106 </table> 3107</div><div class="memdoc"> 3108 3109<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00359">359</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3110 3111<p class="reference">Referenced by <a class="el" href="a04805_source.html#l00072">main()</a>.</p> 3112 3113</div> 3114</div> 3115<a id="a94678b1f51547cacb0d80892a6dbb9da"></a> 3116<h2 class="memtitle"><span class="permalink"><a href="#a94678b1f51547cacb0d80892a6dbb9da">◆ </a></span>MPL3115_F_STATUS_F_WMKF_FLAG_NOEVT</h2> 3117 3118<div class="memitem"> 3119<div class="memproto"> 3120 <table class="memname"> 3121 <tr> 3122 <td class="memname">#define MPL3115_F_STATUS_F_WMKF_FLAG_NOEVT   ((uint8_t) 0x00) /* No FIFO watermark event detected. */</td> 3123 </tr> 3124 </table> 3125</div><div class="memdoc"> 3126 3127<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00369">369</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3128 3129</div> 3130</div> 3131<a id="aa92c371868b4713d08aa23da034a4636"></a> 3132<h2 class="memtitle"><span class="permalink"><a href="#aa92c371868b4713d08aa23da034a4636">◆ </a></span>MPL3115_F_STATUS_F_WMKF_FLAG_SHIFT</h2> 3133 3134<div class="memitem"> 3135<div class="memproto"> 3136 <table class="memname"> 3137 <tr> 3138 <td class="memname">#define MPL3115_F_STATUS_F_WMKF_FLAG_SHIFT   ((uint8_t) 6)</td> 3139 </tr> 3140 </table> 3141</div><div class="memdoc"> 3142 3143<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00360">360</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3144 3145</div> 3146</div> 3147<a id="a1d9478f281f471b0904e193e572718e6"></a> 3148<h2 class="memtitle"><span class="permalink"><a href="#a1d9478f281f471b0904e193e572718e6">◆ </a></span>MPL3115_I2C_ADDRESS</h2> 3149 3150<div class="memitem"> 3151<div class="memproto"> 3152 <table class="memname"> 3153 <tr> 3154 <td class="memname">#define MPL3115_I2C_ADDRESS   (0x60) /*MPL3115A2 Address*/</td> 3155 </tr> 3156 </table> 3157</div><div class="memdoc"> 3158 3159<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00064">64</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3160 3161</div> 3162</div> 3163<a id="ad4a7acc5f07466676936f0896dc0c4f3"></a> 3164<h2 class="memtitle"><span class="permalink"><a href="#ad4a7acc5f07466676936f0896dc0c4f3">◆ </a></span>MPL3115_INT_SOURCE_SRC_DRDY_MASK</h2> 3165 3166<div class="memitem"> 3167<div class="memproto"> 3168 <table class="memname"> 3169 <tr> 3170 <td class="memname">#define MPL3115_INT_SOURCE_SRC_DRDY_MASK   ((uint8_t) 0x80)</td> 3171 </tr> 3172 </table> 3173</div><div class="memdoc"> 3174 3175<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00520">520</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3176 3177</div> 3178</div> 3179<a id="a7908b859e4eb6e22f978d0e318baef5d"></a> 3180<h2 class="memtitle"><span class="permalink"><a href="#a7908b859e4eb6e22f978d0e318baef5d">◆ </a></span>MPL3115_INT_SOURCE_SRC_DRDY_SHIFT</h2> 3181 3182<div class="memitem"> 3183<div class="memproto"> 3184 <table class="memname"> 3185 <tr> 3186 <td class="memname">#define MPL3115_INT_SOURCE_SRC_DRDY_SHIFT   ((uint8_t) 7)</td> 3187 </tr> 3188 </table> 3189</div><div class="memdoc"> 3190 3191<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00521">521</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3192 3193</div> 3194</div> 3195<a id="af374af318b693c43c45d32de142c3624"></a> 3196<h2 class="memtitle"><span class="permalink"><a href="#af374af318b693c43c45d32de142c3624">◆ </a></span>MPL3115_INT_SOURCE_SRC_FIFO_MASK</h2> 3197 3198<div class="memitem"> 3199<div class="memproto"> 3200 <table class="memname"> 3201 <tr> 3202 <td class="memname">#define MPL3115_INT_SOURCE_SRC_FIFO_MASK   ((uint8_t) 0x40)</td> 3203 </tr> 3204 </table> 3205</div><div class="memdoc"> 3206 3207<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00517">517</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3208 3209</div> 3210</div> 3211<a id="a73169156c84ffe283a7008759382506f"></a> 3212<h2 class="memtitle"><span class="permalink"><a href="#a73169156c84ffe283a7008759382506f">◆ </a></span>MPL3115_INT_SOURCE_SRC_FIFO_SHIFT</h2> 3213 3214<div class="memitem"> 3215<div class="memproto"> 3216 <table class="memname"> 3217 <tr> 3218 <td class="memname">#define MPL3115_INT_SOURCE_SRC_FIFO_SHIFT   ((uint8_t) 6)</td> 3219 </tr> 3220 </table> 3221</div><div class="memdoc"> 3222 3223<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00518">518</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3224 3225</div> 3226</div> 3227<a id="a9a749a54b9cce7b08a30b877e7d24a18"></a> 3228<h2 class="memtitle"><span class="permalink"><a href="#a9a749a54b9cce7b08a30b877e7d24a18">◆ </a></span>MPL3115_INT_SOURCE_SRC_PCHG_MASK</h2> 3229 3230<div class="memitem"> 3231<div class="memproto"> 3232 <table class="memname"> 3233 <tr> 3234 <td class="memname">#define MPL3115_INT_SOURCE_SRC_PCHG_MASK   ((uint8_t) 0x02)</td> 3235 </tr> 3236 </table> 3237</div><div class="memdoc"> 3238 3239<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00502">502</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3240 3241</div> 3242</div> 3243<a id="ac0463528b8c81029d1df0c62a451467e"></a> 3244<h2 class="memtitle"><span class="permalink"><a href="#ac0463528b8c81029d1df0c62a451467e">◆ </a></span>MPL3115_INT_SOURCE_SRC_PCHG_SHIFT</h2> 3245 3246<div class="memitem"> 3247<div class="memproto"> 3248 <table class="memname"> 3249 <tr> 3250 <td class="memname">#define MPL3115_INT_SOURCE_SRC_PCHG_SHIFT   ((uint8_t) 1)</td> 3251 </tr> 3252 </table> 3253</div><div class="memdoc"> 3254 3255<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00503">503</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3256 3257</div> 3258</div> 3259<a id="ada4f27ffc2857351a14229b801f4b607"></a> 3260<h2 class="memtitle"><span class="permalink"><a href="#ada4f27ffc2857351a14229b801f4b607">◆ </a></span>MPL3115_INT_SOURCE_SRC_PTH_MASK</h2> 3261 3262<div class="memitem"> 3263<div class="memproto"> 3264 <table class="memname"> 3265 <tr> 3266 <td class="memname">#define MPL3115_INT_SOURCE_SRC_PTH_MASK   ((uint8_t) 0x08)</td> 3267 </tr> 3268 </table> 3269</div><div class="memdoc"> 3270 3271<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00508">508</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3272 3273</div> 3274</div> 3275<a id="a9fe746bf63da432c43a5960ccab9878c"></a> 3276<h2 class="memtitle"><span class="permalink"><a href="#a9fe746bf63da432c43a5960ccab9878c">◆ </a></span>MPL3115_INT_SOURCE_SRC_PTH_SHIFT</h2> 3277 3278<div class="memitem"> 3279<div class="memproto"> 3280 <table class="memname"> 3281 <tr> 3282 <td class="memname">#define MPL3115_INT_SOURCE_SRC_PTH_SHIFT   ((uint8_t) 3)</td> 3283 </tr> 3284 </table> 3285</div><div class="memdoc"> 3286 3287<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00509">509</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3288 3289</div> 3290</div> 3291<a id="a1a3546568bde601f9cfc66276c01401a"></a> 3292<h2 class="memtitle"><span class="permalink"><a href="#a1a3546568bde601f9cfc66276c01401a">◆ </a></span>MPL3115_INT_SOURCE_SRC_PW_MASK</h2> 3293 3294<div class="memitem"> 3295<div class="memproto"> 3296 <table class="memname"> 3297 <tr> 3298 <td class="memname">#define MPL3115_INT_SOURCE_SRC_PW_MASK   ((uint8_t) 0x20)</td> 3299 </tr> 3300 </table> 3301</div><div class="memdoc"> 3302 3303<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00514">514</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3304 3305</div> 3306</div> 3307<a id="a6fcf0b38ad99813b601c25f81e5dfdcf"></a> 3308<h2 class="memtitle"><span class="permalink"><a href="#a6fcf0b38ad99813b601c25f81e5dfdcf">◆ </a></span>MPL3115_INT_SOURCE_SRC_PW_SHIFT</h2> 3309 3310<div class="memitem"> 3311<div class="memproto"> 3312 <table class="memname"> 3313 <tr> 3314 <td class="memname">#define MPL3115_INT_SOURCE_SRC_PW_SHIFT   ((uint8_t) 5)</td> 3315 </tr> 3316 </table> 3317</div><div class="memdoc"> 3318 3319<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00515">515</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3320 3321</div> 3322</div> 3323<a id="a1fd29ded0804aebb878a5f1359859827"></a> 3324<h2 class="memtitle"><span class="permalink"><a href="#a1fd29ded0804aebb878a5f1359859827">◆ </a></span>MPL3115_INT_SOURCE_SRC_TCHG_MASK</h2> 3325 3326<div class="memitem"> 3327<div class="memproto"> 3328 <table class="memname"> 3329 <tr> 3330 <td class="memname">#define MPL3115_INT_SOURCE_SRC_TCHG_MASK   ((uint8_t) 0x01)</td> 3331 </tr> 3332 </table> 3333</div><div class="memdoc"> 3334 3335<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00499">499</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3336 3337</div> 3338</div> 3339<a id="adbf9dc78d3850bb355f63c0987794cab"></a> 3340<h2 class="memtitle"><span class="permalink"><a href="#adbf9dc78d3850bb355f63c0987794cab">◆ </a></span>MPL3115_INT_SOURCE_SRC_TCHG_SHIFT</h2> 3341 3342<div class="memitem"> 3343<div class="memproto"> 3344 <table class="memname"> 3345 <tr> 3346 <td class="memname">#define MPL3115_INT_SOURCE_SRC_TCHG_SHIFT   ((uint8_t) 0)</td> 3347 </tr> 3348 </table> 3349</div><div class="memdoc"> 3350 3351<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00500">500</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3352 3353</div> 3354</div> 3355<a id="a6e9d00eee8b14a02059db7799e2219fd"></a> 3356<h2 class="memtitle"><span class="permalink"><a href="#a6e9d00eee8b14a02059db7799e2219fd">◆ </a></span>MPL3115_INT_SOURCE_SRC_TTH_MASK</h2> 3357 3358<div class="memitem"> 3359<div class="memproto"> 3360 <table class="memname"> 3361 <tr> 3362 <td class="memname">#define MPL3115_INT_SOURCE_SRC_TTH_MASK   ((uint8_t) 0x04)</td> 3363 </tr> 3364 </table> 3365</div><div class="memdoc"> 3366 3367<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00505">505</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3368 3369</div> 3370</div> 3371<a id="a01577879ce9a1f7e3eab92104b357e79"></a> 3372<h2 class="memtitle"><span class="permalink"><a href="#a01577879ce9a1f7e3eab92104b357e79">◆ </a></span>MPL3115_INT_SOURCE_SRC_TTH_SHIFT</h2> 3373 3374<div class="memitem"> 3375<div class="memproto"> 3376 <table class="memname"> 3377 <tr> 3378 <td class="memname">#define MPL3115_INT_SOURCE_SRC_TTH_SHIFT   ((uint8_t) 2)</td> 3379 </tr> 3380 </table> 3381</div><div class="memdoc"> 3382 3383<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00506">506</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3384 3385</div> 3386</div> 3387<a id="ac37ec3ad0957634fbf9e18f78b0ec729"></a> 3388<h2 class="memtitle"><span class="permalink"><a href="#ac37ec3ad0957634fbf9e18f78b0ec729">◆ </a></span>MPL3115_INT_SOURCE_SRC_TW_MASK</h2> 3389 3390<div class="memitem"> 3391<div class="memproto"> 3392 <table class="memname"> 3393 <tr> 3394 <td class="memname">#define MPL3115_INT_SOURCE_SRC_TW_MASK   ((uint8_t) 0x10)</td> 3395 </tr> 3396 </table> 3397</div><div class="memdoc"> 3398 3399<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00511">511</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3400 3401</div> 3402</div> 3403<a id="a5427d943e81ad25883b95c195f8fdcf6"></a> 3404<h2 class="memtitle"><span class="permalink"><a href="#a5427d943e81ad25883b95c195f8fdcf6">◆ </a></span>MPL3115_INT_SOURCE_SRC_TW_SHIFT</h2> 3405 3406<div class="memitem"> 3407<div class="memproto"> 3408 <table class="memname"> 3409 <tr> 3410 <td class="memname">#define MPL3115_INT_SOURCE_SRC_TW_SHIFT   ((uint8_t) 4)</td> 3411 </tr> 3412 </table> 3413</div><div class="memdoc"> 3414 3415<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00512">512</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3416 3417</div> 3418</div> 3419<a id="a36de477d8322924f12ec1a6429b3c553"></a> 3420<h2 class="memtitle"><span class="permalink"><a href="#a36de477d8322924f12ec1a6429b3c553">◆ </a></span>MPL3115_OUT_P_DELTA_LSB_PCD_MASK</h2> 3421 3422<div class="memitem"> 3423<div class="memproto"> 3424 <table class="memname"> 3425 <tr> 3426 <td class="memname">#define MPL3115_OUT_P_DELTA_LSB_PCD_MASK   ((uint8_t) 0xF0)</td> 3427 </tr> 3428 </table> 3429</div><div class="memdoc"> 3430 3431<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00279">279</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3432 3433</div> 3434</div> 3435<a id="aa44afc4bab12ed471306e4dfc35ad112"></a> 3436<h2 class="memtitle"><span class="permalink"><a href="#aa44afc4bab12ed471306e4dfc35ad112">◆ </a></span>MPL3115_OUT_P_DELTA_LSB_PCD_SHIFT</h2> 3437 3438<div class="memitem"> 3439<div class="memproto"> 3440 <table class="memname"> 3441 <tr> 3442 <td class="memname">#define MPL3115_OUT_P_DELTA_LSB_PCD_SHIFT   ((uint8_t) 4)</td> 3443 </tr> 3444 </table> 3445</div><div class="memdoc"> 3446 3447<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00280">280</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3448 3449</div> 3450</div> 3451<a id="a6f978c59362490adf40af46cfbf2d8f8"></a> 3452<h2 class="memtitle"><span class="permalink"><a href="#a6f978c59362490adf40af46cfbf2d8f8">◆ </a></span>MPL3115_OUT_P_LSB_PD_MASK</h2> 3453 3454<div class="memitem"> 3455<div class="memproto"> 3456 <table class="memname"> 3457 <tr> 3458 <td class="memname">#define MPL3115_OUT_P_LSB_PD_MASK   ((uint8_t) 0xF0)</td> 3459 </tr> 3460 </table> 3461</div><div class="memdoc"> 3462 3463<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00115">115</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3464 3465</div> 3466</div> 3467<a id="a215af1bed4effafbf299070f02a0d5ce"></a> 3468<h2 class="memtitle"><span class="permalink"><a href="#a215af1bed4effafbf299070f02a0d5ce">◆ </a></span>MPL3115_OUT_P_LSB_PD_SHIFT</h2> 3469 3470<div class="memitem"> 3471<div class="memproto"> 3472 <table class="memname"> 3473 <tr> 3474 <td class="memname">#define MPL3115_OUT_P_LSB_PD_SHIFT   ((uint8_t) 4)</td> 3475 </tr> 3476 </table> 3477</div><div class="memdoc"> 3478 3479<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00116">116</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3480 3481</div> 3482</div> 3483<a id="a72913cb6cb02de2cd3245229cf3cba95"></a> 3484<h2 class="memtitle"><span class="permalink"><a href="#a72913cb6cb02de2cd3245229cf3cba95">◆ </a></span>MPL3115_OUT_T_DELTA_LSB_TCD_MASK</h2> 3485 3486<div class="memitem"> 3487<div class="memproto"> 3488 <table class="memname"> 3489 <tr> 3490 <td class="memname">#define MPL3115_OUT_T_DELTA_LSB_TCD_MASK   ((uint8_t) 0xF0)</td> 3491 </tr> 3492 </table> 3493</div><div class="memdoc"> 3494 3495<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00315">315</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3496 3497</div> 3498</div> 3499<a id="a5a495d98afcf98307753b9e4efea81b3"></a> 3500<h2 class="memtitle"><span class="permalink"><a href="#a5a495d98afcf98307753b9e4efea81b3">◆ </a></span>MPL3115_OUT_T_DELTA_LSB_TCD_SHIFT</h2> 3501 3502<div class="memitem"> 3503<div class="memproto"> 3504 <table class="memname"> 3505 <tr> 3506 <td class="memname">#define MPL3115_OUT_T_DELTA_LSB_TCD_SHIFT   ((uint8_t) 4)</td> 3507 </tr> 3508 </table> 3509</div><div class="memdoc"> 3510 3511<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00316">316</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3512 3513</div> 3514</div> 3515<a id="a0f51cde69b6c1e8e219a9a3bb6f9439a"></a> 3516<h2 class="memtitle"><span class="permalink"><a href="#a0f51cde69b6c1e8e219a9a3bb6f9439a">◆ </a></span>MPL3115_OUT_T_LSB_PD_MASK</h2> 3517 3518<div class="memitem"> 3519<div class="memproto"> 3520 <table class="memname"> 3521 <tr> 3522 <td class="memname">#define MPL3115_OUT_T_LSB_PD_MASK   ((uint8_t) 0xF0)</td> 3523 </tr> 3524 </table> 3525</div><div class="memdoc"> 3526 3527<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00151">151</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3528 3529</div> 3530</div> 3531<a id="a887a110af424e5078327149656e3d5eb"></a> 3532<h2 class="memtitle"><span class="permalink"><a href="#a887a110af424e5078327149656e3d5eb">◆ </a></span>MPL3115_OUT_T_LSB_PD_SHIFT</h2> 3533 3534<div class="memitem"> 3535<div class="memproto"> 3536 <table class="memname"> 3537 <tr> 3538 <td class="memname">#define MPL3115_OUT_T_LSB_PD_SHIFT   ((uint8_t) 4)</td> 3539 </tr> 3540 </table> 3541</div><div class="memdoc"> 3542 3543<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00152">152</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3544 3545</div> 3546</div> 3547<a id="ace4b5c17eeb5218d623ceb7bd89e99de"></a> 3548<h2 class="memtitle"><span class="permalink"><a href="#ace4b5c17eeb5218d623ceb7bd89e99de">◆ </a></span>MPL3115_P_MAX_LSB_MAXPAD_MASK</h2> 3549 3550<div class="memitem"> 3551<div class="memproto"> 3552 <table class="memname"> 3553 <tr> 3554 <td class="memname">#define MPL3115_P_MAX_LSB_MAXPAD_MASK   ((uint8_t) 0xF0)</td> 3555 </tr> 3556 </table> 3557</div><div class="memdoc"> 3558 3559<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00772">772</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3560 3561</div> 3562</div> 3563<a id="aae7eef92a016d9d075ce45bbe7652de8"></a> 3564<h2 class="memtitle"><span class="permalink"><a href="#aae7eef92a016d9d075ce45bbe7652de8">◆ </a></span>MPL3115_P_MAX_LSB_MAXPAD_SHIFT</h2> 3565 3566<div class="memitem"> 3567<div class="memproto"> 3568 <table class="memname"> 3569 <tr> 3570 <td class="memname">#define MPL3115_P_MAX_LSB_MAXPAD_SHIFT   ((uint8_t) 4)</td> 3571 </tr> 3572 </table> 3573</div><div class="memdoc"> 3574 3575<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00773">773</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3576 3577</div> 3578</div> 3579<a id="ad51169475e83b1d075d6c8888cf84f24"></a> 3580<h2 class="memtitle"><span class="permalink"><a href="#ad51169475e83b1d075d6c8888cf84f24">◆ </a></span>MPL3115_P_MIN_LSB_MINPAD_MASK</h2> 3581 3582<div class="memitem"> 3583<div class="memproto"> 3584 <table class="memname"> 3585 <tr> 3586 <td class="memname">#define MPL3115_P_MIN_LSB_MINPAD_MASK   ((uint8_t) 0xF0)</td> 3587 </tr> 3588 </table> 3589</div><div class="memdoc"> 3590 3591<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00691">691</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3592 3593</div> 3594</div> 3595<a id="a9955169eb370e07f52f415d8fa8836b7"></a> 3596<h2 class="memtitle"><span class="permalink"><a href="#a9955169eb370e07f52f415d8fa8836b7">◆ </a></span>MPL3115_P_MIN_LSB_MINPAD_SHIFT</h2> 3597 3598<div class="memitem"> 3599<div class="memproto"> 3600 <table class="memname"> 3601 <tr> 3602 <td class="memname">#define MPL3115_P_MIN_LSB_MINPAD_SHIFT   ((uint8_t) 4)</td> 3603 </tr> 3604 </table> 3605</div><div class="memdoc"> 3606 3607<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00692">692</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3608 3609</div> 3610</div> 3611<a id="a966ce529b34012c716d889815098acab"></a> 3612<h2 class="memtitle"><span class="permalink"><a href="#a966ce529b34012c716d889815098acab">◆ </a></span>MPL3115_PT_DATA_CFG_DREM_DISABLED</h2> 3613 3614<div class="memitem"> 3615<div class="memproto"> 3616 <table class="memname"> 3617 <tr> 3618 <td class="memname">#define MPL3115_PT_DATA_CFG_DREM_DISABLED   ((uint8_t) 0x00) /* Event detection disabled. */</td> 3619 </tr> 3620 </table> 3621</div><div class="memdoc"> 3622 3623<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00569">569</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3624 3625</div> 3626</div> 3627<a id="a0445fe6ad3db50f7c88f12c8294ad56f"></a> 3628<h2 class="memtitle"><span class="permalink"><a href="#a0445fe6ad3db50f7c88f12c8294ad56f">◆ </a></span>MPL3115_PT_DATA_CFG_DREM_ENABLED</h2> 3629 3630<div class="memitem"> 3631<div class="memproto"> 3632 <table class="memname"> 3633 <tr> 3634 <td class="memname">#define MPL3115_PT_DATA_CFG_DREM_ENABLED   ((uint8_t) 0x04) /* Event detection enabled. Generate data ready */</td> 3635 </tr> 3636 </table> 3637</div><div class="memdoc"> 3638 3639<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00570">570</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3640 3641</div> 3642</div> 3643<a id="a5bc785b6960d05c17b641834f09f616f"></a> 3644<h2 class="memtitle"><span class="permalink"><a href="#a5bc785b6960d05c17b641834f09f616f">◆ </a></span>MPL3115_PT_DATA_CFG_DREM_MASK</h2> 3645 3646<div class="memitem"> 3647<div class="memproto"> 3648 <table class="memname"> 3649 <tr> 3650 <td class="memname">#define MPL3115_PT_DATA_CFG_DREM_MASK   ((uint8_t) 0x04)</td> 3651 </tr> 3652 </table> 3653</div><div class="memdoc"> 3654 3655<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00556">556</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3656 3657</div> 3658</div> 3659<a id="a928d2536eeda6849e1e36ff7310aab15"></a> 3660<h2 class="memtitle"><span class="permalink"><a href="#a928d2536eeda6849e1e36ff7310aab15">◆ </a></span>MPL3115_PT_DATA_CFG_DREM_SHIFT</h2> 3661 3662<div class="memitem"> 3663<div class="memproto"> 3664 <table class="memname"> 3665 <tr> 3666 <td class="memname">#define MPL3115_PT_DATA_CFG_DREM_SHIFT   ((uint8_t) 2)</td> 3667 </tr> 3668 </table> 3669</div><div class="memdoc"> 3670 3671<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00557">557</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3672 3673</div> 3674</div> 3675<a id="a581b97d7fa33083a169eb712d7b4f59c"></a> 3676<h2 class="memtitle"><span class="permalink"><a href="#a581b97d7fa33083a169eb712d7b4f59c">◆ </a></span>MPL3115_PT_DATA_CFG_PDEFE_DISABLED</h2> 3677 3678<div class="memitem"> 3679<div class="memproto"> 3680 <table class="memname"> 3681 <tr> 3682 <td class="memname">#define MPL3115_PT_DATA_CFG_PDEFE_DISABLED   ((uint8_t) 0x00) /* Event detection disabled. */</td> 3683 </tr> 3684 </table> 3685</div><div class="memdoc"> 3686 3687<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00566">566</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3688 3689</div> 3690</div> 3691<a id="a99c6f6abfc2e5a3572c8f67d410daeb8"></a> 3692<h2 class="memtitle"><span class="permalink"><a href="#a99c6f6abfc2e5a3572c8f67d410daeb8">◆ </a></span>MPL3115_PT_DATA_CFG_PDEFE_ENABLED</h2> 3693 3694<div class="memitem"> 3695<div class="memproto"> 3696 <table class="memname"> 3697 <tr> 3698 <td class="memname">#define MPL3115_PT_DATA_CFG_PDEFE_ENABLED   ((uint8_t) 0x02) /* Event detection enabled. Raise event flag on new */</td> 3699 </tr> 3700 </table> 3701</div><div class="memdoc"> 3702 3703<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00567">567</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3704 3705</div> 3706</div> 3707<a id="ab050ad8ca1cbe1b14e3377debeac377f"></a> 3708<h2 class="memtitle"><span class="permalink"><a href="#ab050ad8ca1cbe1b14e3377debeac377f">◆ </a></span>MPL3115_PT_DATA_CFG_PDEFE_MASK</h2> 3709 3710<div class="memitem"> 3711<div class="memproto"> 3712 <table class="memname"> 3713 <tr> 3714 <td class="memname">#define MPL3115_PT_DATA_CFG_PDEFE_MASK   ((uint8_t) 0x02)</td> 3715 </tr> 3716 </table> 3717</div><div class="memdoc"> 3718 3719<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00553">553</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3720 3721</div> 3722</div> 3723<a id="a043b82d706ace97f37703d057c7a0e35"></a> 3724<h2 class="memtitle"><span class="permalink"><a href="#a043b82d706ace97f37703d057c7a0e35">◆ </a></span>MPL3115_PT_DATA_CFG_PDEFE_SHIFT</h2> 3725 3726<div class="memitem"> 3727<div class="memproto"> 3728 <table class="memname"> 3729 <tr> 3730 <td class="memname">#define MPL3115_PT_DATA_CFG_PDEFE_SHIFT   ((uint8_t) 1)</td> 3731 </tr> 3732 </table> 3733</div><div class="memdoc"> 3734 3735<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00554">554</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3736 3737</div> 3738</div> 3739<a id="affc22457d15d0c09ed4557dc5dcabbd0"></a> 3740<h2 class="memtitle"><span class="permalink"><a href="#affc22457d15d0c09ed4557dc5dcabbd0">◆ </a></span>MPL3115_PT_DATA_CFG_TDEFE_DISABLED</h2> 3741 3742<div class="memitem"> 3743<div class="memproto"> 3744 <table class="memname"> 3745 <tr> 3746 <td class="memname">#define MPL3115_PT_DATA_CFG_TDEFE_DISABLED   ((uint8_t) 0x00) /* Event detection disabled. */</td> 3747 </tr> 3748 </table> 3749</div><div class="memdoc"> 3750 3751<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00563">563</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3752 3753</div> 3754</div> 3755<a id="aed81fbf7d01fa3d81821e8c67b291a11"></a> 3756<h2 class="memtitle"><span class="permalink"><a href="#aed81fbf7d01fa3d81821e8c67b291a11">◆ </a></span>MPL3115_PT_DATA_CFG_TDEFE_ENABLED</h2> 3757 3758<div class="memitem"> 3759<div class="memproto"> 3760 <table class="memname"> 3761 <tr> 3762 <td class="memname">#define MPL3115_PT_DATA_CFG_TDEFE_ENABLED   ((uint8_t) 0x01) /* Event detection enabled. Raise event flag on new */</td> 3763 </tr> 3764 </table> 3765</div><div class="memdoc"> 3766 3767<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00564">564</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3768 3769</div> 3770</div> 3771<a id="ae14b3c6e1aaf975b888235b46e15168b"></a> 3772<h2 class="memtitle"><span class="permalink"><a href="#ae14b3c6e1aaf975b888235b46e15168b">◆ </a></span>MPL3115_PT_DATA_CFG_TDEFE_MASK</h2> 3773 3774<div class="memitem"> 3775<div class="memproto"> 3776 <table class="memname"> 3777 <tr> 3778 <td class="memname">#define MPL3115_PT_DATA_CFG_TDEFE_MASK   ((uint8_t) 0x01)</td> 3779 </tr> 3780 </table> 3781</div><div class="memdoc"> 3782 3783<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00550">550</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3784 3785</div> 3786</div> 3787<a id="a17a416c9b288e5278123b84d5184adb5"></a> 3788<h2 class="memtitle"><span class="permalink"><a href="#a17a416c9b288e5278123b84d5184adb5">◆ </a></span>MPL3115_PT_DATA_CFG_TDEFE_SHIFT</h2> 3789 3790<div class="memitem"> 3791<div class="memproto"> 3792 <table class="memname"> 3793 <tr> 3794 <td class="memname">#define MPL3115_PT_DATA_CFG_TDEFE_SHIFT   ((uint8_t) 0)</td> 3795 </tr> 3796 </table> 3797</div><div class="memdoc"> 3798 3799<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00551">551</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3800 3801</div> 3802</div> 3803<a id="a60699b0f17c03b3d6fc8c52c3bb34866"></a> 3804<h2 class="memtitle"><span class="permalink"><a href="#a60699b0f17c03b3d6fc8c52c3bb34866">◆ </a></span>MPL3115_SYSMOD_SYSMOD_ACTIVE</h2> 3805 3806<div class="memitem"> 3807<div class="memproto"> 3808 <table class="memname"> 3809 <tr> 3810 <td class="memname">#define MPL3115_SYSMOD_SYSMOD_ACTIVE   ((uint8_t) 0x01) /* ACTIVE Mode. */</td> 3811 </tr> 3812 </table> 3813</div><div class="memdoc"> 3814 3815<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00461">461</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3816 3817</div> 3818</div> 3819<a id="a5fd68b02f8f9e4fdefb2ad13e3c0dbc3"></a> 3820<h2 class="memtitle"><span class="permalink"><a href="#a5fd68b02f8f9e4fdefb2ad13e3c0dbc3">◆ </a></span>MPL3115_SYSMOD_SYSMOD_MASK</h2> 3821 3822<div class="memitem"> 3823<div class="memproto"> 3824 <table class="memname"> 3825 <tr> 3826 <td class="memname">#define MPL3115_SYSMOD_SYSMOD_MASK   ((uint8_t) 0x01)</td> 3827 </tr> 3828 </table> 3829</div><div class="memdoc"> 3830 3831<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00453">453</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3832 3833</div> 3834</div> 3835<a id="aa920b97a0dbd8a3fc3b0bce2b0f12155"></a> 3836<h2 class="memtitle"><span class="permalink"><a href="#aa920b97a0dbd8a3fc3b0bce2b0f12155">◆ </a></span>MPL3115_SYSMOD_SYSMOD_SHIFT</h2> 3837 3838<div class="memitem"> 3839<div class="memproto"> 3840 <table class="memname"> 3841 <tr> 3842 <td class="memname">#define MPL3115_SYSMOD_SYSMOD_SHIFT   ((uint8_t) 0)</td> 3843 </tr> 3844 </table> 3845</div><div class="memdoc"> 3846 3847<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00454">454</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3848 3849</div> 3850</div> 3851<a id="a1c515fd5032c7ba14aa644d5c290964d"></a> 3852<h2 class="memtitle"><span class="permalink"><a href="#a1c515fd5032c7ba14aa644d5c290964d">◆ </a></span>MPL3115_SYSMOD_SYSMOD_STANDBY</h2> 3853 3854<div class="memitem"> 3855<div class="memproto"> 3856 <table class="memname"> 3857 <tr> 3858 <td class="memname">#define MPL3115_SYSMOD_SYSMOD_STANDBY   ((uint8_t) 0x00) /* STANDBY Mode. */</td> 3859 </tr> 3860 </table> 3861</div><div class="memdoc"> 3862 3863<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00460">460</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3864 3865</div> 3866</div> 3867<a id="a6e16984ded1ca5e7ba2ddbd288faad1d"></a> 3868<h2 class="memtitle"><span class="permalink"><a href="#a6e16984ded1ca5e7ba2ddbd288faad1d">◆ </a></span>MPL3115_T_MAX_LSB_MAXTD_MASK</h2> 3869 3870<div class="memitem"> 3871<div class="memproto"> 3872 <table class="memname"> 3873 <tr> 3874 <td class="memname">#define MPL3115_T_MAX_LSB_MAXTD_MASK   ((uint8_t) 0xF0)</td> 3875 </tr> 3876 </table> 3877</div><div class="memdoc"> 3878 3879<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00808">808</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3880 3881</div> 3882</div> 3883<a id="aa784ee12136024d741fce81696497afb"></a> 3884<h2 class="memtitle"><span class="permalink"><a href="#aa784ee12136024d741fce81696497afb">◆ </a></span>MPL3115_T_MAX_LSB_MAXTD_SHIFT</h2> 3885 3886<div class="memitem"> 3887<div class="memproto"> 3888 <table class="memname"> 3889 <tr> 3890 <td class="memname">#define MPL3115_T_MAX_LSB_MAXTD_SHIFT   ((uint8_t) 4)</td> 3891 </tr> 3892 </table> 3893</div><div class="memdoc"> 3894 3895<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00809">809</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3896 3897</div> 3898</div> 3899<a id="af31fe2ce2f1ec81d9896b9b7f317904d"></a> 3900<h2 class="memtitle"><span class="permalink"><a href="#af31fe2ce2f1ec81d9896b9b7f317904d">◆ </a></span>MPL3115_T_MIN_LSB_MINTD_MASK</h2> 3901 3902<div class="memitem"> 3903<div class="memproto"> 3904 <table class="memname"> 3905 <tr> 3906 <td class="memname">#define MPL3115_T_MIN_LSB_MINTD_MASK   ((uint8_t) 0xF0)</td> 3907 </tr> 3908 </table> 3909</div><div class="memdoc"> 3910 3911<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00727">727</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3912 3913</div> 3914</div> 3915<a id="ad87d79d47981c22bc7176362d24770e5"></a> 3916<h2 class="memtitle"><span class="permalink"><a href="#ad87d79d47981c22bc7176362d24770e5">◆ </a></span>MPL3115_T_MIN_LSB_MINTD_SHIFT</h2> 3917 3918<div class="memitem"> 3919<div class="memproto"> 3920 <table class="memname"> 3921 <tr> 3922 <td class="memname">#define MPL3115_T_MIN_LSB_MINTD_SHIFT   ((uint8_t) 4)</td> 3923 </tr> 3924 </table> 3925</div><div class="memdoc"> 3926 3927<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00728">728</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3928 3929</div> 3930</div> 3931<a id="a80b62e22babfe63712df92c8d48bbbcd"></a> 3932<h2 class="memtitle"><span class="permalink"><a href="#a80b62e22babfe63712df92c8d48bbbcd">◆ </a></span>MPL3115_WHOAMI_VALUE</h2> 3933 3934<div class="memitem"> 3935<div class="memproto"> 3936 <table class="memname"> 3937 <tr> 3938 <td class="memname">#define MPL3115_WHOAMI_VALUE   (0xC4)</td> 3939 </tr> 3940 </table> 3941</div><div class="memdoc"> 3942<p>Who AM I address. </p> 3943 3944<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00065">65</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3945 3946<p class="reference">Referenced by <a class="el" href="a00401_source.html#l00227">main()</a>.</p> 3947 3948</div> 3949</div> 3950<h2 class="groupheader">Typedef Documentation</h2> 3951<a id="aa48ec2d41260b631e053b86b23d441d4"></a> 3952<h2 class="memtitle"><span class="permalink"><a href="#aa48ec2d41260b631e053b86b23d441d4">◆ </a></span>MPL3115_BAR_IN_LSB_t</h2> 3953 3954<div class="memitem"> 3955<div class="memproto"> 3956 <table class="memname"> 3957 <tr> 3958 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#aa48ec2d41260b631e053b86b23d441d4">MPL3115_BAR_IN_LSB_t</a></td> 3959 </tr> 3960 </table> 3961</div><div class="memdoc"> 3962 3963<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00592">592</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3964 3965</div> 3966</div> 3967<a id="a10b324adea9f3a8c4332206d986acb8c"></a> 3968<h2 class="memtitle"><span class="permalink"><a href="#a10b324adea9f3a8c4332206d986acb8c">◆ </a></span>MPL3115_BAR_IN_MSB_t</h2> 3969 3970<div class="memitem"> 3971<div class="memproto"> 3972 <table class="memname"> 3973 <tr> 3974 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a10b324adea9f3a8c4332206d986acb8c">MPL3115_BAR_IN_MSB_t</a></td> 3975 </tr> 3976 </table> 3977</div><div class="memdoc"> 3978 3979<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00583">583</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3980 3981</div> 3982</div> 3983<a id="ab0dced61f62843fd963a0ff736549f43"></a> 3984<h2 class="memtitle"><span class="permalink"><a href="#ab0dced61f62843fd963a0ff736549f43">◆ </a></span>MPL3115_F_DATA_t</h2> 3985 3986<div class="memitem"> 3987<div class="memproto"> 3988 <table class="memname"> 3989 <tr> 3990 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#ab0dced61f62843fd963a0ff736549f43">MPL3115_F_DATA_t</a></td> 3991 </tr> 3992 </table> 3993</div><div class="memdoc"> 3994 3995<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00383">383</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 3996 3997</div> 3998</div> 3999<a id="a52f32385275cb613bf9b92104a499fd5"></a> 4000<h2 class="memtitle"><span class="permalink"><a href="#a52f32385275cb613bf9b92104a499fd5">◆ </a></span>MPL3115_OFF_H_t</h2> 4001 4002<div class="memitem"> 4003<div class="memproto"> 4004 <table class="memname"> 4005 <tr> 4006 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a52f32385275cb613bf9b92104a499fd5">MPL3115_OFF_H_t</a></td> 4007 </tr> 4008 </table> 4009</div><div class="memdoc"> 4010 4011<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01181">1181</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4012 4013</div> 4014</div> 4015<a id="a5cdeec97d9148b6d05b54b9b661e064d"></a> 4016<h2 class="memtitle"><span class="permalink"><a href="#a5cdeec97d9148b6d05b54b9b661e064d">◆ </a></span>MPL3115_OFF_P_t</h2> 4017 4018<div class="memitem"> 4019<div class="memproto"> 4020 <table class="memname"> 4021 <tr> 4022 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a5cdeec97d9148b6d05b54b9b661e064d">MPL3115_OFF_P_t</a></td> 4023 </tr> 4024 </table> 4025</div><div class="memdoc"> 4026 4027<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01161">1161</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4028 4029</div> 4030</div> 4031<a id="ab9a5ef789c751e055a9456aa945c459a"></a> 4032<h2 class="memtitle"><span class="permalink"><a href="#ab9a5ef789c751e055a9456aa945c459a">◆ </a></span>MPL3115_OFF_T_t</h2> 4033 4034<div class="memitem"> 4035<div class="memproto"> 4036 <table class="memname"> 4037 <tr> 4038 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#ab9a5ef789c751e055a9456aa945c459a">MPL3115_OFF_T_t</a></td> 4039 </tr> 4040 </table> 4041</div><div class="memdoc"> 4042 4043<p class="definition">Definition at line <a class="el" href="a00158_source.html#l01171">1171</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4044 4045</div> 4046</div> 4047<a id="ae4e74e1434042e63de21138ba44952ce"></a> 4048<h2 class="memtitle"><span class="permalink"><a href="#ae4e74e1434042e63de21138ba44952ce">◆ </a></span>MPL3115_OUT_P_CSB_t</h2> 4049 4050<div class="memitem"> 4051<div class="memproto"> 4052 <table class="memname"> 4053 <tr> 4054 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#ae4e74e1434042e63de21138ba44952ce">MPL3115_OUT_P_CSB_t</a></td> 4055 </tr> 4056 </table> 4057</div><div class="memdoc"> 4058 4059<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00093">93</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4060 4061</div> 4062</div> 4063<a id="a3bb03a14e07574c178ce325d31b75a0b"></a> 4064<h2 class="memtitle"><span class="permalink"><a href="#a3bb03a14e07574c178ce325d31b75a0b">◆ </a></span>MPL3115_OUT_P_DELTA_CSB_t</h2> 4065 4066<div class="memitem"> 4067<div class="memproto"> 4068 <table class="memname"> 4069 <tr> 4070 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a3bb03a14e07574c178ce325d31b75a0b">MPL3115_OUT_P_DELTA_CSB_t</a></td> 4071 </tr> 4072 </table> 4073</div><div class="memdoc"> 4074 4075<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00257">257</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4076 4077</div> 4078</div> 4079<a id="a35c2c10df63e32c630a88b4815cd85ec"></a> 4080<h2 class="memtitle"><span class="permalink"><a href="#a35c2c10df63e32c630a88b4815cd85ec">◆ </a></span>MPL3115_OUT_P_DELTA_MSB_t</h2> 4081 4082<div class="memitem"> 4083<div class="memproto"> 4084 <table class="memname"> 4085 <tr> 4086 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a35c2c10df63e32c630a88b4815cd85ec">MPL3115_OUT_P_DELTA_MSB_t</a></td> 4087 </tr> 4088 </table> 4089</div><div class="memdoc"> 4090 4091<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00248">248</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4092 4093</div> 4094</div> 4095<a id="af1b9d300e1fb105418ccfef662682a1b"></a> 4096<h2 class="memtitle"><span class="permalink"><a href="#af1b9d300e1fb105418ccfef662682a1b">◆ </a></span>MPL3115_OUT_P_MSB_t</h2> 4097 4098<div class="memitem"> 4099<div class="memproto"> 4100 <table class="memname"> 4101 <tr> 4102 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#af1b9d300e1fb105418ccfef662682a1b">MPL3115_OUT_P_MSB_t</a></td> 4103 </tr> 4104 </table> 4105</div><div class="memdoc"> 4106 4107<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00084">84</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4108 4109</div> 4110</div> 4111<a id="a5d22e37bf6076e0552d0db1a50a889b7"></a> 4112<h2 class="memtitle"><span class="permalink"><a href="#a5d22e37bf6076e0552d0db1a50a889b7">◆ </a></span>MPL3115_OUT_T_DELTA_MSB_t</h2> 4113 4114<div class="memitem"> 4115<div class="memproto"> 4116 <table class="memname"> 4117 <tr> 4118 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a5d22e37bf6076e0552d0db1a50a889b7">MPL3115_OUT_T_DELTA_MSB_t</a></td> 4119 </tr> 4120 </table> 4121</div><div class="memdoc"> 4122 4123<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00293">293</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4124 4125</div> 4126</div> 4127<a id="a36f7f4416ea8ba004daa329ab6dd0e8b"></a> 4128<h2 class="memtitle"><span class="permalink"><a href="#a36f7f4416ea8ba004daa329ab6dd0e8b">◆ </a></span>MPL3115_OUT_T_MSB_t</h2> 4129 4130<div class="memitem"> 4131<div class="memproto"> 4132 <table class="memname"> 4133 <tr> 4134 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a36f7f4416ea8ba004daa329ab6dd0e8b">MPL3115_OUT_T_MSB_t</a></td> 4135 </tr> 4136 </table> 4137</div><div class="memdoc"> 4138 4139<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00129">129</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4140 4141</div> 4142</div> 4143<a id="a38d264ff20f5dcc27df1b930a3e4157e"></a> 4144<h2 class="memtitle"><span class="permalink"><a href="#a38d264ff20f5dcc27df1b930a3e4157e">◆ </a></span>MPL3115_P_MAX_CSB_t</h2> 4145 4146<div class="memitem"> 4147<div class="memproto"> 4148 <table class="memname"> 4149 <tr> 4150 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a38d264ff20f5dcc27df1b930a3e4157e">MPL3115_P_MAX_CSB_t</a></td> 4151 </tr> 4152 </table> 4153</div><div class="memdoc"> 4154 4155<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00750">750</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4156 4157</div> 4158</div> 4159<a id="aa46f4c5c6ee8dfbbb05f053eecacc01b"></a> 4160<h2 class="memtitle"><span class="permalink"><a href="#aa46f4c5c6ee8dfbbb05f053eecacc01b">◆ </a></span>MPL3115_P_MAX_MSB_t</h2> 4161 4162<div class="memitem"> 4163<div class="memproto"> 4164 <table class="memname"> 4165 <tr> 4166 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#aa46f4c5c6ee8dfbbb05f053eecacc01b">MPL3115_P_MAX_MSB_t</a></td> 4167 </tr> 4168 </table> 4169</div><div class="memdoc"> 4170 4171<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00741">741</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4172 4173</div> 4174</div> 4175<a id="aac857531a29c1db44fd96dbb7a8faf88"></a> 4176<h2 class="memtitle"><span class="permalink"><a href="#aac857531a29c1db44fd96dbb7a8faf88">◆ </a></span>MPL3115_P_MIN_CSB_t</h2> 4177 4178<div class="memitem"> 4179<div class="memproto"> 4180 <table class="memname"> 4181 <tr> 4182 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#aac857531a29c1db44fd96dbb7a8faf88">MPL3115_P_MIN_CSB_t</a></td> 4183 </tr> 4184 </table> 4185</div><div class="memdoc"> 4186 4187<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00669">669</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4188 4189</div> 4190</div> 4191<a id="ac8c19948a2d178747a3f91dcca3b534f"></a> 4192<h2 class="memtitle"><span class="permalink"><a href="#ac8c19948a2d178747a3f91dcca3b534f">◆ </a></span>MPL3115_P_MIN_MSB_t</h2> 4193 4194<div class="memitem"> 4195<div class="memproto"> 4196 <table class="memname"> 4197 <tr> 4198 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#ac8c19948a2d178747a3f91dcca3b534f">MPL3115_P_MIN_MSB_t</a></td> 4199 </tr> 4200 </table> 4201</div><div class="memdoc"> 4202 4203<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00660">660</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4204 4205</div> 4206</div> 4207<a id="afb211dd82bad222751ceaf9f922be3f6"></a> 4208<h2 class="memtitle"><span class="permalink"><a href="#afb211dd82bad222751ceaf9f922be3f6">◆ </a></span>MPL3115_P_TGT_LSB_t</h2> 4209 4210<div class="memitem"> 4211<div class="memproto"> 4212 <table class="memname"> 4213 <tr> 4214 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#afb211dd82bad222751ceaf9f922be3f6">MPL3115_P_TGT_LSB_t</a></td> 4215 </tr> 4216 </table> 4217</div><div class="memdoc"> 4218 4219<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00611">611</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4220 4221</div> 4222</div> 4223<a id="a87441a0d7edde60c847667b7c106a05d"></a> 4224<h2 class="memtitle"><span class="permalink"><a href="#a87441a0d7edde60c847667b7c106a05d">◆ </a></span>MPL3115_P_TGT_MSB_t</h2> 4225 4226<div class="memitem"> 4227<div class="memproto"> 4228 <table class="memname"> 4229 <tr> 4230 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a87441a0d7edde60c847667b7c106a05d">MPL3115_P_TGT_MSB_t</a></td> 4231 </tr> 4232 </table> 4233</div><div class="memdoc"> 4234 4235<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00602">602</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4236 4237</div> 4238</div> 4239<a id="a130bdb7df393fad5c5a34e813aa8adbc"></a> 4240<h2 class="memtitle"><span class="permalink"><a href="#a130bdb7df393fad5c5a34e813aa8adbc">◆ </a></span>MPL3115_P_WND_LSB_t</h2> 4241 4242<div class="memitem"> 4243<div class="memproto"> 4244 <table class="memname"> 4245 <tr> 4246 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a130bdb7df393fad5c5a34e813aa8adbc">MPL3115_P_WND_LSB_t</a></td> 4247 </tr> 4248 </table> 4249</div><div class="memdoc"> 4250 4251<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00640">640</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4252 4253</div> 4254</div> 4255<a id="a8c26ac0eb10d3879a0aa884100fe6970"></a> 4256<h2 class="memtitle"><span class="permalink"><a href="#a8c26ac0eb10d3879a0aa884100fe6970">◆ </a></span>MPL3115_P_WND_MSB_t</h2> 4257 4258<div class="memitem"> 4259<div class="memproto"> 4260 <table class="memname"> 4261 <tr> 4262 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a8c26ac0eb10d3879a0aa884100fe6970">MPL3115_P_WND_MSB_t</a></td> 4263 </tr> 4264 </table> 4265</div><div class="memdoc"> 4266 4267<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00631">631</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4268 4269</div> 4270</div> 4271<a id="aeb6260bf1468bc6c399536151a6e8abd"></a> 4272<h2 class="memtitle"><span class="permalink"><a href="#aeb6260bf1468bc6c399536151a6e8abd">◆ </a></span>MPL3115_STATUS_t</h2> 4273 4274<div class="memitem"> 4275<div class="memproto"> 4276 <table class="memname"> 4277 <tr> 4278 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#aeb6260bf1468bc6c399536151a6e8abd">MPL3115_STATUS_t</a></td> 4279 </tr> 4280 </table> 4281</div><div class="memdoc"> 4282 4283<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00074">74</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4284 4285</div> 4286</div> 4287<a id="a358a07b8c2e905da5b3c6d6f709a8f56"></a> 4288<h2 class="memtitle"><span class="permalink"><a href="#a358a07b8c2e905da5b3c6d6f709a8f56">◆ </a></span>MPL3115_T_MAX_MSB_t</h2> 4289 4290<div class="memitem"> 4291<div class="memproto"> 4292 <table class="memname"> 4293 <tr> 4294 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a358a07b8c2e905da5b3c6d6f709a8f56">MPL3115_T_MAX_MSB_t</a></td> 4295 </tr> 4296 </table> 4297</div><div class="memdoc"> 4298 4299<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00786">786</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4300 4301</div> 4302</div> 4303<a id="a1195eafecc03e6b53b87ec09c67ab403"></a> 4304<h2 class="memtitle"><span class="permalink"><a href="#a1195eafecc03e6b53b87ec09c67ab403">◆ </a></span>MPL3115_T_MIN_MSB_t</h2> 4305 4306<div class="memitem"> 4307<div class="memproto"> 4308 <table class="memname"> 4309 <tr> 4310 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a1195eafecc03e6b53b87ec09c67ab403">MPL3115_T_MIN_MSB_t</a></td> 4311 </tr> 4312 </table> 4313</div><div class="memdoc"> 4314 4315<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00705">705</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4316 4317</div> 4318</div> 4319<a id="a80ceabbb7bd356d87beffd6af15e4d38"></a> 4320<h2 class="memtitle"><span class="permalink"><a href="#a80ceabbb7bd356d87beffd6af15e4d38">◆ </a></span>MPL3115_T_TGT_t</h2> 4321 4322<div class="memitem"> 4323<div class="memproto"> 4324 <table class="memname"> 4325 <tr> 4326 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a80ceabbb7bd356d87beffd6af15e4d38">MPL3115_T_TGT_t</a></td> 4327 </tr> 4328 </table> 4329</div><div class="memdoc"> 4330 4331<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00621">621</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4332 4333</div> 4334</div> 4335<a id="a58f4a99e6fecdbef6145f67f6fb16a3d"></a> 4336<h2 class="memtitle"><span class="permalink"><a href="#a58f4a99e6fecdbef6145f67f6fb16a3d">◆ </a></span>MPL3115_T_WND_t</h2> 4337 4338<div class="memitem"> 4339<div class="memproto"> 4340 <table class="memname"> 4341 <tr> 4342 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a58f4a99e6fecdbef6145f67f6fb16a3d">MPL3115_T_WND_t</a></td> 4343 </tr> 4344 </table> 4345</div><div class="memdoc"> 4346 4347<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00650">650</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4348 4349</div> 4350</div> 4351<a id="a3cd38775cbbc3272e326e8956c8bcedd"></a> 4352<h2 class="memtitle"><span class="permalink"><a href="#a3cd38775cbbc3272e326e8956c8bcedd">◆ </a></span>MPL3115_TIME_DLY_t</h2> 4353 4354<div class="memitem"> 4355<div class="memproto"> 4356 <table class="memname"> 4357 <tr> 4358 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a3cd38775cbbc3272e326e8956c8bcedd">MPL3115_TIME_DLY_t</a></td> 4359 </tr> 4360 </table> 4361</div><div class="memdoc"> 4362 4363<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00431">431</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4364 4365</div> 4366</div> 4367<a id="a65eb5c40f431e32439c4ea4f0c986fbb"></a> 4368<h2 class="memtitle"><span class="permalink"><a href="#a65eb5c40f431e32439c4ea4f0c986fbb">◆ </a></span>MPL3115_WHO_AM_I_t</h2> 4369 4370<div class="memitem"> 4371<div class="memproto"> 4372 <table class="memname"> 4373 <tr> 4374 <td class="memname">typedef uint8_t <a class="el" href="a00158.html#a65eb5c40f431e32439c4ea4f0c986fbb">MPL3115_WHO_AM_I_t</a></td> 4375 </tr> 4376 </table> 4377</div><div class="memdoc"> 4378 4379<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00329">329</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4380 4381</div> 4382</div> 4383<h2 class="groupheader">Enumeration Type Documentation</h2> 4384<a id="a5e7fba63eebd783231b18f414e8a138f"></a> 4385<h2 class="memtitle"><span class="permalink"><a href="#a5e7fba63eebd783231b18f414e8a138f">◆ </a></span>anonymous enum</h2> 4386 4387<div class="memitem"> 4388<div class="memproto"> 4389 <table class="memname"> 4390 <tr> 4391 <td class="memname">anonymous enum</td> 4392 </tr> 4393 </table> 4394</div><div class="memdoc"> 4395<p>MPL3115 Sensor Internal Registers </p> 4396<table class="fieldtable"> 4397<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fac696f351b06fd13728ed9e4081407ea8"></a>MPL3115_STATUS </td><td class="fielddoc"></td></tr> 4398<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa4b32656f953887759d9479b54ad7f478"></a>MPL3115_OUT_P_MSB </td><td class="fielddoc"></td></tr> 4399<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138faebbc6302fa6ae42e8f30bbb385cd0f50"></a>MPL3115_OUT_P_CSB </td><td class="fielddoc"></td></tr> 4400<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138faeed07b8649c8cdbc0c019076e7783de2"></a>MPL3115_OUT_P_LSB </td><td class="fielddoc"></td></tr> 4401<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa19a01cbd71c0958c0292fc14f92d1eae"></a>MPL3115_OUT_T_MSB </td><td class="fielddoc"></td></tr> 4402<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa425080d97f0ca9005c814125df9d1b16"></a>MPL3115_OUT_T_LSB </td><td class="fielddoc"></td></tr> 4403<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa6e1f4185c6bca5d6093442f512deb974"></a>MPL3115_DR_STATUS </td><td class="fielddoc"></td></tr> 4404<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fac9a7536848baaf412a05d1e61427bce4"></a>MPL3115_OUT_P_DELTA_MSB </td><td class="fielddoc"></td></tr> 4405<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa11c61b39a12210b48877baa3913f4e24"></a>MPL3115_OUT_P_DELTA_CSB </td><td class="fielddoc"></td></tr> 4406<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138faa6540022336a473d63f43da8ca25bfa9"></a>MPL3115_OUT_P_DELTA_LSB </td><td class="fielddoc"></td></tr> 4407<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fafb0c62bb6fdcf3597f3121a11f4abe1d"></a>MPL3115_OUT_T_DELTA_MSB </td><td class="fielddoc"></td></tr> 4408<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa13683bccaddb007fe3e73a76fd5cd2bc"></a>MPL3115_OUT_T_DELTA_LSB </td><td class="fielddoc"></td></tr> 4409<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fabed78897e96609e9cfe9511e93fcc376"></a>MPL3115_WHO_AM_I </td><td class="fielddoc"></td></tr> 4410<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138faeabe95d2f044c687218d61a67709997b"></a>MPL3115_F_STATUS </td><td class="fielddoc"></td></tr> 4411<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138faed5aec44153fef483b5bab0c8a4030e2"></a>MPL3115_F_DATA </td><td class="fielddoc"></td></tr> 4412<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa886b40b5039aa812e9a4f305673a6976"></a>MPL3115_F_SETUP </td><td class="fielddoc"></td></tr> 4413<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa88d0ab0b20c0dad6c03125afa65243a2"></a>MPL3115_TIME_DLY </td><td class="fielddoc"></td></tr> 4414<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa41aa199a4bdabe49f6e37f006cb27e9c"></a>MPL3115_SYSMOD </td><td class="fielddoc"></td></tr> 4415<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa66c2f93194b8725513cbfba3f4792a6e"></a>MPL3115_INT_SOURCE </td><td class="fielddoc"></td></tr> 4416<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa3a6cac6298c53c71338701340e44e91e"></a>MPL3115_PT_DATA_CFG </td><td class="fielddoc"></td></tr> 4417<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fae80d116774740d147186dc92019a7ed0"></a>MPL3115_BAR_IN_MSB </td><td class="fielddoc"></td></tr> 4418<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa623c60eef709a16a40091aad61aa3a1e"></a>MPL3115_BAR_IN_LSB </td><td class="fielddoc"></td></tr> 4419<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fad3e73722ce305b1049cfcf08973ad86b"></a>MPL3115_P_TGT_MSB </td><td class="fielddoc"></td></tr> 4420<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa85cfc3cac13d56d7f156d96d92bc8334"></a>MPL3115_P_TGT_LSB </td><td class="fielddoc"></td></tr> 4421<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa032e20d3fe40813052ae775e492dc184"></a>MPL3115_T_TGT </td><td class="fielddoc"></td></tr> 4422<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fac408622e3bcb422554a15d4ae4bd4b96"></a>MPL3115_P_WND_MSB </td><td class="fielddoc"></td></tr> 4423<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa8ea110374ba5a8ae159d5fa28a8782e1"></a>MPL3115_P_WND_LSB </td><td class="fielddoc"></td></tr> 4424<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138faff927cef6ba3e71a574707b8cdb16707"></a>MPL3115_T_WND </td><td class="fielddoc"></td></tr> 4425<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fadd4c4725ddcf17a7884789f323f41244"></a>MPL3115_P_MIN_MSB </td><td class="fielddoc"></td></tr> 4426<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa9e3427cd9cf877757c9cdcb6e0491296"></a>MPL3115_P_MIN_CSB </td><td class="fielddoc"></td></tr> 4427<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa9a0990787e320158756a56f2f6e33bab"></a>MPL3115_P_MIN_LSB </td><td class="fielddoc"></td></tr> 4428<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138faa5a0cf9aaba08a005bcd3e8df1dd1460"></a>MPL3115_T_MIN_MSB </td><td class="fielddoc"></td></tr> 4429<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa459a80b9097d1682b83a66122d978498"></a>MPL3115_T_MIN_LSB </td><td class="fielddoc"></td></tr> 4430<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa29d9016b4b095eab3c11c62802d0b52b"></a>MPL3115_P_MAX_MSB </td><td class="fielddoc"></td></tr> 4431<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa58b4ef369bc016529e6b751d320b12a7"></a>MPL3115_P_MAX_CSB </td><td class="fielddoc"></td></tr> 4432<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa840c36411fa60a417bb134e814c77ac3"></a>MPL3115_P_MAX_LSB </td><td class="fielddoc"></td></tr> 4433<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fad60a7d08dfcfe61948d88af641a17971"></a>MPL3115_T_MAX_MSB </td><td class="fielddoc"></td></tr> 4434<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138faa94dddc4189c317b4979b2c17f5e5e61"></a>MPL3115_T_MAX_LSB </td><td class="fielddoc"></td></tr> 4435<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fae97689a65dd8c6b5b8b6a1fa495173ff"></a>MPL3115_CTRL_REG1 </td><td class="fielddoc"></td></tr> 4436<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa0dfa407b266ae466f075e7877f2d348d"></a>MPL3115_CTRL_REG2 </td><td class="fielddoc"></td></tr> 4437<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa8d52d3ccafa6a1dd31f9c687d79fb26d"></a>MPL3115_CTRL_REG3 </td><td class="fielddoc"></td></tr> 4438<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa3a1254faf6b314fbd34f2e43c69d19de"></a>MPL3115_CTRL_REG4 </td><td class="fielddoc"></td></tr> 4439<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa0d3fada88b16401cbdcf76e2fb8e5560"></a>MPL3115_CTRL_REG5 </td><td class="fielddoc"></td></tr> 4440<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138faae65077bd2e0d039d0d8613b50041d1b"></a>MPL3115_OFF_P </td><td class="fielddoc"></td></tr> 4441<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa4c880f709ee92bb48faa9c72dab56818"></a>MPL3115_OFF_T </td><td class="fielddoc"></td></tr> 4442<tr><td class="fieldname"><a id="a5e7fba63eebd783231b18f414e8a138fa4c1f6517a5115b80b89ee20458e85960"></a>MPL3115_OFF_H </td><td class="fielddoc"></td></tr> 4443</table> 4444 4445<p class="definition">Definition at line <a class="el" href="a00158_source.html#l00015">15</a> of file <a class="el" href="a00158_source.html">mpl3115.h</a>.</p> 4446 4447</div> 4448</div> 4449</div><!-- contents --> 4450 4451<hr class="footer"/><address class="footer"><small> 4452© Copyright 2016-2022 NXP. All Rights Reserved. SPDX-License-Identifier: BSD-3-Clause 4453</small></address> 4454</body> 4455</html> 4456
