1 /*
2  * SPDX-FileCopyrightText: Copyright 2022 Arm Limited and/or its affiliates <open-source-office@arm.com>
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Licensed under the Apache License, Version 2.0 (the License); you may
7  * not use this file except in compliance with the License.
8  * You may obtain a copy of the License at
9  *
10  * www.apache.org/licenses/LICENSE-2.0
11  *
12  * Unless required by applicable law or agreed to in writing, software
13  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15  * See the License for the specific language governing permissions and
16  * limitations under the License.
17  */
18 
19 /* ----------------------------------------------------------------------
20  * Project:      CMSIS NN Library
21  * Title:        arm_max_pool_s16.c
22  * Description:  Pooling function implementations
23  *
24  * $Date:        26 October 2022
25  * $Revision:    V.2.1.2
26  *
27  * Target Processor:  Cortex-M CPUs
28  *
29  * -------------------------------------------------------------------- */
30 
31 #include "arm_nnfunctions.h"
32 #include "arm_nnsupportfunctions.h"
33 
compare_and_replace_if_larger(int16_t * base,const int16_t * target,int32_t length)34 static void compare_and_replace_if_larger(int16_t *base, const int16_t *target, int32_t length)
35 {
36 #if defined(ARM_MATH_MVEI)
37     int32_t loop_count = (length + 7) / 8;
38     for (int i = 0; i < loop_count; i++)
39     {
40         mve_pred16_t p = vctp16q((uint32_t)length);
41         const int16x8_t op_1 = vldrhq_z_s16(base, p);
42         const int16x8_t op_2 = vldrhq_z_s16(target, p);
43         const int16x8_t max = vmaxq_s16(op_1, op_2);
44         vstrhq_p_s16(base, max, p);
45         base += 8;
46         target += 8;
47         length -= 8;
48     }
49 #else
50     int16_t *dst = base;
51     const int16_t *src = target;
52     union arm_nnword ref_max;
53     union arm_nnword comp_max;
54     int32_t cnt = length >> 1;
55 
56     while (cnt > 0l)
57     {
58         ref_max.word = arm_nn_read_s16x2(dst);
59         comp_max.word = arm_nn_read_q15x2_ia(&src);
60 
61         if (comp_max.half_words[0] > ref_max.half_words[0])
62         {
63             ref_max.half_words[0] = comp_max.half_words[0];
64         }
65         if (comp_max.half_words[1] > ref_max.half_words[1])
66         {
67             ref_max.half_words[1] = comp_max.half_words[1];
68         }
69 
70         arm_nn_write_q15x2_ia(&dst, ref_max.word);
71 
72         cnt--;
73     }
74 
75     if (length & 0x1)
76     {
77         if (*src > *dst)
78         {
79             *dst = *src;
80         }
81     }
82 #endif
83 }
84 
clamp_output(int16_t * source,int32_t length,const int16_t act_min,const int16_t act_max)85 static void clamp_output(int16_t *source, int32_t length, const int16_t act_min, const int16_t act_max)
86 {
87 #if defined(ARM_MATH_MVEI)
88     const int16x8_t min = vdupq_n_s16((int16_t)act_min);
89     const int16x8_t max = vdupq_n_s16((int16_t)act_max);
90 
91     int32_t loop_count = (length + 7) / 8;
92     for (int i = 0; i < loop_count; i++)
93     {
94         mve_pred16_t p = vctp16q((uint32_t)length);
95         length -= 8;
96         const int16x8_t src = vldrhq_z_s16(source, p);
97         int16x8_t res = vmaxq_x_s16(src, min, p);
98         res = vminq_x_s16(res, max, p);
99         vstrhq_p_s16(source, res, p);
100         source += 8;
101     }
102 #else
103     union arm_nnword in;
104     int32_t cnt = length >> 1;
105 
106     while (cnt > 0l)
107     {
108         in.word = arm_nn_read_s16x2(source);
109 
110         in.half_words[0] = MAX(in.half_words[0], act_min);
111         in.half_words[0] = MIN(in.half_words[0], act_max);
112         in.half_words[1] = MAX(in.half_words[1], act_min);
113         in.half_words[1] = MIN(in.half_words[1], act_max);
114 
115         arm_nn_write_q15x2_ia(&source, in.word);
116         cnt--;
117     }
118 
119     if (length & 0x1)
120     {
121         int16_t comp = *source;
122         comp = MAX(comp, act_min);
123         comp = MIN(comp, act_max);
124         *source = comp;
125     }
126 #endif
127 }
128 
129 /**
130  *  @ingroup Public
131  */
132 
133 /**
134  * @addtogroup Pooling
135  * @{
136  */
137 
138 /*
139  * Optimized s16 max pooling function
140  *
141  * Refer to header file for details.
142  *
143  */
144 
arm_max_pool_s16(const cmsis_nn_context * ctx,const cmsis_nn_pool_params * pool_params,const cmsis_nn_dims * input_dims,const int16_t * src,const cmsis_nn_dims * filter_dims,const cmsis_nn_dims * output_dims,int16_t * dst)145 arm_cmsis_nn_status arm_max_pool_s16(const cmsis_nn_context *ctx,
146                                      const cmsis_nn_pool_params *pool_params,
147                                      const cmsis_nn_dims *input_dims,
148                                      const int16_t *src,
149                                      const cmsis_nn_dims *filter_dims,
150                                      const cmsis_nn_dims *output_dims,
151                                      int16_t *dst)
152 {
153     const int32_t input_y = input_dims->h;
154     const int32_t input_x = input_dims->w;
155     const int32_t output_y = output_dims->h;
156     const int32_t output_x = output_dims->w;
157     const int32_t stride_y = pool_params->stride.h;
158     const int32_t stride_x = pool_params->stride.w;
159     const int32_t kernel_y = filter_dims->h;
160     const int32_t kernel_x = filter_dims->w;
161     const int32_t pad_y = pool_params->padding.h;
162     const int32_t pad_x = pool_params->padding.w;
163     const int16_t act_min = pool_params->activation.min;
164     const int16_t act_max = pool_params->activation.max;
165     const int32_t channel_in = input_dims->c;
166     (void)ctx;
167     int16_t *dst_base = dst;
168 
169     for (int i_y = 0, base_idx_y = -pad_y; i_y < output_y; base_idx_y += stride_y, i_y++)
170     {
171         for (int i_x = 0, base_idx_x = -pad_x; i_x < output_x; base_idx_x += stride_x, i_x++)
172         {
173             /* Condition for kernel start dimension: (base_idx_<x,y> + kernel_<x,y>_start) >= 0 */
174             const int32_t ker_y_start = MAX(0, -base_idx_y);
175             const int32_t ker_x_start = MAX(0, -base_idx_x);
176 
177             /* Condition for kernel end dimension: (base_idx_<x,y> + kernel_<x,y>_end) < dim_src_<width,height> */
178             const int32_t kernel_y_end = MIN(kernel_y, input_y - base_idx_y);
179             const int32_t kernel_x_end = MIN(kernel_x, input_x - base_idx_x);
180 
181             int count = 0;
182 
183             for (int k_y = ker_y_start; k_y < kernel_y_end; k_y++)
184             {
185                 for (int k_x = ker_x_start; k_x < kernel_x_end; k_x++)
186                 {
187                     const int16_t *start = src + channel_in * (k_x + base_idx_x + (k_y + base_idx_y) * input_x);
188 
189                     if (count == 0)
190                     {
191                         memcpy(dst, start, channel_in * sizeof(int16_t));
192                         count++;
193                     }
194                     else
195                     {
196                         compare_and_replace_if_larger(dst, start, channel_in);
197                     }
198                 }
199             }
200             /* 'count' is expected to be non-zero here. */
201             dst += channel_in;
202         }
203     }
204 
205     clamp_output(dst_base, output_x * output_y * channel_in, act_min, act_max);
206 
207     return ARM_CMSIS_NN_SUCCESS;
208 }
209 
210 /**
211  * @} end of Pooling group
212  */
213