1 /*
2 * SPDX-FileCopyrightText: Copyright 2010-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19 /* ----------------------------------------------------------------------
20 * Project: CMSIS NN Library
21 * Title: arm_convolve_s8.c
22 * Description: s8 version of convolution using symmetric quantization.
23 *
24 * $Date: 21 Mars 2023
25 * $Revision: V.3.4.0
26 *
27 * Target : Arm(R) M-Profile Architecture
28 *
29 * -------------------------------------------------------------------- */
30
31 #include "arm_nnfunctions.h"
32 #include "arm_nnsupportfunctions.h"
33
34 /**
35 * @ingroup Public
36 */
37
38 /**
39 * @addtogroup NNConv
40 * @{
41 */
42
43 /*
44 * Basic s8 convolution function.
45 *
46 * Refer header file for details. Optimal use case for the DSP/MVE implementation is when input and output channels
47 * are multiples of 4 or atleast greater than 4.
48 *
49 */
arm_convolve_s8(const cmsis_nn_context * ctx,const cmsis_nn_conv_params * conv_params,const cmsis_nn_per_channel_quant_params * quant_params,const cmsis_nn_dims * input_dims,const int8_t * input_data,const cmsis_nn_dims * filter_dims,const int8_t * filter_data,const cmsis_nn_dims * bias_dims,const int32_t * bias_data,const cmsis_nn_dims * output_dims,int8_t * output_data)50 arm_cmsis_nn_status arm_convolve_s8(const cmsis_nn_context *ctx,
51 const cmsis_nn_conv_params *conv_params,
52 const cmsis_nn_per_channel_quant_params *quant_params,
53 const cmsis_nn_dims *input_dims,
54 const int8_t *input_data,
55 const cmsis_nn_dims *filter_dims,
56 const int8_t *filter_data,
57 const cmsis_nn_dims *bias_dims,
58 const int32_t *bias_data,
59 const cmsis_nn_dims *output_dims,
60 int8_t *output_data)
61 {
62 (void)bias_dims;
63
64 if (ctx->buf == NULL)
65 {
66 return ARM_CMSIS_NN_ARG_ERROR;
67 }
68 int16_t *buffer_a = (int16_t *)ctx->buf;
69
70 const int32_t input_batches = input_dims->n;
71 const uint16_t input_x = input_dims->w;
72 const uint16_t input_y = input_dims->h;
73 const uint16_t input_ch = input_dims->c;
74 const uint16_t kernel_x = filter_dims->w;
75 const uint16_t kernel_y = filter_dims->h;
76 const uint16_t output_x = output_dims->w;
77 const uint16_t output_y = output_dims->h;
78 const uint16_t output_ch = output_dims->c;
79
80 const uint16_t pad_x = conv_params->padding.w;
81 const uint16_t pad_y = conv_params->padding.h;
82 const uint16_t stride_x = conv_params->stride.w;
83 const uint16_t stride_y = conv_params->stride.h;
84 const int32_t dilation_x = conv_params->dilation.w;
85 const int32_t dilation_y = conv_params->dilation.h;
86 const int32_t out_offset = conv_params->output_offset;
87 const int32_t out_activation_min = conv_params->activation.min;
88 const int32_t out_activation_max = conv_params->activation.max;
89 const int32_t rhs_cols = kernel_x * kernel_y * input_ch;
90 const int32_t input_offset = conv_params->input_offset;
91
92 int32_t *output_mult = quant_params->multiplier;
93 int32_t *output_shift = quant_params->shift;
94
95 int i_batch;
96 for (i_batch = 0; i_batch < input_batches; i_batch++)
97 {
98
99 #if defined(ARM_MATH_MVEI)
100 /* Generate up to four columns from the input tensor a GEMM computation */
101 int8_t *im2col_buf = (int8_t *)buffer_a;
102 const int32_t rhs_rows = output_dims->c;
103 #else
104 /* Use as a ping-pong buffer for unordered elements */
105 int8_t *im2col_buf = (int8_t *)buffer_a + rhs_cols * 2;
106 int16_t *im2col_buf_start_s16 = buffer_a;
107 #endif
108 int8_t *out = output_data;
109 int32_t lhs_rows = 0;
110
111 /* This part implements the im2col function */
112 for (int i_out_y = 0; i_out_y < output_y; i_out_y++)
113 {
114 for (int i_out_x = 0; i_out_x < output_x; i_out_x++)
115 {
116 const int32_t base_idx_x = stride_x * i_out_x - pad_x;
117 const int32_t base_idx_y = stride_y * i_out_y - pad_y;
118
119 for (int32_t i_ker_y = 0; i_ker_y < kernel_y; i_ker_y++)
120 {
121 for (int32_t i_ker_x = 0; i_ker_x < kernel_x; i_ker_x++)
122 {
123 const int32_t k_y = base_idx_y + dilation_y * i_ker_y;
124 const int32_t k_x = base_idx_x + dilation_x * i_ker_x;
125
126 if (k_y < 0 || k_y >= input_y || k_x < 0 || k_x >= input_x)
127 {
128 arm_memset_s8(im2col_buf, (int8_t)-input_offset, sizeof(int8_t) * input_ch);
129 }
130 else
131 {
132 arm_memcpy_s8(im2col_buf, input_data + (k_y * input_x + k_x) * input_ch, input_ch);
133 }
134 im2col_buf += input_ch;
135 }
136 }
137 lhs_rows++;
138
139 #if defined(ARM_MATH_MVEI)
140 /* Computation is filed for every 4 columns */
141 if (lhs_rows == 4)
142 {
143 arm_nn_mat_mult_nt_t_s8((int8_t *)buffer_a,
144 filter_data,
145 bias_data,
146 out,
147 output_mult,
148 output_shift,
149 lhs_rows,
150 rhs_rows,
151 rhs_cols,
152 input_offset,
153 out_offset,
154 out_activation_min,
155 out_activation_max,
156 rhs_cols);
157 out += lhs_rows * rhs_rows;
158
159 lhs_rows = 0;
160 im2col_buf = (int8_t *)buffer_a;
161 }
162 #else
163 #if defined(ARM_MATH_DSP)
164 /* Copy one column with input offset and no ordering */
165 arm_s8_to_s16_unordered_with_offset(
166 im2col_buf - rhs_cols, im2col_buf_start_s16, rhs_cols, (int16_t)input_offset);
167 #else
168 arm_q7_to_q15_with_offset(im2col_buf - rhs_cols, im2col_buf_start_s16, rhs_cols, (int16_t)input_offset);
169 #endif
170 im2col_buf_start_s16 += rhs_cols;
171
172 if (lhs_rows == 2)
173 {
174 out = arm_nn_mat_mult_kernel_s8_s16(filter_data,
175 buffer_a,
176 output_ch,
177 output_shift,
178 output_mult,
179 out_offset,
180 out_activation_min,
181 out_activation_max,
182 rhs_cols,
183 bias_data,
184 out);
185
186 /* counter reset */
187 im2col_buf_start_s16 = buffer_a;
188 im2col_buf = (int8_t *)buffer_a + rhs_cols * 2;
189 lhs_rows = 0;
190 }
191 #endif
192 }
193
194 if (out == NULL)
195 {
196 return ARM_CMSIS_NN_NO_IMPL_ERROR;
197 }
198 }
199
200 /* Handle left over columns */
201 if (lhs_rows != 0)
202 {
203 #if defined(ARM_MATH_MVEI)
204 arm_nn_mat_mult_nt_t_s8((int8_t *)buffer_a,
205 filter_data,
206 bias_data,
207 out,
208 output_mult,
209 output_shift,
210 lhs_rows,
211 rhs_rows,
212 rhs_cols,
213 input_offset,
214 out_offset,
215 out_activation_min,
216 out_activation_max,
217 rhs_cols);
218 out += lhs_rows * rhs_rows;
219 lhs_rows = 0;
220 im2col_buf = (int8_t *)buffer_a;
221 #else // #if defined(ARM_MATH_MVEI)
222
223 const int8_t *ker_a = filter_data;
224 int i;
225
226 for (i = 0; i < output_ch; i++)
227 {
228 /* Load the accumulator with bias first */
229 int32_t sum = 0;
230 if (bias_data)
231 {
232 sum = bias_data[i];
233 }
234
235 const int16_t *ip_as_col = buffer_a;
236
237 #if defined(ARM_MATH_DSP)
238 /* 4 multiply and accumulates are done in one loop. */
239 uint16_t col_count = rhs_cols / 4;
240 while (col_count)
241 {
242 int32_t ker_a1, ker_a2;
243 int32_t ip_b1, ip_b2;
244
245 ker_a = read_and_pad_reordered(ker_a, &ker_a1, &ker_a2);
246
247 ip_b1 = arm_nn_read_q15x2_ia(&ip_as_col);
248 sum = SMLAD(ker_a1, ip_b1, sum);
249 ip_b2 = arm_nn_read_q15x2_ia(&ip_as_col);
250 sum = SMLAD(ker_a2, ip_b2, sum);
251
252 col_count--;
253 }
254 /* Handle left over mac */
255 col_count = rhs_cols & 0x3;
256 #else
257 uint16_t col_count = rhs_cols;
258 #endif
259 while (col_count)
260 {
261 int8_t ker_a1 = *ker_a++;
262 int16_t ip_b1 = *ip_as_col++;
263 sum += ker_a1 * ip_b1;
264 col_count--;
265 }
266
267 sum = arm_nn_requantize(sum, output_mult[i], output_shift[i]);
268 sum += out_offset;
269 sum = MAX(sum, out_activation_min);
270 sum = MIN(sum, out_activation_max);
271 *out++ = (int8_t)sum;
272 }
273 #endif // #if defined(ARM_MATH_MVEI)
274 }
275
276 /* Advance to the next batch */
277 input_data += (input_x * input_y * input_ch);
278 output_data += (output_x * output_y * output_ch);
279 }
280
281 /* Return to application */
282 return ARM_CMSIS_NN_SUCCESS;
283 }
284
285 /**
286 * @} end of NNConv group
287 */
288
