1 /*
2 * SPDX-FileCopyrightText: Copyright 2022, 2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19 /* ----------------------------------------------------------------------
20 * Project: CMSIS NN Library
21 * Title: arm_elementwise_mul_acc_s16
22 * Description: Accumulative element wise multiplication
23 *
24 * $Date: 19 January 2024
25 * $Revision: V.1.0.0
26 *
27 * Target : Arm(R) M-Profile Architecture
28 *
29 * -------------------------------------------------------------------- */
30
31 #include "arm_nnfunctions.h"
32 #include "arm_nnsupportfunctions.h"
33
34 /**
35 * @ingroup Public
36 */
37
38 /**
39 * @addtogroup groupElementwise
40 * @{
41 */
42
43 /**
44 * @brief s16 element wise accumulative multiplication of two vectors
45 *
46 * @note Refer header file for details.
47 *
48 */
arm_elementwise_mul_acc_s16(const int16_t * input_1_vect,const int16_t * input_2_vect,const int32_t input_1_offset,const int32_t input_2_offset,int16_t * output,const int32_t out_offset,const int32_t out_mult,const int32_t out_shift,const int32_t out_activation_min,const int32_t out_activation_max,const int32_t block_size)49 arm_cmsis_nn_status arm_elementwise_mul_acc_s16(const int16_t *input_1_vect,
50 const int16_t *input_2_vect,
51 const int32_t input_1_offset,
52 const int32_t input_2_offset,
53 int16_t *output,
54 const int32_t out_offset,
55 const int32_t out_mult,
56 const int32_t out_shift,
57 const int32_t out_activation_min,
58 const int32_t out_activation_max,
59 const int32_t block_size)
60 {
61 (void)input_1_offset;
62 (void)input_2_offset;
63 (void)out_offset;
64 int32_t loop_count;
65
66 const int32_t activation_max = (out_activation_max > 0) ? out_activation_max : NN_Q15_MAX;
67 const int32_t activation_min = (out_activation_max > 0) ? out_activation_min : NN_Q15_MIN;
68
69 #if defined(ARM_MATH_MVEI)
70
71 loop_count = block_size;
72
73 while (loop_count > 0)
74 {
75 mve_pred16_t pred = vctp32q(loop_count);
76
77 int32x4_t input_1 = vldrhq_z_s32(input_1_vect, pred);
78 int32x4_t input_2 = vldrhq_z_s32(input_2_vect, pred);
79
80 int32x4_t res_0 = vmulq_s32(input_1, input_2);
81
82 res_0 = arm_requantize_mve_32x4(res_0, vdupq_n_s32(out_mult), vdupq_n_s32(out_shift));
83
84 res_0 = vaddq_s32(res_0, vldrhq_z_s32(output, pred));
85
86 res_0 = vmaxq_s32(res_0, vdupq_n_s32(activation_min));
87 res_0 = vminq_s32(res_0, vdupq_n_s32(activation_max));
88
89 vstrhq_p_s32(output, res_0, pred);
90 input_1_vect += 4;
91 input_2_vect += 4;
92
93 output += 4;
94 loop_count -= 4;
95 }
96
97 #else
98 int32_t input_1;
99 int32_t input_2;
100 int32_t mul_res;
101 int32_t two_halfword_1, two_halfword_2;
102 int16_t mul_1, mul_2;
103 loop_count = block_size / 2;
104
105 while (loop_count > 0)
106 {
107 two_halfword_1 = arm_nn_read_q15x2_ia(&input_1_vect);
108 two_halfword_2 = arm_nn_read_q15x2_ia(&input_2_vect);
109
110 #if defined(ARM_MATH_DSP)
111 mul_res = SMULBB(two_halfword_1, two_halfword_2);
112 #else
113 input_1 = (int16_t)(two_halfword_1 & 0xFFFF);
114 input_2 = (int16_t)(two_halfword_2 & 0xFFFF);
115 mul_res = input_1 * input_2;
116 #endif
117 mul_res = arm_nn_requantize(mul_res, out_mult, out_shift);
118 mul_res += output[0];
119
120 mul_res = MAX(mul_res, activation_min);
121 mul_res = MIN(mul_res, activation_max);
122 mul_1 = (int16_t)mul_res;
123
124 #if defined(ARM_MATH_DSP)
125 mul_res = SMULTT(two_halfword_1, two_halfword_2);
126 #else
127 input_1 = (int16_t)(two_halfword_1 >> 16);
128 input_2 = (int16_t)(two_halfword_2 >> 16);
129 mul_res = input_1 * input_2;
130 #endif
131 mul_res = arm_nn_requantize(mul_res, out_mult, out_shift);
132 mul_res += output[1];
133 mul_res = MAX(mul_res, activation_min);
134 mul_res = MIN(mul_res, activation_max);
135 mul_2 = (int16_t)mul_res;
136
137 arm_nn_write_q15x2_ia(&output, PACK_Q15x2_32x1(mul_1, mul_2));
138
139 loop_count--;
140 }
141 loop_count = block_size & 0x1;
142
143 while (loop_count > 0)
144 {
145
146 input_1 = *input_1_vect++;
147 input_2 = *input_2_vect++;
148
149 mul_res = input_1 * input_2;
150
151 mul_res = arm_nn_requantize(mul_res, out_mult, out_shift);
152 mul_res += output[0];
153
154 mul_res = MAX(mul_res, activation_min);
155 mul_res = MIN(mul_res, activation_max);
156
157 *output++ = (int16_t)mul_res;
158
159 loop_count--;
160 }
161 #endif // #if defined(ARM_MATH_MVEI)
162 return ARM_CMSIS_NN_SUCCESS;
163 }
164
165 /**
166 * @} end of Doxygen group
167 */
168
