1 /*
2 * SPDX-FileCopyrightText: Copyright 2022 Arm Limited and/or its affiliates <open-source-office@arm.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19 /* ----------------------------------------------------------------------
20 * Project: CMSIS NN Library
21 * Title: arm_elementwise_add_s16
22 * Description: Elementwise add
23 *
24 * $Date: 24 Oct 2022
25 * $Revision: V.2.2.0
26 *
27 * Target Processor: Cortex-M CPUs
28 *
29 * -------------------------------------------------------------------- */
30
31 #include "arm_nnfunctions.h"
32 #include "arm_nnsupportfunctions.h"
33
34 /**
35 * @ingroup Public
36 */
37
38 /**
39 * @addtogroup groupElementwise
40 * @{
41 */
42
43 /*
44 * s16 elementwise add
45 *
46 * Refer header file for details.
47 *
48 */
49
50 /* Note: __SHIFT is expected to be <=0 */
51
arm_elementwise_add_s16(const int16_t * input_1_vect,const int16_t * input_2_vect,const int32_t input_1_offset,const int32_t input_1_mult,const int32_t input_1_shift,const int32_t input_2_offset,const int32_t input_2_mult,const int32_t input_2_shift,const int32_t left_shift,int16_t * output,const int32_t out_offset,const int32_t out_mult,const int32_t out_shift,const int32_t out_activation_min,const int32_t out_activation_max,const int32_t block_size)52 arm_cmsis_nn_status arm_elementwise_add_s16(const int16_t *input_1_vect,
53 const int16_t *input_2_vect,
54 const int32_t input_1_offset,
55 const int32_t input_1_mult,
56 const int32_t input_1_shift,
57 const int32_t input_2_offset,
58 const int32_t input_2_mult,
59 const int32_t input_2_shift,
60 const int32_t left_shift,
61 int16_t *output,
62 const int32_t out_offset,
63 const int32_t out_mult,
64 const int32_t out_shift,
65 const int32_t out_activation_min,
66 const int32_t out_activation_max,
67 const int32_t block_size)
68 {
69 (void)input_1_offset;
70 (void)input_2_offset;
71 (void)out_offset;
72
73 #if defined(ARM_MATH_MVEI)
74
75 int32_t count = block_size;
76
77 while (count > 0)
78 {
79
80 mve_pred16_t pred = vctp32q(count);
81
82 int32x4_t vect_1 = vldrhq_z_s32(input_1_vect, pred);
83 int32x4_t vect_2 = vldrhq_z_s32(input_2_vect, pred);
84
85 vect_1 = vshlq_r_s32(vect_1, left_shift);
86 vect_2 = vshlq_r_s32(vect_2, left_shift);
87
88 vect_1 = arm_requantize_mve(vect_1, input_1_mult, input_1_shift);
89 vect_2 = arm_requantize_mve(vect_2, input_2_mult, input_2_shift);
90
91 vect_1 = vaddq_s32(vect_1, vect_2);
92 vect_1 = arm_requantize_mve(vect_1, out_mult, out_shift);
93
94 vect_1 = vmaxq_s32(vect_1, vdupq_n_s32(out_activation_min));
95 vect_1 = vminq_s32(vect_1, vdupq_n_s32(out_activation_max));
96
97 input_1_vect += 4;
98 input_2_vect += 4;
99
100 vstrhq_p_s32(output, vect_1, pred);
101
102 output += 4;
103 count -= 4;
104 }
105
106 #else // #if defined(ARM_MATH_MVEI)
107 int32_t input_1;
108 int32_t input_2;
109 int32_t sum;
110 int32_t two_halfword_1, two_halfword_2;
111 int16_t sum_1, sum_2;
112 int32_t loop_count = block_size / 2;
113 while (loop_count > 0)
114 {
115 two_halfword_1 = arm_nn_read_q15x2_ia(&input_1_vect);
116 two_halfword_2 = arm_nn_read_q15x2_ia(&input_2_vect);
117
118 input_1 = (int16_t)(two_halfword_1 & 0xFFFF) << left_shift;
119 input_1 = arm_nn_requantize(input_1, input_1_mult, input_1_shift);
120 input_2 = (int16_t)(two_halfword_2 & 0xFFFF) << left_shift;
121 input_2 = arm_nn_requantize(input_2, input_2_mult, input_2_shift);
122 sum = input_1 + input_2;
123 sum = arm_nn_requantize(sum, out_mult, out_shift);
124 sum = MAX(sum, out_activation_min);
125 sum = MIN(sum, out_activation_max);
126 sum_1 = (int16_t)sum;
127
128 input_1 = (int16_t)(two_halfword_1 >> 16) << left_shift;
129 input_1 = arm_nn_requantize(input_1, input_1_mult, input_1_shift);
130 input_2 = (int16_t)(two_halfword_2 >> 16) << left_shift;
131 input_2 = arm_nn_requantize(input_2, input_2_mult, input_2_shift);
132 sum = input_1 + input_2;
133 sum = arm_nn_requantize(sum, out_mult, out_shift);
134 sum = MAX(sum, out_activation_min);
135 sum = MIN(sum, out_activation_max);
136 sum_2 = (int16_t)sum;
137
138 arm_nn_write_q15x2_ia(&output, PACK_Q15x2_32x1(sum_1, sum_2));
139
140 loop_count--;
141 }
142 loop_count = block_size & 0x1;
143
144 while (loop_count > 0)
145 {
146 /* C = A + B */
147 input_1 = *input_1_vect++ << left_shift;
148 input_2 = *input_2_vect++ << left_shift;
149
150 input_1 = arm_nn_requantize(input_1, input_1_mult, input_1_shift);
151 input_2 = arm_nn_requantize(input_2, input_2_mult, input_2_shift);
152
153 sum = input_1 + input_2;
154 sum = arm_nn_requantize(sum, out_mult, out_shift);
155
156 sum = MAX(sum, out_activation_min);
157 sum = MIN(sum, out_activation_max);
158
159 *output++ = (int16_t)sum;
160
161 /* Decrement loop counter */
162 loop_count--;
163 }
164 #endif // #if defined(ARM_MATH_MVEI)
165 return (ARM_CMSIS_NN_SUCCESS);
166 }
167
168 /**
169 * @} end of Doxygen group
170 */
