1 /*
2  * Copyright 1997-2016 Freescale Semiconductor, Inc.
3  * Copyright 2016-2024 NXP
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 /*!
9  * @file S32Z2_CORE_DEBUGGER_INTERFACE.h
10  * @version 2.3
11  * @date 2024-05-03
12  * @brief Peripheral Access Layer for S32Z2_CORE_DEBUGGER_INTERFACE
13  *
14  * This file contains register definitions and macros for easy access to their
15  * bit fields.
16  *
17  * This file assumes LITTLE endian system.
18  */
19 
20 /**
21 * @page misra_violations MISRA-C:2012 violations
22 *
23 * @section [global]
24 * Violates MISRA 2012 Advisory Rule 2.3, local typedef not referenced
25 * The SoC header defines typedef for all modules.
26 *
27 * @section [global]
28 * Violates MISRA 2012 Advisory Rule 2.5, local macro not referenced
29 * The SoC header defines macros for all modules and registers.
30 *
31 * @section [global]
32 * Violates MISRA 2012 Advisory Directive 4.9, Function-like macro
33 * These are generated macros used for accessing the bit-fields from registers.
34 *
35 * @section [global]
36 * Violates MISRA 2012 Required Rule 5.1, identifier clash
37 * The supported compilers use more than 31 significant characters for identifiers.
38 *
39 * @section [global]
40 * Violates MISRA 2012 Required Rule 5.2, identifier clash
41 * The supported compilers use more than 31 significant characters for identifiers.
42 *
43 * @section [global]
44 * Violates MISRA 2012 Required Rule 5.4, identifier clash
45 * The supported compilers use more than 31 significant characters for identifiers.
46 *
47 * @section [global]
48 * Violates MISRA 2012 Required Rule 5.5, identifier clash
49 * The supported compilers use more than 31 significant characters for identifiers.
50 *
51 * @section [global]
52 * Violates MISRA 2012 Required Rule 21.1, defined macro '__I' is reserved to the compiler
53 * This type qualifier is needed to ensure correct I/O access and addressing.
54 */
55 
56 /* Prevention from multiple including the same memory map */
57 #if !defined(S32Z2_CORE_DEBUGGER_INTERFACE_H_)  /* Check if memory map has not been already included */
58 #define S32Z2_CORE_DEBUGGER_INTERFACE_H_
59 
60 #include "S32Z2_COMMON.h"
61 
62 /* ----------------------------------------------------------------------------
63    -- CORE_DEBUGGER_INTERFACE Peripheral Access Layer
64    ---------------------------------------------------------------------------- */
65 
66 /*!
67  * @addtogroup CORE_DEBUGGER_INTERFACE_Peripheral_Access_Layer CORE_DEBUGGER_INTERFACE Peripheral Access Layer
68  * @{
69  */
70 
71 /** CORE_DEBUGGER_INTERFACE - Register Layout Typedef */
72 typedef struct {
73   __IO uint32_t CORE_DRD3_RD;                      /**< Core DRD3 RD Register, offset: 0x0 */
74   __IO uint32_t CORE_DRD2_RD;                      /**< Core DRD2 RD Register, offset: 0x4 */
75   __IO uint32_t CORE_DRD1_RD;                      /**< Core DRD1 RD Register, offset: 0x8 */
76   __IO uint32_t CORE_DRD_RD;                       /**< Core DRD RD Register, offset: 0xC */
77 } CORE_DEBUGGER_INTERFACE_Type, *CORE_DEBUGGER_INTERFACE_MemMapPtr;
78 
79 /** Number of instances of the CORE_DEBUGGER_INTERFACE module. */
80 #define CORE_DEBUGGER_INTERFACE_INSTANCE_COUNT   (1u)
81 
82 /* CORE_DEBUGGER_INTERFACE - Peripheral instance base addresses */
83 /** Peripheral CEVA_SPF2__CORE_DEBUGGER_INTERFACE base address */
84 #define IP_CEVA_SPF2__CORE_DEBUGGER_INTERFACE_BASE (0x244001D0u)
85 /** Peripheral CEVA_SPF2__CORE_DEBUGGER_INTERFACE base pointer */
86 #define IP_CEVA_SPF2__CORE_DEBUGGER_INTERFACE    ((CORE_DEBUGGER_INTERFACE_Type *)IP_CEVA_SPF2__CORE_DEBUGGER_INTERFACE_BASE)
87 /** Array initializer of CORE_DEBUGGER_INTERFACE peripheral base addresses */
88 #define IP_CORE_DEBUGGER_INTERFACE_BASE_ADDRS    { IP_CEVA_SPF2__CORE_DEBUGGER_INTERFACE_BASE }
89 /** Array initializer of CORE_DEBUGGER_INTERFACE peripheral base pointers */
90 #define IP_CORE_DEBUGGER_INTERFACE_BASE_PTRS     { IP_CEVA_SPF2__CORE_DEBUGGER_INTERFACE }
91 
92 /* ----------------------------------------------------------------------------
93    -- CORE_DEBUGGER_INTERFACE Register Masks
94    ---------------------------------------------------------------------------- */
95 
96 /*!
97  * @addtogroup CORE_DEBUGGER_INTERFACE_Register_Masks CORE_DEBUGGER_INTERFACE Register Masks
98  * @{
99  */
100 
101 /*! @name CORE_DRD3_RD - Core DRD3 RD Register */
102 /*! @{ */
103 
104 #define CORE_DEBUGGER_INTERFACE_CORE_DRD3_RD_core_drd3_rd_MASK (0xFFFFFFFFU)
105 #define CORE_DEBUGGER_INTERFACE_CORE_DRD3_RD_core_drd3_rd_SHIFT (0U)
106 #define CORE_DEBUGGER_INTERFACE_CORE_DRD3_RD_core_drd3_rd_WIDTH (32U)
107 #define CORE_DEBUGGER_INTERFACE_CORE_DRD3_RD_core_drd3_rd(x) (((uint32_t)(((uint32_t)(x)) << CORE_DEBUGGER_INTERFACE_CORE_DRD3_RD_core_drd3_rd_SHIFT)) & CORE_DEBUGGER_INTERFACE_CORE_DRD3_RD_core_drd3_rd_MASK)
108 /*! @} */
109 
110 /*! @name CORE_DRD2_RD - Core DRD2 RD Register */
111 /*! @{ */
112 
113 #define CORE_DEBUGGER_INTERFACE_CORE_DRD2_RD_core_drd2_rd_MASK (0xFFFFFFFFU)
114 #define CORE_DEBUGGER_INTERFACE_CORE_DRD2_RD_core_drd2_rd_SHIFT (0U)
115 #define CORE_DEBUGGER_INTERFACE_CORE_DRD2_RD_core_drd2_rd_WIDTH (32U)
116 #define CORE_DEBUGGER_INTERFACE_CORE_DRD2_RD_core_drd2_rd(x) (((uint32_t)(((uint32_t)(x)) << CORE_DEBUGGER_INTERFACE_CORE_DRD2_RD_core_drd2_rd_SHIFT)) & CORE_DEBUGGER_INTERFACE_CORE_DRD2_RD_core_drd2_rd_MASK)
117 /*! @} */
118 
119 /*! @name CORE_DRD1_RD - Core DRD1 RD Register */
120 /*! @{ */
121 
122 #define CORE_DEBUGGER_INTERFACE_CORE_DRD1_RD_core_drd1_rd_MASK (0xFFFFFFFFU)
123 #define CORE_DEBUGGER_INTERFACE_CORE_DRD1_RD_core_drd1_rd_SHIFT (0U)
124 #define CORE_DEBUGGER_INTERFACE_CORE_DRD1_RD_core_drd1_rd_WIDTH (32U)
125 #define CORE_DEBUGGER_INTERFACE_CORE_DRD1_RD_core_drd1_rd(x) (((uint32_t)(((uint32_t)(x)) << CORE_DEBUGGER_INTERFACE_CORE_DRD1_RD_core_drd1_rd_SHIFT)) & CORE_DEBUGGER_INTERFACE_CORE_DRD1_RD_core_drd1_rd_MASK)
126 /*! @} */
127 
128 /*! @name CORE_DRD_RD - Core DRD RD Register */
129 /*! @{ */
130 
131 #define CORE_DEBUGGER_INTERFACE_CORE_DRD_RD_core_drd_rd_MASK (0xFFFFFFFFU)
132 #define CORE_DEBUGGER_INTERFACE_CORE_DRD_RD_core_drd_rd_SHIFT (0U)
133 #define CORE_DEBUGGER_INTERFACE_CORE_DRD_RD_core_drd_rd_WIDTH (32U)
134 #define CORE_DEBUGGER_INTERFACE_CORE_DRD_RD_core_drd_rd(x) (((uint32_t)(((uint32_t)(x)) << CORE_DEBUGGER_INTERFACE_CORE_DRD_RD_core_drd_rd_SHIFT)) & CORE_DEBUGGER_INTERFACE_CORE_DRD_RD_core_drd_rd_MASK)
135 /*! @} */
136 
137 /*!
138  * @}
139  */ /* end of group CORE_DEBUGGER_INTERFACE_Register_Masks */
140 
141 /*!
142  * @}
143  */ /* end of group CORE_DEBUGGER_INTERFACE_Peripheral_Access_Layer */
144 
145 #endif  /* #if !defined(S32Z2_CORE_DEBUGGER_INTERFACE_H_) */
146