1 /* 2 * Copyright 1997-2016 Freescale Semiconductor, Inc. 3 * Copyright 2016-2022 NXP 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /*! 9 * @file S32Z2.h 10 * @version 1.8 11 * @date 2022-07-13 12 * @brief Peripheral Access Layer for S32Z2 13 * 14 * This file contains register definitions and macros for easy access to their 15 * bit fields. 16 * 17 * This file assumes LITTLE endian system. 18 */ 19 20 /* Prevention from multiple including the same memory map */ 21 #if !defined(S32Z2_H_) /* Check if memory map has not been already included */ 22 #define S32Z2_H_ 23 24 /* ---------------------------------------------------------------------------- 25 -- IP Header Files 26 ---------------------------------------------------------------------------- */ 27 28 /* IP Header Files List */ 29 #include "S32Z2_ACCESS_PROTECTION.h" 30 #include "S32Z2_ACE.h" 31 #include "S32Z2_ADC.h" 32 #include "S32Z2_AES_ACCEL.h" 33 #include "S32Z2_ATP.h" 34 #include "S32Z2_AXBS.h" 35 #include "S32Z2_BOOT.h" 36 #include "S32Z2_CANXL_DSC_CONTROL.h" 37 #include "S32Z2_CANXL_FILTER_BANK.h" 38 #include "S32Z2_CANXL_GRP_CONTROL.h" 39 #include "S32Z2_CANXL_MRU.h" 40 #include "S32Z2_CANXL_MSG_DESCRIPTORS.h" 41 #include "S32Z2_CANXL_RAMECC.h" 42 #include "S32Z2_CANXL_RXFIFO.h" 43 #include "S32Z2_CANXL_RXFIFO_CONTROL.h" 44 #include "S32Z2_CANXL_SIC.h" 45 #include "S32Z2_CAN_HUB.h" 46 #include "S32Z2_CAN_TBS.h" 47 #include "S32Z2_CE_DMAMUX.h" 48 #include "S32Z2_CE_L_VFCCU.h" 49 #include "S32Z2_CE_MRU.h" 50 #include "S32Z2_CE_SEMA42.h" 51 #include "S32Z2_CE_SRG_S.h" 52 #include "S32Z2_CLASS_0X9_CORESIGHT_COMPONENT.h" 53 #include "S32Z2_CMU_FC.h" 54 #include "S32Z2_CORESIGHT_OCEM.h" 55 #include "S32Z2_CORESIGHT_PROGRAMMING_MODEL.h" 56 #include "S32Z2_CORE_DEBUGGER_INTERFACE.h" 57 #include "S32Z2_CORE_SAFETY.h" 58 #include "S32Z2_CRC.h" 59 #include "S32Z2_CTU.h" 60 #include "S32Z2_C_VFCCU.h" 61 #include "S32Z2_DATA_MEMORY_SUBSYSTEM.h" 62 #include "S32Z2_DBG.h" 63 #include "S32Z2_DCU.h" 64 #include "S32Z2_DDRC.h" 65 #include "S32Z2_DFS.h" 66 #include "S32Z2_DIPORTSD.h" 67 #include "S32Z2_DMAMUX.h" 68 #include "S32Z2_DMA_CRC.h" 69 #include "S32Z2_DMSS_SAFETY.h" 70 #include "S32Z2_DSPI.h" 71 #include "S32Z2_EDMA3_MP.h" 72 #include "S32Z2_EDMA3_TCD.h" 73 #include "S32Z2_EDMA4_MP.h" 74 #include "S32Z2_EDMA4_TCD.h" 75 #include "S32Z2_EIM.h" 76 #include "S32Z2_EIM_GTM.h" 77 #include "S32Z2_EMIOS.h" 78 #include "S32Z2_ENETC_PORT.h" 79 #include "S32Z2_ENETC_PSEUDO_MAC_PORT2.h" 80 #include "S32Z2_ERM.h" 81 #include "S32Z2_ERM_GTM.h" 82 #include "S32Z2_ERROR_CORRECTION_CODES.h" 83 #include "S32Z2_FEED_DMACRC.h" 84 #include "S32Z2_FEED_DMA_MP.h" 85 #include "S32Z2_FEED_DMA_TCD.h" 86 #include "S32Z2_FLEXCAN.h" 87 #include "S32Z2_FLEXRAY.h" 88 #include "S32Z2_FXOSC.h" 89 #include "S32Z2_GIC.h" 90 #include "S32Z2_GPR0.h" 91 #include "S32Z2_GPR0_PCTL.h" 92 #include "S32Z2_GPR1.h" 93 #include "S32Z2_GPR1_PCTL.h" 94 #include "S32Z2_GPR2.h" 95 #include "S32Z2_GPR3.h" 96 #include "S32Z2_GPR3_PCTL.h" 97 #include "S32Z2_GPR4.h" 98 #include "S32Z2_GPR4_PCTL.h" 99 #include "S32Z2_GPR5.h" 100 #include "S32Z2_GPR5_PCTL.h" 101 #include "S32Z2_GPR6.h" 102 #include "S32Z2_GPR6_PCTL.h" 103 #include "S32Z2_GTMDI.h" 104 #include "S32Z2_GTMSS.h" 105 #include "S32Z2_GTM_GTM_CLS0.h" 106 #include "S32Z2_GTM_GTM_CLS1.h" 107 #include "S32Z2_GTM_GTM_CLS2.h" 108 #include "S32Z2_GTM_GTM_CLS3.h" 109 #include "S32Z2_I3C.h" 110 #include "S32Z2_IERC_IERB.h" 111 #include "S32Z2_IERC_PCI.h" 112 #include "S32Z2_INTERFACE_CONFIGURATION.h" 113 #include "S32Z2_INTERRUPT_CONTROL.h" 114 #include "S32Z2_LCU.h" 115 #include "S32Z2_LFAST.h" 116 #include "S32Z2_LINFLEXD.h" 117 #include "S32Z2_LLC_CSR.h" 118 #include "S32Z2_LLC_FSC.h" 119 #include "S32Z2_LMEM64.h" 120 #include "S32Z2_L_VFCCU.h" 121 #include "S32Z2_MCM.h" 122 #include "S32Z2_MC_CGM.h" 123 #include "S32Z2_MC_ME.h" 124 #include "S32Z2_MC_RGM.h" 125 #include "S32Z2_MDM_AP.h" 126 #include "S32Z2_MEW.h" 127 #include "S32Z2_MSCM.h" 128 #include "S32Z2_MU.h" 129 #include "S32Z2_MULTICORE_CONFIGURATION.h" 130 #include "S32Z2_NETC_F0_GLOBAL.h" 131 #include "S32Z2_NETC_F0_PCI_HDR_TYPE0.h" 132 #include "S32Z2_NETC_F1.h" 133 #include "S32Z2_NETC_F1_GLOBAL.h" 134 #include "S32Z2_NETC_F1_PCI_HDR_TYPE0.h" 135 #include "S32Z2_NETC_F2.h" 136 #include "S32Z2_NETC_F2_COMMON.h" 137 #include "S32Z2_NETC_F2_GLOBAL.h" 138 #include "S32Z2_NETC_F2_PCI_HDR_TYPE0.h" 139 #include "S32Z2_NETC_F3.h" 140 #include "S32Z2_NETC_F3_COMMON.h" 141 #include "S32Z2_NETC_F3_GLOBAL.h" 142 #include "S32Z2_NETC_F3_PCI_HDR_TYPE0.h" 143 #include "S32Z2_NETC_F3_SI0.h" 144 #include "S32Z2_NETC_F3_SI1.h" 145 #include "S32Z2_NETC_F3_SI2.h" 146 #include "S32Z2_NETC_F3_SI3.h" 147 #include "S32Z2_NETC_F3_SI4.h" 148 #include "S32Z2_NETC_F3_SI5.h" 149 #include "S32Z2_NETC_F3_SI6.h" 150 #include "S32Z2_NETC_F3_SI7.h" 151 #include "S32Z2_NETC_IERB.h" 152 #include "S32Z2_NETC_PRIV.h" 153 #include "S32Z2_NETC_VF1_PCI_HDR_TYPE0.h" 154 #include "S32Z2_NETC_VF2_PCI_HDR_TYPE0.h" 155 #include "S32Z2_NETC_VF3_PCI_HDR_TYPE0.h" 156 #include "S32Z2_NETC_VF4_PCI_HDR_TYPE0.h" 157 #include "S32Z2_NETC_VF5_PCI_HDR_TYPE0.h" 158 #include "S32Z2_NETC_VF6_PCI_HDR_TYPE0.h" 159 #include "S32Z2_NETC_VF7_PCI_HDR_TYPE0.h" 160 #include "S32Z2_OCOTP.h" 161 #include "S32Z2_NVIC.h" 162 #include "S32Z2_SCB.h" 163 #include "S32Z2_OMU.h" 164 #include "S32Z2_PIT.h" 165 #include "S32Z2_PLLDIG.h" 166 #include "S32Z2_PMC.h" 167 #include "S32Z2_PMSS_SAFETY.h" 168 #include "S32Z2_POWER_SCALING_UNIT.h" 169 #include "S32Z2_PROFILER.h" 170 #include "S32Z2_PROGRAM_MEMORY_SUBSYSTEM.h" 171 #include "S32Z2_PSI5.h" 172 #include "S32Z2_PSI5_S.h" 173 #include "S32Z2_QMAN_CNTRL.h" 174 #include "S32Z2_QUADSPI.h" 175 #include "S32Z2_QUADSPI_ARDB.h" 176 #include "S32Z2_QUEUE_DESCRIPTOR.h" 177 #include "S32Z2_QUEUE_MANAGER.h" 178 #include "S32Z2_QUEUE_MANAGER1.h" 179 #include "S32Z2_QUEUE_MANAGER2.h" 180 #include "S32Z2_QUEUE_MANAGER3.h" 181 #include "S32Z2_RDC.h" 182 #include "S32Z2_RESULT_DMACRC.h" 183 #include "S32Z2_RESULT_DMA_MP.h" 184 #include "S32Z2_RESULT_DMA_TCD.h" 185 #include "S32Z2_ROUND_ROBIN_ARBITER.h" 186 #include "S32Z2_RTT.h" 187 #include "S32Z2_RTUE_NIC_D.h" 188 #include "S32Z2_RTUF_NIC_D.h" 189 #include "S32Z2_RTUM_NIC_D.h" 190 #include "S32Z2_RTUP_NIC_B.h" 191 #include "S32Z2_RTU_GPR.h" 192 #include "S32Z2_RTU_L_VFCCU.h" 193 #include "S32Z2_RTU_MC_CGM.h" 194 #include "S32Z2_RTU_MRU.h" 195 #include "S32Z2_RTU_PMC.h" 196 #include "S32Z2_RTU_SEMA42.h" 197 #include "S32Z2_RTU_XRDC.h" 198 #include "S32Z2_RXLUT.h" 199 #include "S32Z2_SBSW.h" 200 #include "S32Z2_SDA_AP.h" 201 #include "S32Z2_SEC_S250.h" 202 #include "S32Z2_SEMA42.h" 203 #include "S32Z2_SINC.h" 204 #include "S32Z2_SIPI.h" 205 #include "S32Z2_SIUL2.h" 206 #include "S32Z2_SMU_L_VFCCU.h" 207 #include "S32Z2_SMU_MRU.h" 208 #include "S32Z2_SMU_SEMA42.h" 209 #include "S32Z2_SMU_SRG_S.h" 210 #include "S32Z2_SMU_XRDC.h" 211 #include "S32Z2_SPFU.h" 212 #include "S32Z2_SPI.h" 213 #include "S32Z2_SRAMCTL.h" 214 #include "S32Z2_SRX.h" 215 #include "S32Z2_STM.h" 216 #include "S32Z2_SWT.h" 217 #include "S32Z2_SW_ETH_MAC_PORT0.h" 218 #include "S32Z2_SW_ETH_MAC_PORT1.h" 219 #include "S32Z2_SW_PORT0.h" 220 #include "S32Z2_SW_PORT1.h" 221 #include "S32Z2_SW_PORT2.h" 222 #include "S32Z2_SW_PSEUDO_MAC_PORT2.h" 223 #include "S32Z2_TIMERS.h" 224 #include "S32Z2_TMR0_BASE.h" 225 #include "S32Z2_TMU.h" 226 #include "S32Z2_TRGMUX_0.h" 227 #include "S32Z2_TRGMUX_1.h" 228 #include "S32Z2_TRGMUX_2.h" 229 #include "S32Z2_TRGMUX_3.h" 230 #include "S32Z2_USDHC.h" 231 #include "S32Z2_VIRT_WRAP.h" 232 #include "S32Z2_WATCHDOG.h" 233 #include "S32Z2_XBIC.h" 234 #include "S32Z2_XRDC.h" 235 #include "S32Z2_SYSTICK.h" 236 #include "S32Z2_MPU.h" 237 238 #endif /* #if !defined(S32Z2_H_) */ 239
