1 /*
2  * Copyright 1997-2016 Freescale Semiconductor, Inc.
3  * Copyright 2016-2022 NXP
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 /*!
9  * @file S32K146_WDOG.h
10  * @version 1.1
11  * @date 2022-01-31
12  * @brief Peripheral Access Layer for S32K146_WDOG
13  *
14  * This file contains register definitions and macros for easy access to their
15  * bit fields.
16  *
17  * This file assumes LITTLE endian system.
18  */
19 
20 /**
21 * @page misra_violations MISRA-C:2012 violations
22 *
23 * @section [global]
24 * Violates MISRA 2012 Advisory Rule 2.3, local typedef not referenced
25 * The SoC header defines typedef for all modules.
26 *
27 * @section [global]
28 * Violates MISRA 2012 Advisory Rule 2.5, local macro not referenced
29 * The SoC header defines macros for all modules and registers.
30 *
31 * @section [global]
32 * Violates MISRA 2012 Advisory Directive 4.9, Function-like macro
33 * These are generated macros used for accessing the bit-fields from registers.
34 *
35 * @section [global]
36 * Violates MISRA 2012 Required Rule 5.1, identifier clash
37 * The supported compilers use more than 31 significant characters for identifiers.
38 *
39 * @section [global]
40 * Violates MISRA 2012 Required Rule 5.2, identifier clash
41 * The supported compilers use more than 31 significant characters for identifiers.
42 *
43 * @section [global]
44 * Violates MISRA 2012 Required Rule 5.4, identifier clash
45 * The supported compilers use more than 31 significant characters for identifiers.
46 *
47 * @section [global]
48 * Violates MISRA 2012 Required Rule 5.5, identifier clash
49 * The supported compilers use more than 31 significant characters for identifiers.
50 *
51 * @section [global]
52 * Violates MISRA 2012 Required Rule 21.1, defined macro '__I' is reserved to the compiler
53 * This type qualifier is needed to ensure correct I/O access and addressing.
54 */
55 
56 /* Prevention from multiple including the same memory map */
57 #if !defined(S32K146_WDOG_H_)  /* Check if memory map has not been already included */
58 #define S32K146_WDOG_H_
59 
60 #include "S32K146_COMMON.h"
61 
62 /* ----------------------------------------------------------------------------
63    -- WDOG Peripheral Access Layer
64    ---------------------------------------------------------------------------- */
65 
66 /*!
67  * @addtogroup WDOG_Peripheral_Access_Layer WDOG Peripheral Access Layer
68  * @{
69  */
70 
71 /** WDOG - Register Layout Typedef */
72 typedef struct {
73   __IO uint32_t CS;                                /**< Watchdog Control and Status Register, offset: 0x0 */
74   __IO uint32_t CNT;                               /**< Watchdog Counter Register, offset: 0x4 */
75   __IO uint32_t TOVAL;                             /**< Watchdog Timeout Value Register, offset: 0x8 */
76   __IO uint32_t WIN;                               /**< Watchdog Window Register, offset: 0xC */
77 } WDOG_Type, *WDOG_MemMapPtr;
78 
79 /** Number of instances of the WDOG module. */
80 #define WDOG_INSTANCE_COUNT                      (1u)
81 
82 /* WDOG - Peripheral instance base addresses */
83 /** Peripheral WDOG base address */
84 #define IP_WDOG_BASE                             (0x40052000u)
85 /** Peripheral WDOG base pointer */
86 #define IP_WDOG                                  ((WDOG_Type *)IP_WDOG_BASE)
87 /** Array initializer of WDOG peripheral base addresses */
88 #define IP_WDOG_BASE_ADDRS                       { IP_WDOG_BASE }
89 /** Array initializer of WDOG peripheral base pointers */
90 #define IP_WDOG_BASE_PTRS                        { IP_WDOG }
91 
92 /* ----------------------------------------------------------------------------
93    -- WDOG Register Masks
94    ---------------------------------------------------------------------------- */
95 
96 /*!
97  * @addtogroup WDOG_Register_Masks WDOG Register Masks
98  * @{
99  */
100 
101 /*! @name CS - Watchdog Control and Status Register */
102 /*! @{ */
103 
104 #define WDOG_CS_STOP_MASK                        (0x1U)
105 #define WDOG_CS_STOP_SHIFT                       (0U)
106 #define WDOG_CS_STOP_WIDTH                       (1U)
107 #define WDOG_CS_STOP(x)                          (((uint32_t)(((uint32_t)(x)) << WDOG_CS_STOP_SHIFT)) & WDOG_CS_STOP_MASK)
108 
109 #define WDOG_CS_WAIT_MASK                        (0x2U)
110 #define WDOG_CS_WAIT_SHIFT                       (1U)
111 #define WDOG_CS_WAIT_WIDTH                       (1U)
112 #define WDOG_CS_WAIT(x)                          (((uint32_t)(((uint32_t)(x)) << WDOG_CS_WAIT_SHIFT)) & WDOG_CS_WAIT_MASK)
113 
114 #define WDOG_CS_DBG_MASK                         (0x4U)
115 #define WDOG_CS_DBG_SHIFT                        (2U)
116 #define WDOG_CS_DBG_WIDTH                        (1U)
117 #define WDOG_CS_DBG(x)                           (((uint32_t)(((uint32_t)(x)) << WDOG_CS_DBG_SHIFT)) & WDOG_CS_DBG_MASK)
118 
119 #define WDOG_CS_TST_MASK                         (0x18U)
120 #define WDOG_CS_TST_SHIFT                        (3U)
121 #define WDOG_CS_TST_WIDTH                        (2U)
122 #define WDOG_CS_TST(x)                           (((uint32_t)(((uint32_t)(x)) << WDOG_CS_TST_SHIFT)) & WDOG_CS_TST_MASK)
123 
124 #define WDOG_CS_UPDATE_MASK                      (0x20U)
125 #define WDOG_CS_UPDATE_SHIFT                     (5U)
126 #define WDOG_CS_UPDATE_WIDTH                     (1U)
127 #define WDOG_CS_UPDATE(x)                        (((uint32_t)(((uint32_t)(x)) << WDOG_CS_UPDATE_SHIFT)) & WDOG_CS_UPDATE_MASK)
128 
129 #define WDOG_CS_INT_MASK                         (0x40U)
130 #define WDOG_CS_INT_SHIFT                        (6U)
131 #define WDOG_CS_INT_WIDTH                        (1U)
132 #define WDOG_CS_INT(x)                           (((uint32_t)(((uint32_t)(x)) << WDOG_CS_INT_SHIFT)) & WDOG_CS_INT_MASK)
133 
134 #define WDOG_CS_EN_MASK                          (0x80U)
135 #define WDOG_CS_EN_SHIFT                         (7U)
136 #define WDOG_CS_EN_WIDTH                         (1U)
137 #define WDOG_CS_EN(x)                            (((uint32_t)(((uint32_t)(x)) << WDOG_CS_EN_SHIFT)) & WDOG_CS_EN_MASK)
138 
139 #define WDOG_CS_CLK_MASK                         (0x300U)
140 #define WDOG_CS_CLK_SHIFT                        (8U)
141 #define WDOG_CS_CLK_WIDTH                        (2U)
142 #define WDOG_CS_CLK(x)                           (((uint32_t)(((uint32_t)(x)) << WDOG_CS_CLK_SHIFT)) & WDOG_CS_CLK_MASK)
143 
144 #define WDOG_CS_RCS_MASK                         (0x400U)
145 #define WDOG_CS_RCS_SHIFT                        (10U)
146 #define WDOG_CS_RCS_WIDTH                        (1U)
147 #define WDOG_CS_RCS(x)                           (((uint32_t)(((uint32_t)(x)) << WDOG_CS_RCS_SHIFT)) & WDOG_CS_RCS_MASK)
148 
149 #define WDOG_CS_ULK_MASK                         (0x800U)
150 #define WDOG_CS_ULK_SHIFT                        (11U)
151 #define WDOG_CS_ULK_WIDTH                        (1U)
152 #define WDOG_CS_ULK(x)                           (((uint32_t)(((uint32_t)(x)) << WDOG_CS_ULK_SHIFT)) & WDOG_CS_ULK_MASK)
153 
154 #define WDOG_CS_PRES_MASK                        (0x1000U)
155 #define WDOG_CS_PRES_SHIFT                       (12U)
156 #define WDOG_CS_PRES_WIDTH                       (1U)
157 #define WDOG_CS_PRES(x)                          (((uint32_t)(((uint32_t)(x)) << WDOG_CS_PRES_SHIFT)) & WDOG_CS_PRES_MASK)
158 
159 #define WDOG_CS_CMD32EN_MASK                     (0x2000U)
160 #define WDOG_CS_CMD32EN_SHIFT                    (13U)
161 #define WDOG_CS_CMD32EN_WIDTH                    (1U)
162 #define WDOG_CS_CMD32EN(x)                       (((uint32_t)(((uint32_t)(x)) << WDOG_CS_CMD32EN_SHIFT)) & WDOG_CS_CMD32EN_MASK)
163 
164 #define WDOG_CS_FLG_MASK                         (0x4000U)
165 #define WDOG_CS_FLG_SHIFT                        (14U)
166 #define WDOG_CS_FLG_WIDTH                        (1U)
167 #define WDOG_CS_FLG(x)                           (((uint32_t)(((uint32_t)(x)) << WDOG_CS_FLG_SHIFT)) & WDOG_CS_FLG_MASK)
168 
169 #define WDOG_CS_WIN_MASK                         (0x8000U)
170 #define WDOG_CS_WIN_SHIFT                        (15U)
171 #define WDOG_CS_WIN_WIDTH                        (1U)
172 #define WDOG_CS_WIN(x)                           (((uint32_t)(((uint32_t)(x)) << WDOG_CS_WIN_SHIFT)) & WDOG_CS_WIN_MASK)
173 /*! @} */
174 
175 /*! @name CNT - Watchdog Counter Register */
176 /*! @{ */
177 
178 #define WDOG_CNT_CNTLOW_MASK                     (0xFFU)
179 #define WDOG_CNT_CNTLOW_SHIFT                    (0U)
180 #define WDOG_CNT_CNTLOW_WIDTH                    (8U)
181 #define WDOG_CNT_CNTLOW(x)                       (((uint32_t)(((uint32_t)(x)) << WDOG_CNT_CNTLOW_SHIFT)) & WDOG_CNT_CNTLOW_MASK)
182 
183 #define WDOG_CNT_CNTHIGH_MASK                    (0xFF00U)
184 #define WDOG_CNT_CNTHIGH_SHIFT                   (8U)
185 #define WDOG_CNT_CNTHIGH_WIDTH                   (8U)
186 #define WDOG_CNT_CNTHIGH(x)                      (((uint32_t)(((uint32_t)(x)) << WDOG_CNT_CNTHIGH_SHIFT)) & WDOG_CNT_CNTHIGH_MASK)
187 /*! @} */
188 
189 /*! @name TOVAL - Watchdog Timeout Value Register */
190 /*! @{ */
191 
192 #define WDOG_TOVAL_TOVALLOW_MASK                 (0xFFU)
193 #define WDOG_TOVAL_TOVALLOW_SHIFT                (0U)
194 #define WDOG_TOVAL_TOVALLOW_WIDTH                (8U)
195 #define WDOG_TOVAL_TOVALLOW(x)                   (((uint32_t)(((uint32_t)(x)) << WDOG_TOVAL_TOVALLOW_SHIFT)) & WDOG_TOVAL_TOVALLOW_MASK)
196 
197 #define WDOG_TOVAL_TOVALHIGH_MASK                (0xFF00U)
198 #define WDOG_TOVAL_TOVALHIGH_SHIFT               (8U)
199 #define WDOG_TOVAL_TOVALHIGH_WIDTH               (8U)
200 #define WDOG_TOVAL_TOVALHIGH(x)                  (((uint32_t)(((uint32_t)(x)) << WDOG_TOVAL_TOVALHIGH_SHIFT)) & WDOG_TOVAL_TOVALHIGH_MASK)
201 /*! @} */
202 
203 /*! @name WIN - Watchdog Window Register */
204 /*! @{ */
205 
206 #define WDOG_WIN_WINLOW_MASK                     (0xFFU)
207 #define WDOG_WIN_WINLOW_SHIFT                    (0U)
208 #define WDOG_WIN_WINLOW_WIDTH                    (8U)
209 #define WDOG_WIN_WINLOW(x)                       (((uint32_t)(((uint32_t)(x)) << WDOG_WIN_WINLOW_SHIFT)) & WDOG_WIN_WINLOW_MASK)
210 
211 #define WDOG_WIN_WINHIGH_MASK                    (0xFF00U)
212 #define WDOG_WIN_WINHIGH_SHIFT                   (8U)
213 #define WDOG_WIN_WINHIGH_WIDTH                   (8U)
214 #define WDOG_WIN_WINHIGH(x)                      (((uint32_t)(((uint32_t)(x)) << WDOG_WIN_WINHIGH_SHIFT)) & WDOG_WIN_WINHIGH_MASK)
215 /*! @} */
216 
217 /*!
218  * @}
219  */ /* end of group WDOG_Register_Masks */
220 
221 /*!
222  * @}
223  */ /* end of group WDOG_Peripheral_Access_Layer */
224 
225 #endif  /* #if !defined(S32K146_WDOG_H_) */
226