1 /* 2 * Copyright 2023 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef QSPI_IP_CFG_H 8 #define QSPI_IP_CFG_H 9 10 /** 11 * @file Qspi_Ip_Cfg.h 12 * 13 * @addtogroup FLS 14 * @{ 15 */ 16 17 /* implements Qspi_Ip_Cfg.h_Artifact */ 18 19 #ifdef __cplusplus 20 extern "C"{ 21 #endif 22 23 24 /*================================================================================================== 25 * INCLUDE FILES 26 * 1) system and project includes 27 * 2) needed interfaces from external units 28 * 3) internal and external interfaces from this unit 29 ==================================================================================================*/ 30 #include "Qspi_Ip_Init_PBcfg.h" 31 #include <zephyr/devicetree.h> 32 33 /*================================================================================================== 34 * SOURCE FILE VERSION INFORMATION 35 ==================================================================================================*/ 36 #define QSPI_IP_VENDOR_ID_CFG 43 37 #define QSPI_IP_AR_RELEASE_MAJOR_VERSION_CFG 4 38 #define QSPI_IP_AR_RELEASE_MINOR_VERSION_CFG 7 39 #define QSPI_IP_AR_RELEASE_REVISION_VERSION_CFG 0 40 #define QSPI_IP_SW_MAJOR_VERSION_CFG 3 41 #define QSPI_IP_SW_MINOR_VERSION_CFG 0 42 #define QSPI_IP_SW_PATCH_VERSION_CFG 0 43 44 /*================================================================================================== 45 * FILE VERSION CHECKS 46 ==================================================================================================*/ 47 /* Check if current file and Qspi_Ip_Init_PBcfg.h header file are of the same vendor */ 48 #if (QSPI_IP_VENDOR_ID_CFG != QSPI_IP_INIT_PBCFG_VENDOR_ID) 49 #error "Qspi_Ip_Cfg.h and Qspi_Ip_Init_PBcfg.h have different vendor ids" 50 #endif 51 /* Check if current file and Qspi_Ip_Init_PBcfg.h header file are of the same Autosar version */ 52 #if ((QSPI_IP_AR_RELEASE_MAJOR_VERSION_CFG != QSPI_IP_INIT_PBCFG_AR_RELEASE_MAJOR_VERSION) || \ 53 (QSPI_IP_AR_RELEASE_MINOR_VERSION_CFG != QSPI_IP_INIT_PBCFG_AR_RELEASE_MINOR_VERSION) || \ 54 (QSPI_IP_AR_RELEASE_REVISION_VERSION_CFG != QSPI_IP_INIT_PBCFG_AR_RELEASE_REVISION_VERSION) \ 55 ) 56 #error "AutoSar Version Numbers of Qspi_Ip_Cfg.h and Qspi_Ip_Init_PBcfg.h are different" 57 #endif 58 /* Check if current file and Qspi_Ip_Init_PBcfg.h header file are of the same software version */ 59 #if ((QSPI_IP_SW_MAJOR_VERSION_CFG != QSPI_IP_INIT_PBCFG_SW_MAJOR_VERSION) || \ 60 (QSPI_IP_SW_MINOR_VERSION_CFG != QSPI_IP_INIT_PBCFG_SW_MINOR_VERSION) || \ 61 (QSPI_IP_SW_PATCH_VERSION_CFG != QSPI_IP_INIT_PBCFG_SW_PATCH_VERSION) \ 62 ) 63 #error "Software Version Numbers of Qspi_Ip_Cfg.h and Qspi_Ip_Init_PBcfg.h are different" 64 #endif 65 66 67 /*================================================================================================== 68 DEFINES AND MACROS 69 ==================================================================================================*/ 70 71 /* Maximum number of retries for Write Enable command */ 72 #define QSPI_IP_MAX_RETRY (3U) 73 74 /* Pre-processor switch to enable/disable development error detection for QSPI Ip API */ 75 #define DEV_ASSERT_QSPI(x) 76 /* Number of serial flash devices */ 77 #define QSPI_IP_MEM_INSTANCE_COUNT (DT_NUM_INST_STATUS_OKAY(nxp_s32_qspi_nor)) 78 79 /* Timeout for DLL lock sequence */ 80 #define QSPI_IP_DLL_LOCK_TIMEOUT (2147483647U) 81 82 /* Timeout for QSPI command completion */ 83 #define QSPI_IP_CMD_COMPLETE_TIMEOUT (2000000U) 84 85 /* After the FRAD checks pass we wait for QSPI to become idle */ 86 #define QSPI_IP_QSPI_IDLE_TIMEOUT (0U) 87 88 /* Timeout for external flash software reset completion */ 89 #define QSPI_IP_RESET_TIMEOUT (2000000U) 90 91 /* Timeout for external flash startup initialization sequence completion */ 92 #define QSPI_IP_FLS_INIT_TIMEOUT (2000000U) 93 94 /* Timeout for a complete read operation */ 95 #define QSPI_IP_READ_TIMEOUT (2147483647U) 96 97 /* OsIf counter type used in timeout detection for QSPI IP operations */ 98 #define QSPI_IP_TIMEOUT_TYPE (OSIF_COUNTER_DUMMY) 99 100 /* Delay after changing the value of the QSPI software reset bits */ 101 #define QSPI_IP_SOFTWARE_RESET_DELAY (276U) 102 103 /*! @brief Minimum delay in CPU cycles between Tx FIFO reset and Tx FIFO push */ 104 #define QSPI_IP_TX_BUFFER_RESET_DELAY (430U) 105 106 /* QSPI user mode support macro */ 107 #define QSPI_IP_ENABLE_USER_MODE_SUPPORT (STD_OFF) 108 109 #ifndef MCAL_ENABLE_USER_MODE_SUPPORT 110 #if (STD_ON == QSPI_IP_ENABLE_USER_MODE_SUPPORT) 111 #error MCAL_ENABLE_USER_MODE_SUPPORT is not enabled. For running Fls in user mode the MCAL_ENABLE_USER_MODE_SUPPORT needs to be defined. 112 #endif 113 #endif 114 115 #ifdef __cplusplus 116 } 117 #endif 118 119 /** @} */ 120 121 #endif /* QSPI_IP_CFG_H */ 122