1 /* 2 * Copyright (c) 2018-2019 Arm Limited 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 /** 18 * \file musca_b1_eflash_drv.c 19 * 20 * \brief Process specifinc implementation of GFC100 flash controller for 21 * Musca B1 board. 22 */ 23 24 #include "gfc100_process_spec_api.h" 25 gfc100_proc_spec_set_eflash_timing(uint32_t reg_map_base,uint32_t sys_clk)26void gfc100_proc_spec_set_eflash_timing(uint32_t reg_map_base, 27 uint32_t sys_clk) 28 { 29 (void)sys_clk; 30 31 *(uint32_t *)reg_map_base = 0x11082801; 32 *(uint32_t *)(reg_map_base + 4U) = 0x64050208; 33 *(uint32_t *)(reg_map_base + 8U) = 0xa0a0a08; 34 } 35 gfc100_proc_spec_get_eflash_word_width(uint32_t reg_map_base)36uint32_t gfc100_proc_spec_get_eflash_word_width(uint32_t reg_map_base) 37 { 38 (void)reg_map_base; 39 40 return 128U; 41 } 42 gfc100_proc_spec_get_eflash_size(uint32_t reg_map_base)43uint32_t gfc100_proc_spec_get_eflash_size(uint32_t reg_map_base) 44 { 45 (void)reg_map_base; 46 47 return 0x200000U; 48 } 49 gfc100_proc_spec_get_eflash_page_size(uint32_t reg_map_base)50uint32_t gfc100_proc_spec_get_eflash_page_size(uint32_t reg_map_base) 51 { 52 (void)reg_map_base; 53 54 return 0x4000; 55 } 56 gfc100_proc_spec_get_num_of_info_pages(uint32_t reg_map_base)57uint32_t gfc100_proc_spec_get_num_of_info_pages(uint32_t reg_map_base) 58 { 59 (void)reg_map_base; 60 61 return 3U; 62 } 63 gfc100_proc_spec_get_error_cause(uint32_t reg_map_base)64uint32_t gfc100_proc_spec_get_error_cause(uint32_t reg_map_base) 65 { 66 return *(uint32_t *)(reg_map_base + 0x18); 67 } 68 69