1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_can_legacy.h 4 * @author MCD Application Team 5 * @brief Header file of CAN HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 10 * 11 * Redistribution and use in source and binary forms, with or without modification, 12 * are permitted provided that the following conditions are met: 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 ****************************************************************************** 34 */ 35 36 /* Define to prevent recursive inclusion -------------------------------------*/ 37 #ifndef __STM32L4xx_CAN_LEGACY_H 38 #define __STM32L4xx_CAN_LEGACY_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 #if defined(CAN1) 45 /* Includes ------------------------------------------------------------------*/ 46 #include "stm32l4xx_hal_def.h" 47 48 /** @addtogroup STM32L4xx_HAL_Driver 49 * @{ 50 */ 51 52 /** @addtogroup CAN 53 * @{ 54 */ 55 56 /* Exported types ------------------------------------------------------------*/ 57 /** @defgroup CAN_Exported_Types CAN Exported Types 58 * @{ 59 */ 60 61 /** 62 * @brief HAL State structures definition 63 */ 64 typedef enum 65 { 66 HAL_CAN_STATE_RESET = 0x00, /*!< CAN not yet initialized or disabled */ 67 HAL_CAN_STATE_READY = 0x01, /*!< CAN initialized and ready for use */ 68 HAL_CAN_STATE_BUSY = 0x02, /*!< CAN process is ongoing */ 69 HAL_CAN_STATE_BUSY_TX = 0x12, /*!< CAN process is ongoing */ 70 HAL_CAN_STATE_BUSY_RX = 0x22, /*!< CAN process is ongoing */ 71 HAL_CAN_STATE_BUSY_TX_RX = 0x32, /*!< CAN process is ongoing */ 72 HAL_CAN_STATE_TIMEOUT = 0x03, /*!< Timeout state */ 73 HAL_CAN_STATE_ERROR = 0x04 /*!< CAN error state */ 74 75 }HAL_CAN_StateTypeDef; 76 77 /** 78 * @brief CAN init structure definition 79 */ 80 typedef struct 81 { 82 uint32_t Prescaler; /*!< Specifies the length of a time quantum. 83 This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */ 84 85 uint32_t Mode; /*!< Specifies the CAN operating mode. 86 This parameter can be a value of @ref CAN_operating_mode */ 87 88 uint32_t SJW; /*!< Specifies the maximum number of time quanta 89 the CAN hardware is allowed to lengthen or 90 shorten a bit to perform resynchronization. 91 This parameter can be a value of @ref CAN_synchronisation_jump_width */ 92 93 uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1. 94 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */ 95 96 uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2. 97 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */ 98 99 uint32_t TTCM; /*!< Enable or disable the time triggered communication mode. 100 This parameter can be set to ENABLE or DISABLE. */ 101 102 uint32_t ABOM; /*!< Enable or disable the automatic bus-off management. 103 This parameter can be set to ENABLE or DISABLE */ 104 105 uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode. 106 This parameter can be set to ENABLE or DISABLE */ 107 108 uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode. 109 This parameter can be set to ENABLE or DISABLE */ 110 111 uint32_t RFLM; /*!< Enable or disable the receive FIFO Locked mode. 112 This parameter can be set to ENABLE or DISABLE */ 113 114 uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority. 115 This parameter can be set to ENABLE or DISABLE */ 116 }CAN_InitTypeDef; 117 118 /** 119 * @brief CAN filter configuration structure definition 120 */ 121 typedef struct 122 { 123 uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit 124 configuration, first one for a 16-bit configuration). 125 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 126 127 uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit 128 configuration, second one for a 16-bit configuration). 129 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 130 131 uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, 132 according to the mode (MSBs for a 32-bit configuration, 133 first one for a 16-bit configuration). 134 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 135 136 uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, 137 according to the mode (LSBs for a 32-bit configuration, 138 second one for a 16-bit configuration). 139 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 140 141 uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter. 142 This parameter can be a value of @ref CAN_filter_FIFO */ 143 144 uint32_t FilterNumber; /*!< Specifies the filter which will be initialized. 145 This parameter must be a number between Min_Data = 0 and Max_Data = 27 */ 146 147 uint32_t FilterMode; /*!< Specifies the filter mode to be initialized. 148 This parameter can be a value of @ref CAN_filter_mode */ 149 150 uint32_t FilterScale; /*!< Specifies the filter scale. 151 This parameter can be a value of @ref CAN_filter_scale */ 152 153 uint32_t FilterActivation; /*!< Enable or disable the filter. 154 This parameter can be set to ENABLE or DISABLE */ 155 156 uint32_t BankNumber; /*!< Select the start slave bank filter. 157 This parameter must be a number between Min_Data = 0 and Max_Data = 28 */ 158 159 }CAN_FilterConfTypeDef; 160 161 /** 162 * @brief CAN Tx message structure definition 163 */ 164 typedef struct 165 { 166 uint32_t StdId; /*!< Specifies the standard identifier. 167 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */ 168 169 uint32_t ExtId; /*!< Specifies the extended identifier. 170 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */ 171 172 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. 173 This parameter can be a value of @ref CAN_identifier_type */ 174 175 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. 176 This parameter can be a value of @ref CAN_remote_transmission_request */ 177 178 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted. 179 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */ 180 181 uint8_t Data[8]; /*!< Contains the data to be transmitted. 182 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */ 183 184 }CanTxMsgTypeDef; 185 186 /** 187 * @brief CAN Rx message structure definition 188 */ 189 typedef struct 190 { 191 uint32_t StdId; /*!< Specifies the standard identifier. 192 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */ 193 194 uint32_t ExtId; /*!< Specifies the extended identifier. 195 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */ 196 197 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received. 198 This parameter can be a value of @ref CAN_identifier_type */ 199 200 uint32_t RTR; /*!< Specifies the type of frame for the received message. 201 This parameter can be a value of @ref CAN_remote_transmission_request */ 202 203 uint32_t DLC; /*!< Specifies the length of the frame that will be received. 204 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */ 205 206 uint8_t Data[8]; /*!< Contains the data to be received. 207 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */ 208 209 uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through. 210 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */ 211 212 uint32_t FIFONumber; /*!< Specifies the receive FIFO number. 213 This parameter can be CAN_FIFO0 or CAN_FIFO1 */ 214 215 }CanRxMsgTypeDef; 216 217 /** 218 * @brief CAN handle Structure definition 219 */ 220 typedef struct 221 { 222 CAN_TypeDef *Instance; /*!< Register base address */ 223 224 CAN_InitTypeDef Init; /*!< CAN required parameters */ 225 226 CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */ 227 228 CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure */ 229 230 __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */ 231 232 HAL_LockTypeDef Lock; /*!< CAN locking object */ 233 234 __IO uint32_t ErrorCode; /*!< CAN Error code */ 235 236 }CAN_HandleTypeDef; 237 238 /** 239 * @} 240 */ 241 242 /* Exported constants --------------------------------------------------------*/ 243 /** @defgroup CAN_Exported_Constants CAN Exported Constants 244 * @{ 245 */ 246 247 /** @defgroup CAN_Error_Code CAN Error Code 248 * @{ 249 */ 250 #define HAL_CAN_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ 251 #define HAL_CAN_ERROR_EWG ((uint32_t)0x00000001) /*!< EWG error */ 252 #define HAL_CAN_ERROR_EPV ((uint32_t)0x00000002) /*!< EPV error */ 253 #define HAL_CAN_ERROR_BOF ((uint32_t)0x00000004) /*!< BOF error */ 254 #define HAL_CAN_ERROR_STF ((uint32_t)0x00000008) /*!< Stuff error */ 255 #define HAL_CAN_ERROR_FOR ((uint32_t)0x00000010) /*!< Form error */ 256 #define HAL_CAN_ERROR_ACK ((uint32_t)0x00000020) /*!< Acknowledgment error */ 257 #define HAL_CAN_ERROR_BR ((uint32_t)0x00000040) /*!< Bit recessive */ 258 #define HAL_CAN_ERROR_BD ((uint32_t)0x00000080) /*!< LEC dominant */ 259 #define HAL_CAN_ERROR_CRC ((uint32_t)0x00000100) /*!< LEC transfer error */ 260 #define HAL_CAN_ERROR_FOV0 ((uint32_t)0x00000200) /*!< FIFO0 overrun error */ 261 #define HAL_CAN_ERROR_FOV1 ((uint32_t)0x00000400) /*!< FIFO1 overrun error */ 262 /** 263 * @} 264 */ 265 266 /** @defgroup CAN_InitStatus CAN initialization Status 267 * @{ 268 */ 269 #define CAN_INITSTATUS_FAILED ((uint32_t)0x00000000) /*!< CAN initialization failed */ 270 #define CAN_INITSTATUS_SUCCESS ((uint32_t)0x00000001) /*!< CAN initialization OK */ 271 /** 272 * @} 273 */ 274 275 /** @defgroup CAN_operating_mode CAN Operating Mode 276 * @{ 277 */ 278 #define CAN_MODE_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */ 279 #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */ 280 #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */ 281 #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */ 282 /** 283 * @} 284 */ 285 286 287 /** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width 288 * @{ 289 */ 290 #define CAN_SJW_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */ 291 #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */ 292 #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */ 293 #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */ 294 /** 295 * @} 296 */ 297 298 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1 299 * @{ 300 */ 301 #define CAN_BS1_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */ 302 #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */ 303 #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */ 304 #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */ 305 #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */ 306 #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */ 307 #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */ 308 #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */ 309 #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */ 310 #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */ 311 #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */ 312 #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */ 313 #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */ 314 #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */ 315 #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */ 316 #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */ 317 /** 318 * @} 319 */ 320 321 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2 322 * @{ 323 */ 324 #define CAN_BS2_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */ 325 #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */ 326 #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */ 327 #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */ 328 #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */ 329 #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */ 330 #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */ 331 #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */ 332 /** 333 * @} 334 */ 335 336 /** @defgroup CAN_filter_mode CAN Filter Mode 337 * @{ 338 */ 339 #define CAN_FILTERMODE_IDMASK ((uint8_t)0x00) /*!< Identifier mask mode */ 340 #define CAN_FILTERMODE_IDLIST ((uint8_t)0x01) /*!< Identifier list mode */ 341 /** 342 * @} 343 */ 344 345 /** @defgroup CAN_filter_scale CAN Filter Scale 346 * @{ 347 */ 348 #define CAN_FILTERSCALE_16BIT ((uint8_t)0x00) /*!< Two 16-bit filters */ 349 #define CAN_FILTERSCALE_32BIT ((uint8_t)0x01) /*!< One 32-bit filter */ 350 /** 351 * @} 352 */ 353 354 /** @defgroup CAN_filter_FIFO CAN Filter FIFO 355 * @{ 356 */ 357 #define CAN_FILTER_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */ 358 #define CAN_FILTER_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */ 359 /** 360 * @} 361 */ 362 363 /** @defgroup CAN_identifier_type CAN Identifier Type 364 * @{ 365 */ 366 #define CAN_ID_STD ((uint32_t)0x00000000) /*!< Standard Id */ 367 #define CAN_ID_EXT ((uint32_t)0x00000004) /*!< Extended Id */ 368 /** 369 * @} 370 */ 371 372 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request 373 * @{ 374 */ 375 #define CAN_RTR_DATA ((uint32_t)0x00000000) /*!< Data frame */ 376 #define CAN_RTR_REMOTE ((uint32_t)0x00000002) /*!< Remote frame */ 377 /** 378 * @} 379 */ 380 381 /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number 382 * @{ 383 */ 384 #define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */ 385 #define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */ 386 /** 387 * @} 388 */ 389 390 /** @defgroup CAN_flags CAN Flags 391 * @{ 392 */ 393 /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus() 394 and CAN_ClearFlag() functions. */ 395 /* If the flag is 0x1XXXXXXX, it means that it can only be used with 396 CAN_GetFlagStatus() function. */ 397 398 /* Transmit Flags */ 399 #define CAN_FLAG_RQCP0 ((uint32_t)0x00000500) /*!< Request MailBox0 flag */ 400 #define CAN_FLAG_RQCP1 ((uint32_t)0x00000508) /*!< Request MailBox1 flag */ 401 #define CAN_FLAG_RQCP2 ((uint32_t)0x00000510) /*!< Request MailBox2 flag */ 402 #define CAN_FLAG_TXOK0 ((uint32_t)0x00000501) /*!< Transmission OK MailBox0 flag */ 403 #define CAN_FLAG_TXOK1 ((uint32_t)0x00000509) /*!< Transmission OK MailBox1 flag */ 404 #define CAN_FLAG_TXOK2 ((uint32_t)0x00000511) /*!< Transmission OK MailBox2 flag */ 405 #define CAN_FLAG_TME0 ((uint32_t)0x0000051A) /*!< Transmit mailbox 0 empty flag */ 406 #define CAN_FLAG_TME1 ((uint32_t)0x0000051B) /*!< Transmit mailbox 0 empty flag */ 407 #define CAN_FLAG_TME2 ((uint32_t)0x0000051C) /*!< Transmit mailbox 0 empty flag */ 408 409 /* Receive Flags */ 410 #define CAN_FLAG_FF0 ((uint32_t)0x00000203) /*!< FIFO 0 Full flag */ 411 #define CAN_FLAG_FOV0 ((uint32_t)0x00000204) /*!< FIFO 0 Overrun flag */ 412 413 #define CAN_FLAG_FF1 ((uint32_t)0x00000403) /*!< FIFO 1 Full flag */ 414 #define CAN_FLAG_FOV1 ((uint32_t)0x00000404) /*!< FIFO 1 Overrun flag */ 415 416 /* Operating Mode Flags */ 417 #define CAN_FLAG_WKU ((uint32_t)0x00000103) /*!< Wake up flag */ 418 #define CAN_FLAG_SLAK ((uint32_t)0x00000101) /*!< Sleep acknowledge flag */ 419 #define CAN_FLAG_SLAKI ((uint32_t)0x00000104) /*!< Sleep acknowledge flag */ 420 /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible. 421 In this case the SLAK bit can be polled.*/ 422 423 /* Error Flags */ 424 #define CAN_FLAG_EWG ((uint32_t)0x00000300) /*!< Error warning flag */ 425 #define CAN_FLAG_EPV ((uint32_t)0x00000301) /*!< Error passive flag */ 426 #define CAN_FLAG_BOF ((uint32_t)0x00000302) /*!< Bus-Off flag */ 427 /** 428 * @} 429 */ 430 431 /** @defgroup CAN_interrupts CAN Interrupts 432 * @{ 433 */ 434 #define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */ 435 436 /* Receive Interrupts */ 437 #define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */ 438 #define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */ 439 #define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */ 440 #define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */ 441 #define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */ 442 #define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */ 443 444 /* Operating Mode Interrupts */ 445 #define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */ 446 #define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */ 447 448 /* Error Interrupts */ 449 #define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */ 450 #define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */ 451 #define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */ 452 #define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */ 453 #define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */ 454 455 /** 456 * @} 457 */ 458 459 /* Mailboxes definition */ 460 #define CAN_TXMAILBOX_0 ((uint8_t)0x00) 461 #define CAN_TXMAILBOX_1 ((uint8_t)0x01) 462 #define CAN_TXMAILBOX_2 ((uint8_t)0x02) 463 464 /** 465 * @} 466 */ 467 468 /* Exported macros -----------------------------------------------------------*/ 469 /** @defgroup CAN_Exported_Macro CAN Exported Macros 470 * @{ 471 */ 472 473 /** @brief Reset CAN handle state. 474 * @param __HANDLE__: CAN handle. 475 * @retval None 476 */ 477 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET) 478 479 /** 480 * @brief Enable the specified CAN interrupt. 481 * @param __HANDLE__: CAN handle. 482 * @param __INTERRUPT__: CAN Interrupt. 483 * @retval None 484 */ 485 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__)) 486 487 /** 488 * @brief Disable the specified CAN interrupt. 489 * @param __HANDLE__: CAN handle. 490 * @param __INTERRUPT__: CAN Interrupt. 491 * @retval None 492 */ 493 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__)) 494 495 /** 496 * @brief Return the number of pending received messages. 497 * @param __HANDLE__: CAN handle. 498 * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. 499 * @retval The number of pending message. 500 */ 501 #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \ 502 ((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03))) 503 504 /** @brief Check whether the specified CAN flag is set or not. 505 * @param __HANDLE__: specifies the CAN Handle. 506 * @param __FLAG__: specifies the flag to check. 507 * This parameter can be one of the following values: 508 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag 509 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag 510 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag 511 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag 512 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag 513 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag 514 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag 515 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag 516 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag 517 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag 518 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag 519 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag 520 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag 521 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag 522 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag 523 * @arg CAN_FLAG_WKU: Wake up Flag 524 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag 525 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag 526 * @arg CAN_FLAG_EWG: Error Warning Flag 527 * @arg CAN_FLAG_EPV: Error Passive Flag 528 * @arg CAN_FLAG_BOF: Bus-Off Flag 529 * @retval The new state of __FLAG__ (TRUE or FALSE). 530 */ 531 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \ 532 ((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 533 (((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 534 (((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 535 (((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 536 ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK)))) 537 538 /** @brief Clear the specified CAN pending flag. 539 * @param __HANDLE__: specifies the CAN Handle. 540 * @param __FLAG__: specifies the flag to check. 541 * This parameter can be one of the following values: 542 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag 543 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag 544 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag 545 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag 546 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag 547 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag 548 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag 549 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag 550 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag 551 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag 552 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag 553 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag 554 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag 555 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag 556 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag 557 * @arg CAN_FLAG_WKU: Wake up Flag 558 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag 559 * @retval The new state of __FLAG__ (TRUE or FALSE). 560 */ 561 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \ 562 ((((__FLAG__) >> 8U) == 5)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 563 (((__FLAG__) >> 8U) == 2)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 564 (((__FLAG__) >> 8U) == 4)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ 565 (((__FLAG__) >> 8U) == 1)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0) 566 567 568 /** @brief Check whether the specified CAN interrupt source is enabled or not. 569 * @param __HANDLE__: specifies the CAN Handle. 570 * @param __INTERRUPT__: specifies the CAN interrupt source to check. 571 * This parameter can be one of the following values: 572 * @arg CAN_IT_TME: Transmit mailbox empty interrupt enable 573 * @arg CAN_IT_FMP0: FIFO0 message pending interrupt enable 574 * @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable 575 * @retval The new state of __IT__ (TRUE or FALSE). 576 */ 577 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 578 579 /** 580 * @brief Check the transmission status of a CAN Frame. 581 * @param __HANDLE__: specifies the CAN Handle. 582 * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission. 583 * @retval The new status of transmission (TRUE or FALSE). 584 */ 585 #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\ 586 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\ 587 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\ 588 ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2))) 589 590 591 592 /** 593 * @brief Release the specified receive FIFO. 594 * @param __HANDLE__: CAN handle. 595 * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. 596 * @retval None 597 */ 598 #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \ 599 ((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1)) 600 601 /** 602 * @brief Cancel a transmit request. 603 * @param __HANDLE__: specifies the CAN Handle. 604 * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission. 605 * @retval None 606 */ 607 #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\ 608 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\ 609 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\ 610 ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2)) 611 612 /** 613 * @brief Enable or disable the DBG Freeze for CAN. 614 * @param __HANDLE__: specifies the CAN Handle. 615 * @param __NEWSTATE__: new state of the CAN peripheral. 616 * This parameter can be: ENABLE (CAN reception/transmission is frozen 617 * during debug. Reception FIFO can still be accessed/controlled normally) 618 * or DISABLE (CAN is working during debug). 619 * @retval None 620 */ 621 #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \ 622 ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF)) 623 624 /** 625 * @} 626 */ 627 628 /* Exported functions --------------------------------------------------------*/ 629 /** @addtogroup CAN_Exported_Functions CAN Exported Functions 630 * @{ 631 */ 632 633 /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions 634 * @brief Initialization and Configuration functions 635 * @{ 636 */ 637 /* addtogroup and de-initialization functions *****************************/ 638 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan); 639 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig); 640 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan); 641 void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan); 642 void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan); 643 /** 644 * @} 645 */ 646 647 /** @addtogroup CAN_Exported_Functions_Group2 Input and Output operation functions 648 * @brief I/O operation functions 649 * @{ 650 */ 651 /* IO operation functions *****************************************************/ 652 HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout); 653 HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan); 654 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout); 655 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber); 656 HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan); 657 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan); 658 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan); 659 void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan); 660 void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan); 661 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan); 662 /** 663 * @} 664 */ 665 666 /** @addtogroup CAN_Exported_Functions_Group3 Peripheral State and Error functions 667 * @brief CAN Peripheral State functions 668 * @{ 669 */ 670 /* Peripheral State and Error functions ***************************************/ 671 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan); 672 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan); 673 /** 674 * @} 675 */ 676 677 /** 678 * @} 679 */ 680 681 /* Private types -------------------------------------------------------------*/ 682 /* Private constants ---------------------------------------------------------*/ 683 /** @defgroup CAN_Private_Constants CAN Private Constants 684 * @{ 685 */ 686 /** @defgroup CAN_transmit_constants CAN Transmit Constants 687 * @{ 688 */ 689 #define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */ 690 /** 691 * @} 692 */ 693 #define CAN_FLAG_MASK ((uint32_t)0x000000FF) 694 695 696 /** 697 * @} 698 */ 699 700 /* Private macros ------------------------------------------------------------*/ 701 /** @defgroup CAN_Private_Macros CAN Private Macros 702 * @{ 703 */ 704 705 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \ 706 ((MODE) == CAN_MODE_LOOPBACK)|| \ 707 ((MODE) == CAN_MODE_SILENT) || \ 708 ((MODE) == CAN_MODE_SILENT_LOOPBACK)) 709 710 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \ 711 ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ)) 712 713 #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ) 714 715 #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ) 716 717 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024)) 718 719 #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27) 720 721 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \ 722 ((MODE) == CAN_FILTERMODE_IDLIST)) 723 724 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \ 725 ((SCALE) == CAN_FILTERSCALE_32BIT)) 726 727 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \ 728 ((FIFO) == CAN_FILTER_FIFO1)) 729 730 #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28) 731 732 #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02)) 733 734 #define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF)) 735 736 #define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF)) 737 738 #define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08)) 739 740 #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \ 741 ((IDTYPE) == CAN_ID_EXT)) 742 743 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE)) 744 745 #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1)) 746 747 /** 748 * @} 749 */ 750 751 /* Private functions ---------------------------------------------------------*/ 752 753 /** 754 * @} 755 */ 756 757 /** 758 * @} 759 */ 760 #endif /* CAN1 */ 761 762 #ifdef __cplusplus 763 } 764 #endif 765 766 #endif /* __STM32L4xx_HAL_CAN_LEGACY_H */ 767 768 769 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 770
