1/****************************************************************************** 2 * @file Device_gcc.ld 3 * @brief GNU Linker Script for Cortex-M based device 4 * @version V2.3.0 5 * @date 23. June 2023 6 ******************************************************************************/ 7/* 8 * Copyright (c) 2009-2023 Arm Limited. All rights reserved. 9 * 10 * SPDX-License-Identifier: Apache-2.0 11 * 12 * Licensed under the Apache License, Version 2.0 (the License); you may 13 * not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 */ 24 25/* 26 *-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- 27 */ 28 29/*---------------------- Flash Configuration ---------------------------------- 30 <h> Flash Configuration 31 <o0> Flash Base Address <0x0-0xFFFFFFFF:8> 32 <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> 33 </h> 34 -----------------------------------------------------------------------------*/ 35__ROM_BASE = 0x00000000; 36__ROM_SIZE = 0x00040000; 37 38/*--------------------- Embedded RAM Configuration ---------------------------- 39 <h> RAM Configuration 40 <o0> RAM Base Address <0x0-0xFFFFFFFF:8> 41 <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> 42 </h> 43 -----------------------------------------------------------------------------*/ 44__RAM_BASE = 0x20000000; 45__RAM_SIZE = 0x00020000; 46 47/*--------------------- Stack / Heap Configuration ---------------------------- 48 <h> Stack / Heap Configuration 49 <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 50 <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 51 </h> 52 -----------------------------------------------------------------------------*/ 53__STACK_SIZE = 0x00000400; 54__HEAP_SIZE = 0x00000C00; 55 56/* 57 *-------------------- <<< end of configuration section >>> ------------------- 58 */ 59 60/* ARMv8-M stack sealing: 61 to use ARMv8-M stack sealing set __STACKSEAL_SIZE to 8 otherwise keep 0 62 */ 63__STACKSEAL_SIZE = 0; 64 65 66MEMORY 67{ 68 FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE 69 RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE 70} 71 72/* Linker script to place sections and symbol values. Should be used together 73 * with other linker script that defines memory regions FLASH and RAM. 74 * It references following symbols, which must be defined in code: 75 * Reset_Handler : Entry of reset handler 76 * 77 * It defines following symbols, which code can use without definition: 78 * __exidx_start 79 * __exidx_end 80 * __copy_table_start__ 81 * __copy_table_end__ 82 * __zero_table_start__ 83 * __zero_table_end__ 84 * __etext (deprecated) 85 * __data_start__ 86 * __preinit_array_start 87 * __preinit_array_end 88 * __init_array_start 89 * __init_array_end 90 * __fini_array_start 91 * __fini_array_end 92 * __data_end__ 93 * __bss_start__ 94 * __bss_end__ 95 * __end__ 96 * end 97 * __HeapLimit 98 * __StackLimit 99 * __StackTop 100 * __stack 101 * __StackSeal (only if ARMv8-M stack sealing is used) 102 */ 103ENTRY(Reset_Handler) 104 105SECTIONS 106{ 107 .text : 108 { 109 KEEP(*(.vectors)) 110 *(.text*) 111 112 KEEP(*(.init)) 113 KEEP(*(.fini)) 114 115 /* .ctors */ 116 *crtbegin.o(.ctors) 117 *crtbegin?.o(.ctors) 118 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) 119 *(SORT(.ctors.*)) 120 *(.ctors) 121 122 /* .dtors */ 123 *crtbegin.o(.dtors) 124 *crtbegin?.o(.dtors) 125 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) 126 *(SORT(.dtors.*)) 127 *(.dtors) 128 129 *(.rodata*) 130 131 KEEP(*(.eh_frame*)) 132 } > FLASH 133 134 /* 135 * SG veneers: 136 * All SG veneers are placed in the special output section .gnu.sgstubs. Its start address 137 * must be set, either with the command line option '--section-start' or in a linker script, 138 * to indicate where to place these veneers in memory. 139 */ 140/* 141 .gnu.sgstubs : 142 { 143 . = ALIGN(32); 144 } > FLASH 145*/ 146 .ARM.extab : 147 { 148 *(.ARM.extab* .gnu.linkonce.armextab.*) 149 } > FLASH 150 151 __exidx_start = .; 152 .ARM.exidx : 153 { 154 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 155 } > FLASH 156 __exidx_end = .; 157 158 .copy.table : 159 { 160 . = ALIGN(4); 161 __copy_table_start__ = .; 162 163 LONG (LOADADDR(.data)) 164 LONG (ADDR(.data)) 165 LONG (SIZEOF(.data) / 4) 166 167 /* Add each additional data section here */ 168/* 169 LONG (LOADADDR(.data2)) 170 LONG (ADDR(.data2)) 171 LONG (SIZEOF(.data2) / 4) 172*/ 173 __copy_table_end__ = .; 174 } > FLASH 175 176 .zero.table : 177 { 178 . = ALIGN(4); 179 __zero_table_start__ = .; 180 181/* .bss initialization to zero is already done during C Run-Time Startup. 182 LONG (ADDR(.bss)) 183 LONG (SIZEOF(.bss) / 4) 184*/ 185 186 /* Add each additional bss section here */ 187/* 188 LONG (ADDR(.bss2)) 189 LONG (SIZEOF(.bss2) / 4) 190*/ 191 __zero_table_end__ = .; 192 } > FLASH 193 194 /* 195 * This __etext variable is kept for backward compatibility with older, 196 * ASM based startup files. 197 */ 198 PROVIDE(__etext = LOADADDR(.data)); 199 200 .data : ALIGN(4) 201 { 202 __data_start__ = .; 203 *(vtable) 204 *(.data) 205 *(.data.*) 206 207 . = ALIGN(4); 208 /* preinit data */ 209 PROVIDE_HIDDEN (__preinit_array_start = .); 210 KEEP(*(.preinit_array)) 211 PROVIDE_HIDDEN (__preinit_array_end = .); 212 213 . = ALIGN(4); 214 /* init data */ 215 PROVIDE_HIDDEN (__init_array_start = .); 216 KEEP(*(SORT(.init_array.*))) 217 KEEP(*(.init_array)) 218 PROVIDE_HIDDEN (__init_array_end = .); 219 220 . = ALIGN(4); 221 /* finit data */ 222 PROVIDE_HIDDEN (__fini_array_start = .); 223 KEEP(*(SORT(.fini_array.*))) 224 KEEP(*(.fini_array)) 225 PROVIDE_HIDDEN (__fini_array_end = .); 226 227 KEEP(*(.jcr*)) 228 . = ALIGN(4); 229 /* All data end */ 230 __data_end__ = .; 231 232 } > RAM AT > FLASH 233 234 /* 235 * Secondary data section, optional 236 * 237 * Remember to add each additional data section 238 * to the .copy.table above to assure proper 239 * initialization during startup. 240 */ 241/* 242 .data2 : ALIGN(4) 243 { 244 . = ALIGN(4); 245 __data2_start__ = .; 246 *(.data2) 247 *(.data2.*) 248 . = ALIGN(4); 249 __data2_end__ = .; 250 251 } > RAM2 AT > FLASH 252*/ 253 254 .bss : 255 { 256 . = ALIGN(4); 257 __bss_start__ = .; 258 *(.bss) 259 *(.bss.*) 260 *(COMMON) 261 . = ALIGN(4); 262 __bss_end__ = .; 263 } > RAM AT > RAM 264 265 /* 266 * Secondary bss section, optional 267 * 268 * Remember to add each additional bss section 269 * to the .zero.table above to assure proper 270 * initialization during startup. 271 */ 272/* 273 .bss2 : 274 { 275 . = ALIGN(4); 276 __bss2_start__ = .; 277 *(.bss2) 278 *(.bss2.*) 279 . = ALIGN(4); 280 __bss2_end__ = .; 281 } > RAM2 AT > RAM2 282*/ 283 284 .heap (NOLOAD) : 285 { 286 . = ALIGN(8); 287 __end__ = .; 288 PROVIDE(end = .); 289 . = . + __HEAP_SIZE; 290 . = ALIGN(8); 291 __HeapLimit = .; 292 } > RAM 293 294 .stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE - __STACKSEAL_SIZE) (NOLOAD) : 295 { 296 . = ALIGN(8); 297 __StackLimit = .; 298 . = . + __STACK_SIZE; 299 . = ALIGN(8); 300 __StackTop = .; 301 } > RAM 302 PROVIDE(__stack = __StackTop); 303 304 /* ARMv8-M stack sealing: 305 to use ARMv8-M stack sealing uncomment '.stackseal' section 306 */ 307/* 308 .stackseal (ORIGIN(RAM) + LENGTH(RAM) - __STACKSEAL_SIZE) (NOLOAD) : 309 { 310 . = ALIGN(8); 311 __StackSeal = .; 312 . = . + 8; 313 . = ALIGN(8); 314 } > RAM 315*/ 316 317 /* Check if data + heap + stack exceeds RAM limit */ 318 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") 319} 320