1;/*
2; * Copyright (c) 2009-2024 Arm Limited
3; *
4; * Licensed under the Apache License, Version 2.0 (the "License");
5; * you may not use this file except in compliance with the License.
6; * You may obtain a copy of the License at
7; *
8; *     http://www.apache.org/licenses/LICENSE-2.0
9; *
10; * Unless required by applicable law or agreed to in writing, software
11; * distributed under the License is distributed on an "AS IS" BASIS,
12; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13; * See the License for the specific language governing permissions and
14; * limitations under the License.
15; *
16; *
17; * This file is derivative of CMSIS V5.00 gcc_arm.ld
18; */
19
20/* Linker script to configure memory regions. */
21/* This file will be run trough the pre-processor. */
22
23#include "region_defs.h"
24
25MEMORY
26{
27    FLASH    (rx)  : ORIGIN = BL2_CODE_START, LENGTH = BL2_CODE_SIZE
28    CODE_RAM (rwx) : ORIGIN = BL2_CODE_SRAM_BASE, LENGTH = S_RAM_CODE_SIZE
29    RAM      (rwx) : ORIGIN = BL2_DATA_START, LENGTH = BL2_DATA_SIZE
30}
31
32__heap_size__  = BL2_HEAP_SIZE;
33__msp_stack_size__ = BL2_MSP_STACK_SIZE;
34
35ENTRY(Reset_Handler)
36
37SECTIONS
38{
39    /* Startup section is loaded to Flash and runs from Flash */
40    .startup :
41    {
42        KEEP(*(.vectors))
43        __Vectors_End = .;
44        __Vectors_Size = __Vectors_End - __Vectors;
45        __end__ = .;
46
47
48        KEEP(*(.init))
49        KEEP(*(.fini))
50
51        *startup_musca.*(.text*)
52    } > FLASH
53
54    /* eFlash driver code that gets copied from Flash to SRAM */
55    .ER_CODE_SRAM : ALIGN(4)
56    {
57        *libflash_drivers.o(.text*)
58        *libflash_drivers.o(.rodata*)
59        . = ALIGN(4); /* This alignment is needed to make the section size 4 bytes aligned */
60    } > CODE_RAM AT > FLASH
61    Image$$ER_CODE_SRAM$$Base = ADDR(.ER_CODE_SRAM);
62    Image$$ER_CODE_SRAM$$Limit = ADDR(.ER_CODE_SRAM) + SIZEOF(.ER_CODE_SRAM);
63
64    .text (READONLY) :
65    {
66        *(.text*)
67
68        . = ALIGN(4);
69        /* preinit data */
70        PROVIDE_HIDDEN (__preinit_array_start = .);
71        KEEP(*(.preinit_array))
72        PROVIDE_HIDDEN (__preinit_array_end = .);
73
74        . = ALIGN(4);
75        /* init data */
76        PROVIDE_HIDDEN (__init_array_start = .);
77        KEEP(*(SORT(.init_array.*)))
78        KEEP(*(.init_array))
79        PROVIDE_HIDDEN (__init_array_end = .);
80
81        . = ALIGN(4);
82        /* finit data */
83        PROVIDE_HIDDEN (__fini_array_start = .);
84        KEEP(*(SORT(.fini_array.*)))
85        KEEP(*(.fini_array))
86        PROVIDE_HIDDEN (__fini_array_end = .);
87
88        /* .copy.table
89         * To copy multiple ROM to RAM sections,
90         * define __STARTUP_COPY_MULTIPLE in startup file */
91        . = ALIGN(4);
92        __copy_table_start__ = .;
93        LONG (LOADADDR(.ER_CODE_SRAM))
94        LONG (ADDR(.ER_CODE_SRAM))
95        LONG (SIZEOF(.ER_CODE_SRAM) / 4)
96#ifdef CODE_SHARING
97        LONG (LOADADDR(.tfm_shared_symbols))
98        LONG (ADDR(.tfm_shared_symbols))
99        LONG (SIZEOF(.tfm_shared_symbols) / 4)
100#endif
101        LONG (LOADADDR(.data))
102        LONG (ADDR(.data))
103        LONG (SIZEOF(.data) / 4)
104        __copy_table_end__ = .;
105
106        /* .zero.table
107         * To clear multiple BSS sections,
108         * uncomment .zero.table and,
109         * define __STARTUP_CLEAR_BSS_MULTIPLE in startup file */
110        . = ALIGN(4);
111        __zero_table_start__ = .;
112       LONG (ADDR(.bss))
113       LONG (SIZEOF(.bss) / 4)
114        __zero_table_end__ = .;
115
116        KEEP(*(.init))
117        KEEP(*(.fini))
118
119        /* .ctors */
120        *crtbegin.o(.ctors)
121        *crtbegin?.o(.ctors)
122        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
123        *(SORT(.ctors.*))
124        *(.ctors)
125
126        /* .dtors */
127         *crtbegin.o(.dtors)
128         *crtbegin?.o(.dtors)
129         *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
130         *(SORT(.dtors.*))
131         *(.dtors)
132
133        *(.rodata*)
134
135        KEEP(*(.eh_frame*))
136    } > FLASH
137
138    .ARM.extab :
139    {
140        *(.ARM.extab* .gnu.linkonce.armextab.*)
141    } > FLASH
142
143    __exidx_start = .;
144    .ARM.exidx :
145    {
146        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
147    } > FLASH
148    __exidx_end = .;
149
150#ifdef CODE_SHARING
151    /* The code sharing between bootloader and runtime firmware requires to
152     * share the global variables. Section size must be equal with
153     * SHARED_SYMBOL_AREA_SIZE defined in region_defs.h
154     */
155    .tfm_shared_symbols : ALIGN(4)
156    {
157        *(.data.mbedtls_calloc_func)
158        *(.data.mbedtls_free_func)
159        *(.data.mbedtls_exit)
160        *(.data.memset_func)
161        . = ALIGN(SHARED_SYMBOL_AREA_SIZE);
162    } > RAM AT > FLASH
163
164    ASSERT(SHARED_SYMBOL_AREA_SIZE % 4 == 0, "SHARED_SYMBOL_AREA_SIZE must be divisible by 4")
165#endif
166
167    .tfm_bl2_shared_data :
168    {
169        . += BOOT_TFM_SHARED_DATA_SIZE;
170    } > RAM
171    Image$$SHARED_DATA$$RW$$Base = ADDR(.tfm_bl2_shared_data);
172    Image$$SHARED_DATA$$RW$$Limit = ADDR(.tfm_bl2_shared_data) + SIZEOF(.tfm_bl2_shared_data);
173
174    .data : ALIGN(4)
175    {
176        *(.data*)
177
178        KEEP(*(.jcr*))
179        . = ALIGN(4);
180
181    } > RAM AT > FLASH
182    Image$$ER_DATA$$Base = ADDR(.data);
183
184    .bss : ALIGN(4)
185    {
186        . = ALIGN(4);
187        __bss_start__ = .;
188        *(.bss*)
189        *(COMMON)
190        . = ALIGN(4);
191        __bss_end__ = .;
192    } > RAM
193
194    .msp_stack : ALIGN(32)
195    {
196        . += __msp_stack_size__;
197    } > RAM
198    Image$$ARM_LIB_STACK$$ZI$$Base = ADDR(.msp_stack);
199    Image$$ARM_LIB_STACK$$ZI$$Limit = ADDR(.msp_stack) + SIZEOF(.msp_stack);
200
201    .heap : ALIGN(8)
202    {
203        . = ALIGN(8);
204        __end__ = .;
205        PROVIDE(end = .);
206        __HeapBase = .;
207        . += __heap_size__;
208        __HeapLimit = .;
209        __heap_limit = .; /* Add for _sbrk */
210    } > RAM
211    Image$$ARM_LIB_HEAP$$ZI$$Limit = ADDR(.heap) + SIZEOF(.heap);
212
213    PROVIDE(__stack = Image$$ARM_LIB_STACK$$ZI$$Limit);
214}
215