1/**************************************************************************//** 2 * @file startup_psoc6_01_cm4.S 3 * @brief CMSIS Core Device Startup File for 4 * ARMCM4 Device Series 5 * @version V5.00 6 * @date 02. March 2016 7 ******************************************************************************/ 8/* 9 * Copyright (c) 2009-2016 ARM Limited. All rights reserved. 10 * 11 * SPDX-License-Identifier: Apache-2.0 12 * 13 * Licensed under the Apache License, Version 2.0 (the License); you may 14 * not use this file except in compliance with the License. 15 * You may obtain a copy of the License at 16 * 17 * www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 21 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 */ 25 26 /* Address of the NMI handler */ 27 #define CY_NMI_HANLDER_ADDR 0x0000000D 28 29 /* The CPU VTOR register */ 30 #define CY_CPU_VTOR_ADDR 0xE000ED08 31 32 .syntax unified 33 .section __STACK , __stack 34 .align 3 35 36#ifdef __STACK_SIZE 37 .equ Stack_Size, __STACK_SIZE 38#else 39 .equ Stack_Size, 0x00001000 40#endif 41 .globl __StackTop 42 .globl __StackLimit 43 44__StackLimit: 45 .space Stack_Size 46 .equ __StackTop, . - Stack_Size 47 48 .section __HEAP, __heap 49 .align 3 50#ifdef __HEAP_SIZE 51 .equ Heap_Size, __HEAP_SIZE 52#else 53 .equ Heap_Size, 0x00000400 54#endif 55 .globl __HeapBase 56__HeapBase: 57 .if Heap_Size 58 .space Heap_Size 59 .endif 60 61 .section __VECT, ___Vectors 62 .align 2 63 .globl ___Vectors 64___Vectors: 65 .long __StackTop /* Top of Stack */ 66 .long Reset_Handler /* Reset Handler */ 67 .long CY_NMI_HANLDER_ADDR /* NMI Handler */ 68 .long HardFault_Handler /* Hard Fault Handler */ 69 .long MemManage_Handler /* MPU Fault Handler */ 70 .long BusFault_Handler /* Bus Fault Handler */ 71 .long UsageFault_Handler /* Usage Fault Handler */ 72 .long 0 /* Reserved */ 73 .long 0 /* Reserved */ 74 .long 0 /* Reserved */ 75 .long 0 /* Reserved */ 76 .long SVC_Handler /* SVCall Handler */ 77 .long DebugMon_Handler /* Debug Monitor Handler */ 78 .long 0 /* Reserved */ 79 .long PendSV_Handler /* PendSV Handler */ 80 .long SysTick_Handler /* SysTick Handler */ 81 82 /* External interrupts Description */ 83 .long ioss_interrupts_gpio_0_IRQHandler /* GPIO Port Interrupt #0 */ 84 .long ioss_interrupts_gpio_1_IRQHandler /* GPIO Port Interrupt #1 */ 85 .long ioss_interrupts_gpio_2_IRQHandler /* GPIO Port Interrupt #2 */ 86 .long ioss_interrupts_gpio_3_IRQHandler /* GPIO Port Interrupt #3 */ 87 .long ioss_interrupts_gpio_4_IRQHandler /* GPIO Port Interrupt #4 */ 88 .long ioss_interrupts_gpio_5_IRQHandler /* GPIO Port Interrupt #5 */ 89 .long ioss_interrupts_gpio_6_IRQHandler /* GPIO Port Interrupt #6 */ 90 .long ioss_interrupts_gpio_7_IRQHandler /* GPIO Port Interrupt #7 */ 91 .long ioss_interrupts_gpio_8_IRQHandler /* GPIO Port Interrupt #8 */ 92 .long ioss_interrupts_gpio_9_IRQHandler /* GPIO Port Interrupt #9 */ 93 .long ioss_interrupts_gpio_10_IRQHandler /* GPIO Port Interrupt #10 */ 94 .long ioss_interrupts_gpio_11_IRQHandler /* GPIO Port Interrupt #11 */ 95 .long ioss_interrupts_gpio_12_IRQHandler /* GPIO Port Interrupt #12 */ 96 .long ioss_interrupts_gpio_13_IRQHandler /* GPIO Port Interrupt #13 */ 97 .long ioss_interrupts_gpio_14_IRQHandler /* GPIO Port Interrupt #14 */ 98 .long ioss_interrupt_gpio_IRQHandler /* GPIO All Ports */ 99 .long ioss_interrupt_vdd_IRQHandler /* GPIO Supply Detect Interrupt */ 100 .long lpcomp_interrupt_IRQHandler /* Low Power Comparator Interrupt */ 101 .long scb_8_interrupt_IRQHandler /* Serial Communication Block #8 (DeepSleep capable) */ 102 .long srss_interrupt_mcwdt_0_IRQHandler /* Multi Counter Watchdog Timer interrupt */ 103 .long srss_interrupt_mcwdt_1_IRQHandler /* Multi Counter Watchdog Timer interrupt */ 104 .long srss_interrupt_backup_IRQHandler /* Backup domain interrupt */ 105 .long srss_interrupt_IRQHandler /* Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) */ 106 .long pass_interrupt_ctbs_IRQHandler /* CTBm Interrupt (all CTBms) */ 107 .long bless_interrupt_IRQHandler /* Bluetooth Radio interrupt */ 108 .long cpuss_interrupts_ipc_0_IRQHandler /* CPUSS Inter Process Communication Interrupt #0 */ 109 .long cpuss_interrupts_ipc_1_IRQHandler /* CPUSS Inter Process Communication Interrupt #1 */ 110 .long cpuss_interrupts_ipc_2_IRQHandler /* CPUSS Inter Process Communication Interrupt #2 */ 111 .long cpuss_interrupts_ipc_3_IRQHandler /* CPUSS Inter Process Communication Interrupt #3 */ 112 .long cpuss_interrupts_ipc_4_IRQHandler /* CPUSS Inter Process Communication Interrupt #4 */ 113 .long cpuss_interrupts_ipc_5_IRQHandler /* CPUSS Inter Process Communication Interrupt #5 */ 114 .long cpuss_interrupts_ipc_6_IRQHandler /* CPUSS Inter Process Communication Interrupt #6 */ 115 .long cpuss_interrupts_ipc_7_IRQHandler /* CPUSS Inter Process Communication Interrupt #7 */ 116 .long cpuss_interrupts_ipc_8_IRQHandler /* CPUSS Inter Process Communication Interrupt #8 */ 117 .long cpuss_interrupts_ipc_9_IRQHandler /* CPUSS Inter Process Communication Interrupt #9 */ 118 .long cpuss_interrupts_ipc_10_IRQHandler /* CPUSS Inter Process Communication Interrupt #10 */ 119 .long cpuss_interrupts_ipc_11_IRQHandler /* CPUSS Inter Process Communication Interrupt #11 */ 120 .long cpuss_interrupts_ipc_12_IRQHandler /* CPUSS Inter Process Communication Interrupt #12 */ 121 .long cpuss_interrupts_ipc_13_IRQHandler /* CPUSS Inter Process Communication Interrupt #13 */ 122 .long cpuss_interrupts_ipc_14_IRQHandler /* CPUSS Inter Process Communication Interrupt #14 */ 123 .long cpuss_interrupts_ipc_15_IRQHandler /* CPUSS Inter Process Communication Interrupt #15 */ 124 .long scb_0_interrupt_IRQHandler /* Serial Communication Block #0 */ 125 .long scb_1_interrupt_IRQHandler /* Serial Communication Block #1 */ 126 .long scb_2_interrupt_IRQHandler /* Serial Communication Block #2 */ 127 .long scb_3_interrupt_IRQHandler /* Serial Communication Block #3 */ 128 .long scb_4_interrupt_IRQHandler /* Serial Communication Block #4 */ 129 .long scb_5_interrupt_IRQHandler /* Serial Communication Block #5 */ 130 .long scb_6_interrupt_IRQHandler /* Serial Communication Block #6 */ 131 .long scb_7_interrupt_IRQHandler /* Serial Communication Block #7 */ 132 .long csd_interrupt_IRQHandler /* CSD (Capsense) interrupt */ 133 .long cpuss_interrupts_dw0_0_IRQHandler /* CPUSS DataWire #0, Channel #0 */ 134 .long cpuss_interrupts_dw0_1_IRQHandler /* CPUSS DataWire #0, Channel #1 */ 135 .long cpuss_interrupts_dw0_2_IRQHandler /* CPUSS DataWire #0, Channel #2 */ 136 .long cpuss_interrupts_dw0_3_IRQHandler /* CPUSS DataWire #0, Channel #3 */ 137 .long cpuss_interrupts_dw0_4_IRQHandler /* CPUSS DataWire #0, Channel #4 */ 138 .long cpuss_interrupts_dw0_5_IRQHandler /* CPUSS DataWire #0, Channel #5 */ 139 .long cpuss_interrupts_dw0_6_IRQHandler /* CPUSS DataWire #0, Channel #6 */ 140 .long cpuss_interrupts_dw0_7_IRQHandler /* CPUSS DataWire #0, Channel #7 */ 141 .long cpuss_interrupts_dw0_8_IRQHandler /* CPUSS DataWire #0, Channel #8 */ 142 .long cpuss_interrupts_dw0_9_IRQHandler /* CPUSS DataWire #0, Channel #9 */ 143 .long cpuss_interrupts_dw0_10_IRQHandler /* CPUSS DataWire #0, Channel #10 */ 144 .long cpuss_interrupts_dw0_11_IRQHandler /* CPUSS DataWire #0, Channel #11 */ 145 .long cpuss_interrupts_dw0_12_IRQHandler /* CPUSS DataWire #0, Channel #12 */ 146 .long cpuss_interrupts_dw0_13_IRQHandler /* CPUSS DataWire #0, Channel #13 */ 147 .long cpuss_interrupts_dw0_14_IRQHandler /* CPUSS DataWire #0, Channel #14 */ 148 .long cpuss_interrupts_dw0_15_IRQHandler /* CPUSS DataWire #0, Channel #15 */ 149 .long cpuss_interrupts_dw1_0_IRQHandler /* CPUSS DataWire #1, Channel #0 */ 150 .long cpuss_interrupts_dw1_1_IRQHandler /* CPUSS DataWire #1, Channel #1 */ 151 .long cpuss_interrupts_dw1_2_IRQHandler /* CPUSS DataWire #1, Channel #2 */ 152 .long cpuss_interrupts_dw1_3_IRQHandler /* CPUSS DataWire #1, Channel #3 */ 153 .long cpuss_interrupts_dw1_4_IRQHandler /* CPUSS DataWire #1, Channel #4 */ 154 .long cpuss_interrupts_dw1_5_IRQHandler /* CPUSS DataWire #1, Channel #5 */ 155 .long cpuss_interrupts_dw1_6_IRQHandler /* CPUSS DataWire #1, Channel #6 */ 156 .long cpuss_interrupts_dw1_7_IRQHandler /* CPUSS DataWire #1, Channel #7 */ 157 .long cpuss_interrupts_dw1_8_IRQHandler /* CPUSS DataWire #1, Channel #8 */ 158 .long cpuss_interrupts_dw1_9_IRQHandler /* CPUSS DataWire #1, Channel #9 */ 159 .long cpuss_interrupts_dw1_10_IRQHandler /* CPUSS DataWire #1, Channel #10 */ 160 .long cpuss_interrupts_dw1_11_IRQHandler /* CPUSS DataWire #1, Channel #11 */ 161 .long cpuss_interrupts_dw1_12_IRQHandler /* CPUSS DataWire #1, Channel #12 */ 162 .long cpuss_interrupts_dw1_13_IRQHandler /* CPUSS DataWire #1, Channel #13 */ 163 .long cpuss_interrupts_dw1_14_IRQHandler /* CPUSS DataWire #1, Channel #14 */ 164 .long cpuss_interrupts_dw1_15_IRQHandler /* CPUSS DataWire #1, Channel #15 */ 165 .long cpuss_interrupts_fault_0_IRQHandler /* CPUSS Fault Structure Interrupt #0 */ 166 .long cpuss_interrupts_fault_1_IRQHandler /* CPUSS Fault Structure Interrupt #1 */ 167 .long cpuss_interrupt_crypto_IRQHandler /* CRYPTO Accelerator Interrupt */ 168 .long cpuss_interrupt_fm_IRQHandler /* FLASH Macro Interrupt */ 169 .long cpuss_interrupts_cm0_cti_0_IRQHandler /* CM0+ CTI #0 */ 170 .long cpuss_interrupts_cm0_cti_1_IRQHandler /* CM0+ CTI #1 */ 171 .long cpuss_interrupts_cm4_cti_0_IRQHandler /* CM4 CTI #0 */ 172 .long cpuss_interrupts_cm4_cti_1_IRQHandler /* CM4 CTI #1 */ 173 .long tcpwm_0_interrupts_0_IRQHandler /* TCPWM #0, Counter #0 */ 174 .long tcpwm_0_interrupts_1_IRQHandler /* TCPWM #0, Counter #1 */ 175 .long tcpwm_0_interrupts_2_IRQHandler /* TCPWM #0, Counter #2 */ 176 .long tcpwm_0_interrupts_3_IRQHandler /* TCPWM #0, Counter #3 */ 177 .long tcpwm_0_interrupts_4_IRQHandler /* TCPWM #0, Counter #4 */ 178 .long tcpwm_0_interrupts_5_IRQHandler /* TCPWM #0, Counter #5 */ 179 .long tcpwm_0_interrupts_6_IRQHandler /* TCPWM #0, Counter #6 */ 180 .long tcpwm_0_interrupts_7_IRQHandler /* TCPWM #0, Counter #7 */ 181 .long tcpwm_1_interrupts_0_IRQHandler /* TCPWM #1, Counter #0 */ 182 .long tcpwm_1_interrupts_1_IRQHandler /* TCPWM #1, Counter #1 */ 183 .long tcpwm_1_interrupts_2_IRQHandler /* TCPWM #1, Counter #2 */ 184 .long tcpwm_1_interrupts_3_IRQHandler /* TCPWM #1, Counter #3 */ 185 .long tcpwm_1_interrupts_4_IRQHandler /* TCPWM #1, Counter #4 */ 186 .long tcpwm_1_interrupts_5_IRQHandler /* TCPWM #1, Counter #5 */ 187 .long tcpwm_1_interrupts_6_IRQHandler /* TCPWM #1, Counter #6 */ 188 .long tcpwm_1_interrupts_7_IRQHandler /* TCPWM #1, Counter #7 */ 189 .long tcpwm_1_interrupts_8_IRQHandler /* TCPWM #1, Counter #8 */ 190 .long tcpwm_1_interrupts_9_IRQHandler /* TCPWM #1, Counter #9 */ 191 .long tcpwm_1_interrupts_10_IRQHandler /* TCPWM #1, Counter #10 */ 192 .long tcpwm_1_interrupts_11_IRQHandler /* TCPWM #1, Counter #11 */ 193 .long tcpwm_1_interrupts_12_IRQHandler /* TCPWM #1, Counter #12 */ 194 .long tcpwm_1_interrupts_13_IRQHandler /* TCPWM #1, Counter #13 */ 195 .long tcpwm_1_interrupts_14_IRQHandler /* TCPWM #1, Counter #14 */ 196 .long tcpwm_1_interrupts_15_IRQHandler /* TCPWM #1, Counter #15 */ 197 .long tcpwm_1_interrupts_16_IRQHandler /* TCPWM #1, Counter #16 */ 198 .long tcpwm_1_interrupts_17_IRQHandler /* TCPWM #1, Counter #17 */ 199 .long tcpwm_1_interrupts_18_IRQHandler /* TCPWM #1, Counter #18 */ 200 .long tcpwm_1_interrupts_19_IRQHandler /* TCPWM #1, Counter #19 */ 201 .long tcpwm_1_interrupts_20_IRQHandler /* TCPWM #1, Counter #20 */ 202 .long tcpwm_1_interrupts_21_IRQHandler /* TCPWM #1, Counter #21 */ 203 .long tcpwm_1_interrupts_22_IRQHandler /* TCPWM #1, Counter #22 */ 204 .long tcpwm_1_interrupts_23_IRQHandler /* TCPWM #1, Counter #23 */ 205 .long udb_interrupts_0_IRQHandler /* UDB Interrupt #0 */ 206 .long udb_interrupts_1_IRQHandler /* UDB Interrupt #1 */ 207 .long udb_interrupts_2_IRQHandler /* UDB Interrupt #2 */ 208 .long udb_interrupts_3_IRQHandler /* UDB Interrupt #3 */ 209 .long udb_interrupts_4_IRQHandler /* UDB Interrupt #4 */ 210 .long udb_interrupts_5_IRQHandler /* UDB Interrupt #5 */ 211 .long udb_interrupts_6_IRQHandler /* UDB Interrupt #6 */ 212 .long udb_interrupts_7_IRQHandler /* UDB Interrupt #7 */ 213 .long udb_interrupts_8_IRQHandler /* UDB Interrupt #8 */ 214 .long udb_interrupts_9_IRQHandler /* UDB Interrupt #9 */ 215 .long udb_interrupts_10_IRQHandler /* UDB Interrupt #10 */ 216 .long udb_interrupts_11_IRQHandler /* UDB Interrupt #11 */ 217 .long udb_interrupts_12_IRQHandler /* UDB Interrupt #12 */ 218 .long udb_interrupts_13_IRQHandler /* UDB Interrupt #13 */ 219 .long udb_interrupts_14_IRQHandler /* UDB Interrupt #14 */ 220 .long udb_interrupts_15_IRQHandler /* UDB Interrupt #15 */ 221 .long pass_interrupt_sar_IRQHandler /* SAR ADC interrupt */ 222 .long audioss_interrupt_i2s_IRQHandler /* I2S Audio interrupt */ 223 .long audioss_interrupt_pdm_IRQHandler /* PDM/PCM Audio interrupt */ 224 .long profile_interrupt_IRQHandler /* Energy Profiler interrupt */ 225 .long smif_interrupt_IRQHandler /* Serial Memory Interface interrupt */ 226 .long usb_interrupt_hi_IRQHandler /* USB Interrupt */ 227 .long usb_interrupt_med_IRQHandler /* USB Interrupt */ 228 .long usb_interrupt_lo_IRQHandler /* USB Interrupt */ 229 .long pass_interrupt_dacs_IRQHandler /* Consolidated interrrupt for all DACs */ 230 231 .equ __VectorsSize, . - ___Vectors 232 233 .section __RAMVECTORS, ___ramVectors 234 .align 2 235 .globl ___ramVectors 236 237___ramVectors: 238 .space __VectorsSize 239 240 241 .text 242 .thumb_func 243 .align 2 244 /* Reset handler */ 245 .globl Reset_Handler 246 247Reset_Handler: 248 bl Cy_OnResetUser 249 cpsid i 250 251/* Single section scheme. 252 * 253 * The ranges of copy from/to are specified by following symbols 254 * __etext: LMA of start of the section to copy from. Usually end of text 255 * __data_start__: VMA of start of the section to copy to 256 * __data_end__: VMA of end of the section to copy to 257 * 258 * All addresses must be aligned to 4 bytes boundary. 259 */ 260 ldr r0, =___ramVectors 261 ldr r1, =___Vectors 262 ldr r2, =__VectorsSize 263 bl _memcpy 264 265 ldr r0, =segment$start$__DATA 266 ldr r1, =segment$end$__TEXT 267 ldr r2, =section$start$__DATA$__zerofill 268 sub r2, r0 269 bl _memcpy 270 271 ldr r0, =section$start$__DATA$__zerofill 272 eor r1, r1 273 ldr r2, =section$end$__DATA$__zerofill 274 sub r2, r0 275 bl _memset 276 277 /* Update Vector Table Offset Register. */ 278 ldr r0, =___ramVectors 279 ldr r1, =CY_CPU_VTOR_ADDR 280 str r0, [r1] 281 dsb 0xF 282 283 /* Enable the FPU if used */ 284 bl _Cy_SystemInitFpuEnable 285 286 bl _HeapInit 287#ifndef __NO_SYSTEM_INIT 288 bl _SystemInit 289#endif 290 291 bl _main 292 293 /* Should never get here */ 294 b . 295 296 .pool 297 298 .text 299 .thumb 300 .thumb_func 301 .align 2 302 303 /* Device startup customization */ 304 .weak_definition Cy_OnResetUser 305 .global Cy_OnResetUser, Cy_OnResetUser 306Cy_OnResetUser: 307 bx lr 308 309 .text 310 .align 1 311 .thumb_func 312 .weak_reference Default_Handler 313 314Default_Handler: 315 b . 316 317 .text 318 .thumb_func 319 .align 2 320 .weak_definition Cy_SysLib_FaultHandler 321 322Cy_SysLib_FaultHandler: 323 b . 324 325 .text 326 .thumb_func 327 .align 2 328 329Fault_Handler: 330 /* Storing LR content for Creator call stack trace */ 331 push {LR} 332 movs r0, #4 333 mov r1, LR 334 tst r0, r1 335 beq .L_MSP 336 mrs r0, PSP 337 b .L_API_call 338.L_MSP: 339 mrs r0, MSP 340 /* Compensation of stack pointer address due to pushing 4 bytes of LR */ 341 adds r0, r0, #4 342 nop 343.L_API_call: 344 bl Cy_SysLib_FaultHandler 345 b . 346 347.macro def_fault_Handler fault_handler_name 348 .weak_definition \fault_handler_name 349 .set \fault_handler_name, Fault_Handler 350 .endm 351 352/* Macro to define default handlers. Default handler 353 * will be weak symbol and just dead loops. They can be 354 * overwritten by other handlers */ 355 .macro def_irq_handler handler_name 356 .weak_definition \handler_name 357 .set \handler_name, Default_Handler 358 .endm 359 360 def_irq_handler NMI_Handler 361 362 def_fault_Handler HardFault_Handler 363 def_fault_Handler MemManage_Handler 364 def_fault_Handler BusFault_Handler 365 def_fault_Handler UsageFault_Handler 366 367 def_irq_handler SVC_Handler 368 def_irq_handler DebugMon_Handler 369 def_irq_handler PendSV_Handler 370 def_irq_handler SysTick_Handler 371 372 def_irq_handler ioss_interrupts_gpio_0_IRQHandler /* GPIO Port Interrupt #0 */ 373 def_irq_handler ioss_interrupts_gpio_1_IRQHandler /* GPIO Port Interrupt #1 */ 374 def_irq_handler ioss_interrupts_gpio_2_IRQHandler /* GPIO Port Interrupt #2 */ 375 def_irq_handler ioss_interrupts_gpio_3_IRQHandler /* GPIO Port Interrupt #3 */ 376 def_irq_handler ioss_interrupts_gpio_4_IRQHandler /* GPIO Port Interrupt #4 */ 377 def_irq_handler ioss_interrupts_gpio_5_IRQHandler /* GPIO Port Interrupt #5 */ 378 def_irq_handler ioss_interrupts_gpio_6_IRQHandler /* GPIO Port Interrupt #6 */ 379 def_irq_handler ioss_interrupts_gpio_7_IRQHandler /* GPIO Port Interrupt #7 */ 380 def_irq_handler ioss_interrupts_gpio_8_IRQHandler /* GPIO Port Interrupt #8 */ 381 def_irq_handler ioss_interrupts_gpio_9_IRQHandler /* GPIO Port Interrupt #9 */ 382 def_irq_handler ioss_interrupts_gpio_10_IRQHandler /* GPIO Port Interrupt #10 */ 383 def_irq_handler ioss_interrupts_gpio_11_IRQHandler /* GPIO Port Interrupt #11 */ 384 def_irq_handler ioss_interrupts_gpio_12_IRQHandler /* GPIO Port Interrupt #12 */ 385 def_irq_handler ioss_interrupts_gpio_13_IRQHandler /* GPIO Port Interrupt #13 */ 386 def_irq_handler ioss_interrupts_gpio_14_IRQHandler /* GPIO Port Interrupt #14 */ 387 def_irq_handler ioss_interrupt_gpio_IRQHandler /* GPIO All Ports */ 388 def_irq_handler ioss_interrupt_vdd_IRQHandler /* GPIO Supply Detect Interrupt */ 389 def_irq_handler lpcomp_interrupt_IRQHandler /* Low Power Comparator Interrupt */ 390 def_irq_handler scb_8_interrupt_IRQHandler /* Serial Communication Block #8 (DeepSleep capable) */ 391 def_irq_handler srss_interrupt_mcwdt_0_IRQHandler /* Multi Counter Watchdog Timer interrupt */ 392 def_irq_handler srss_interrupt_mcwdt_1_IRQHandler /* Multi Counter Watchdog Timer interrupt */ 393 def_irq_handler srss_interrupt_backup_IRQHandler /* Backup domain interrupt */ 394 def_irq_handler srss_interrupt_IRQHandler /* Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) */ 395 def_irq_handler pass_interrupt_ctbs_IRQHandler /* CTBm Interrupt (all CTBms) */ 396 def_irq_handler bless_interrupt_IRQHandler /* Bluetooth Radio interrupt */ 397 def_irq_handler cpuss_interrupts_ipc_0_IRQHandler /* CPUSS Inter Process Communication Interrupt #0 */ 398 def_irq_handler cpuss_interrupts_ipc_1_IRQHandler /* CPUSS Inter Process Communication Interrupt #1 */ 399 def_irq_handler cpuss_interrupts_ipc_2_IRQHandler /* CPUSS Inter Process Communication Interrupt #2 */ 400 def_irq_handler cpuss_interrupts_ipc_3_IRQHandler /* CPUSS Inter Process Communication Interrupt #3 */ 401 def_irq_handler cpuss_interrupts_ipc_4_IRQHandler /* CPUSS Inter Process Communication Interrupt #4 */ 402 def_irq_handler cpuss_interrupts_ipc_5_IRQHandler /* CPUSS Inter Process Communication Interrupt #5 */ 403 def_irq_handler cpuss_interrupts_ipc_6_IRQHandler /* CPUSS Inter Process Communication Interrupt #6 */ 404 def_irq_handler cpuss_interrupts_ipc_7_IRQHandler /* CPUSS Inter Process Communication Interrupt #7 */ 405 def_irq_handler cpuss_interrupts_ipc_8_IRQHandler /* CPUSS Inter Process Communication Interrupt #8 */ 406 def_irq_handler cpuss_interrupts_ipc_9_IRQHandler /* CPUSS Inter Process Communication Interrupt #9 */ 407 def_irq_handler cpuss_interrupts_ipc_10_IRQHandler /* CPUSS Inter Process Communication Interrupt #10 */ 408 def_irq_handler cpuss_interrupts_ipc_11_IRQHandler /* CPUSS Inter Process Communication Interrupt #11 */ 409 def_irq_handler cpuss_interrupts_ipc_12_IRQHandler /* CPUSS Inter Process Communication Interrupt #12 */ 410 def_irq_handler cpuss_interrupts_ipc_13_IRQHandler /* CPUSS Inter Process Communication Interrupt #13 */ 411 def_irq_handler cpuss_interrupts_ipc_14_IRQHandler /* CPUSS Inter Process Communication Interrupt #14 */ 412 def_irq_handler cpuss_interrupts_ipc_15_IRQHandler /* CPUSS Inter Process Communication Interrupt #15 */ 413 def_irq_handler scb_0_interrupt_IRQHandler /* Serial Communication Block #0 */ 414 def_irq_handler scb_1_interrupt_IRQHandler /* Serial Communication Block #1 */ 415 def_irq_handler scb_2_interrupt_IRQHandler /* Serial Communication Block #2 */ 416 def_irq_handler scb_3_interrupt_IRQHandler /* Serial Communication Block #3 */ 417 def_irq_handler scb_4_interrupt_IRQHandler /* Serial Communication Block #4 */ 418 def_irq_handler scb_5_interrupt_IRQHandler /* Serial Communication Block #5 */ 419 def_irq_handler scb_6_interrupt_IRQHandler /* Serial Communication Block #6 */ 420 def_irq_handler scb_7_interrupt_IRQHandler /* Serial Communication Block #7 */ 421 def_irq_handler csd_interrupt_IRQHandler /* CSD (Capsense) interrupt */ 422 def_irq_handler cpuss_interrupts_dw0_0_IRQHandler /* CPUSS DataWire #0, Channel #0 */ 423 def_irq_handler cpuss_interrupts_dw0_1_IRQHandler /* CPUSS DataWire #0, Channel #1 */ 424 def_irq_handler cpuss_interrupts_dw0_2_IRQHandler /* CPUSS DataWire #0, Channel #2 */ 425 def_irq_handler cpuss_interrupts_dw0_3_IRQHandler /* CPUSS DataWire #0, Channel #3 */ 426 def_irq_handler cpuss_interrupts_dw0_4_IRQHandler /* CPUSS DataWire #0, Channel #4 */ 427 def_irq_handler cpuss_interrupts_dw0_5_IRQHandler /* CPUSS DataWire #0, Channel #5 */ 428 def_irq_handler cpuss_interrupts_dw0_6_IRQHandler /* CPUSS DataWire #0, Channel #6 */ 429 def_irq_handler cpuss_interrupts_dw0_7_IRQHandler /* CPUSS DataWire #0, Channel #7 */ 430 def_irq_handler cpuss_interrupts_dw0_8_IRQHandler /* CPUSS DataWire #0, Channel #8 */ 431 def_irq_handler cpuss_interrupts_dw0_9_IRQHandler /* CPUSS DataWire #0, Channel #9 */ 432 def_irq_handler cpuss_interrupts_dw0_10_IRQHandler /* CPUSS DataWire #0, Channel #10 */ 433 def_irq_handler cpuss_interrupts_dw0_11_IRQHandler /* CPUSS DataWire #0, Channel #11 */ 434 def_irq_handler cpuss_interrupts_dw0_12_IRQHandler /* CPUSS DataWire #0, Channel #12 */ 435 def_irq_handler cpuss_interrupts_dw0_13_IRQHandler /* CPUSS DataWire #0, Channel #13 */ 436 def_irq_handler cpuss_interrupts_dw0_14_IRQHandler /* CPUSS DataWire #0, Channel #14 */ 437 def_irq_handler cpuss_interrupts_dw0_15_IRQHandler /* CPUSS DataWire #0, Channel #15 */ 438 def_irq_handler cpuss_interrupts_dw1_0_IRQHandler /* CPUSS DataWire #1, Channel #0 */ 439 def_irq_handler cpuss_interrupts_dw1_1_IRQHandler /* CPUSS DataWire #1, Channel #1 */ 440 def_irq_handler cpuss_interrupts_dw1_2_IRQHandler /* CPUSS DataWire #1, Channel #2 */ 441 def_irq_handler cpuss_interrupts_dw1_3_IRQHandler /* CPUSS DataWire #1, Channel #3 */ 442 def_irq_handler cpuss_interrupts_dw1_4_IRQHandler /* CPUSS DataWire #1, Channel #4 */ 443 def_irq_handler cpuss_interrupts_dw1_5_IRQHandler /* CPUSS DataWire #1, Channel #5 */ 444 def_irq_handler cpuss_interrupts_dw1_6_IRQHandler /* CPUSS DataWire #1, Channel #6 */ 445 def_irq_handler cpuss_interrupts_dw1_7_IRQHandler /* CPUSS DataWire #1, Channel #7 */ 446 def_irq_handler cpuss_interrupts_dw1_8_IRQHandler /* CPUSS DataWire #1, Channel #8 */ 447 def_irq_handler cpuss_interrupts_dw1_9_IRQHandler /* CPUSS DataWire #1, Channel #9 */ 448 def_irq_handler cpuss_interrupts_dw1_10_IRQHandler /* CPUSS DataWire #1, Channel #10 */ 449 def_irq_handler cpuss_interrupts_dw1_11_IRQHandler /* CPUSS DataWire #1, Channel #11 */ 450 def_irq_handler cpuss_interrupts_dw1_12_IRQHandler /* CPUSS DataWire #1, Channel #12 */ 451 def_irq_handler cpuss_interrupts_dw1_13_IRQHandler /* CPUSS DataWire #1, Channel #13 */ 452 def_irq_handler cpuss_interrupts_dw1_14_IRQHandler /* CPUSS DataWire #1, Channel #14 */ 453 def_irq_handler cpuss_interrupts_dw1_15_IRQHandler /* CPUSS DataWire #1, Channel #15 */ 454 def_irq_handler cpuss_interrupts_fault_0_IRQHandler /* CPUSS Fault Structure Interrupt #0 */ 455 def_irq_handler cpuss_interrupts_fault_1_IRQHandler /* CPUSS Fault Structure Interrupt #1 */ 456 def_irq_handler cpuss_interrupt_crypto_IRQHandler /* CRYPTO Accelerator Interrupt */ 457 def_irq_handler cpuss_interrupt_fm_IRQHandler /* FLASH Macro Interrupt */ 458 def_irq_handler cpuss_interrupts_cm0_cti_0_IRQHandler /* CM0+ CTI #0 */ 459 def_irq_handler cpuss_interrupts_cm0_cti_1_IRQHandler /* CM0+ CTI #1 */ 460 def_irq_handler cpuss_interrupts_cm4_cti_0_IRQHandler /* CM4 CTI #0 */ 461 def_irq_handler cpuss_interrupts_cm4_cti_1_IRQHandler /* CM4 CTI #1 */ 462 def_irq_handler tcpwm_0_interrupts_0_IRQHandler /* TCPWM #0, Counter #0 */ 463 def_irq_handler tcpwm_0_interrupts_1_IRQHandler /* TCPWM #0, Counter #1 */ 464 def_irq_handler tcpwm_0_interrupts_2_IRQHandler /* TCPWM #0, Counter #2 */ 465 def_irq_handler tcpwm_0_interrupts_3_IRQHandler /* TCPWM #0, Counter #3 */ 466 def_irq_handler tcpwm_0_interrupts_4_IRQHandler /* TCPWM #0, Counter #4 */ 467 def_irq_handler tcpwm_0_interrupts_5_IRQHandler /* TCPWM #0, Counter #5 */ 468 def_irq_handler tcpwm_0_interrupts_6_IRQHandler /* TCPWM #0, Counter #6 */ 469 def_irq_handler tcpwm_0_interrupts_7_IRQHandler /* TCPWM #0, Counter #7 */ 470 def_irq_handler tcpwm_1_interrupts_0_IRQHandler /* TCPWM #1, Counter #0 */ 471 def_irq_handler tcpwm_1_interrupts_1_IRQHandler /* TCPWM #1, Counter #1 */ 472 def_irq_handler tcpwm_1_interrupts_2_IRQHandler /* TCPWM #1, Counter #2 */ 473 def_irq_handler tcpwm_1_interrupts_3_IRQHandler /* TCPWM #1, Counter #3 */ 474 def_irq_handler tcpwm_1_interrupts_4_IRQHandler /* TCPWM #1, Counter #4 */ 475 def_irq_handler tcpwm_1_interrupts_5_IRQHandler /* TCPWM #1, Counter #5 */ 476 def_irq_handler tcpwm_1_interrupts_6_IRQHandler /* TCPWM #1, Counter #6 */ 477 def_irq_handler tcpwm_1_interrupts_7_IRQHandler /* TCPWM #1, Counter #7 */ 478 def_irq_handler tcpwm_1_interrupts_8_IRQHandler /* TCPWM #1, Counter #8 */ 479 def_irq_handler tcpwm_1_interrupts_9_IRQHandler /* TCPWM #1, Counter #9 */ 480 def_irq_handler tcpwm_1_interrupts_10_IRQHandler /* TCPWM #1, Counter #10 */ 481 def_irq_handler tcpwm_1_interrupts_11_IRQHandler /* TCPWM #1, Counter #11 */ 482 def_irq_handler tcpwm_1_interrupts_12_IRQHandler /* TCPWM #1, Counter #12 */ 483 def_irq_handler tcpwm_1_interrupts_13_IRQHandler /* TCPWM #1, Counter #13 */ 484 def_irq_handler tcpwm_1_interrupts_14_IRQHandler /* TCPWM #1, Counter #14 */ 485 def_irq_handler tcpwm_1_interrupts_15_IRQHandler /* TCPWM #1, Counter #15 */ 486 def_irq_handler tcpwm_1_interrupts_16_IRQHandler /* TCPWM #1, Counter #16 */ 487 def_irq_handler tcpwm_1_interrupts_17_IRQHandler /* TCPWM #1, Counter #17 */ 488 def_irq_handler tcpwm_1_interrupts_18_IRQHandler /* TCPWM #1, Counter #18 */ 489 def_irq_handler tcpwm_1_interrupts_19_IRQHandler /* TCPWM #1, Counter #19 */ 490 def_irq_handler tcpwm_1_interrupts_20_IRQHandler /* TCPWM #1, Counter #20 */ 491 def_irq_handler tcpwm_1_interrupts_21_IRQHandler /* TCPWM #1, Counter #21 */ 492 def_irq_handler tcpwm_1_interrupts_22_IRQHandler /* TCPWM #1, Counter #22 */ 493 def_irq_handler tcpwm_1_interrupts_23_IRQHandler /* TCPWM #1, Counter #23 */ 494 def_irq_handler udb_interrupts_0_IRQHandler /* UDB Interrupt #0 */ 495 def_irq_handler udb_interrupts_1_IRQHandler /* UDB Interrupt #1 */ 496 def_irq_handler udb_interrupts_2_IRQHandler /* UDB Interrupt #2 */ 497 def_irq_handler udb_interrupts_3_IRQHandler /* UDB Interrupt #3 */ 498 def_irq_handler udb_interrupts_4_IRQHandler /* UDB Interrupt #4 */ 499 def_irq_handler udb_interrupts_5_IRQHandler /* UDB Interrupt #5 */ 500 def_irq_handler udb_interrupts_6_IRQHandler /* UDB Interrupt #6 */ 501 def_irq_handler udb_interrupts_7_IRQHandler /* UDB Interrupt #7 */ 502 def_irq_handler udb_interrupts_8_IRQHandler /* UDB Interrupt #8 */ 503 def_irq_handler udb_interrupts_9_IRQHandler /* UDB Interrupt #9 */ 504 def_irq_handler udb_interrupts_10_IRQHandler /* UDB Interrupt #10 */ 505 def_irq_handler udb_interrupts_11_IRQHandler /* UDB Interrupt #11 */ 506 def_irq_handler udb_interrupts_12_IRQHandler /* UDB Interrupt #12 */ 507 def_irq_handler udb_interrupts_13_IRQHandler /* UDB Interrupt #13 */ 508 def_irq_handler udb_interrupts_14_IRQHandler /* UDB Interrupt #14 */ 509 def_irq_handler udb_interrupts_15_IRQHandler /* UDB Interrupt #15 */ 510 def_irq_handler pass_interrupt_sar_IRQHandler /* SAR ADC interrupt */ 511 def_irq_handler audioss_interrupt_i2s_IRQHandler /* I2S Audio interrupt */ 512 def_irq_handler audioss_interrupt_pdm_IRQHandler /* PDM/PCM Audio interrupt */ 513 def_irq_handler profile_interrupt_IRQHandler /* Energy Profiler interrupt */ 514 def_irq_handler smif_interrupt_IRQHandler /* Serial Memory Interface interrupt */ 515 def_irq_handler usb_interrupt_hi_IRQHandler /* USB Interrupt */ 516 def_irq_handler usb_interrupt_med_IRQHandler /* USB Interrupt */ 517 def_irq_handler usb_interrupt_lo_IRQHandler /* USB Interrupt */ 518 def_irq_handler pass_interrupt_dacs_IRQHandler /* Consolidated interrrupt for all DACs */ 519 520 .end 521 522 523/* [] END OF FILE */ 524
