1 /*
2  * Copyright 2018-2022 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include "evkbmimxrt1170_flexspi_nor_config.h"
9 
10 /* Component ID definition, used by tools. */
11 #ifndef FSL_COMPONENT_ID
12 #define FSL_COMPONENT_ID "platform.drivers.xip_board"
13 #endif
14 
15 /*******************************************************************************
16  * Code
17  ******************************************************************************/
18 #if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
19 #if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
20 __attribute__((section(".boot_hdr.conf"), used))
21 #elif defined(__ICCARM__)
22 #pragma location = ".boot_hdr.conf"
23 #endif
24 
25 #define FLASH_DUMMY_CYCLES 0x08
26 #define FLASH_DUMMY_VALUE  0x03
27 
28 const flexspi_nor_config_t qspiflash_config = {
29     .memConfig =
30         {
31             .tag              = FLEXSPI_CFG_BLK_TAG,
32             .version          = FLEXSPI_CFG_BLK_VERSION,
33             .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
34             .csHoldTime       = 3u,
35             .csSetupTime      = 3u,
36             // Enable DDR mode, Wordaddassable, Safe configuration, Differential clock
37             .controllerMiscOption = 0x10,
38             .deviceType           = kFlexSpiDeviceType_SerialNOR,
39             .sflashPadType        = kSerialFlash_4Pads,
40             .serialClkFreq        = kFlexSpiSerialClk_133MHz,
41             .sflashA1Size         = 64u * 1024u * 1024u,
42             /* Enable flash configuration feature */
43             .configCmdEnable   = 1u,
44             .configModeType[0] = kDeviceConfigCmdType_Generic,
45             /* Set configuration command sequences */
46             .configCmdSeqs[0] =
47                 {
48                     .seqNum   = 1,
49                     .seqId    = 12,
50                     .reserved = 0,
51                 },
52             /* Prepare setting value for Read Register in flash */
53             .configCmdArgs[0] = (FLASH_DUMMY_VALUE << 4),
54             .lookupTable =
55                 {
56                     // Read LUTs
57                     [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEC, RADDR_SDR, FLEXSPI_4PAD, 0x20),
58                     [1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, FLASH_DUMMY_CYCLES, READ_SDR, FLEXSPI_4PAD, 0x04),
59 
60                     // Read Status LUTs
61                     [4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),
62 
63                     // Write Enable LUTs
64                     [4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x0),
65 
66                     // Erase Sector LUTs
67                     [4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x21, RADDR_SDR, FLEXSPI_1PAD, 0x20),
68 
69                     // Erase Block LUTs
70                     [4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8, RADDR_SDR, FLEXSPI_1PAD, 0x18),
71 
72                     // Pape Program LUTs
73                     [4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x12, RADDR_SDR, FLEXSPI_1PAD, 0x20),
74                     [4 * 9 + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),
75 
76                     // Erase Chip LUTs
77                     [4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60, STOP, FLEXSPI_1PAD, 0x0),
78 
79                     // Set Read Register LUTs
80                     [4 * 12 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xC0, WRITE_SDR, FLEXSPI_1PAD, 0x01),
81                     [4 * 12 + 1] = FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x00, 0, 0, 0),
82                 },
83         },
84     .pageSize           = 256u,
85     .sectorSize         = 4u * 1024u,
86     .ipcmdSerialClkFreq = 0x1,
87     .blockSize          = 64u * 1024u,
88     .isUniformBlockSize = false,
89 };
90 #endif /* XIP_BOOT_HEADER_ENABLE */
91