1 /*
2  * Copyright (c) 2009-2024, Arm Limited. All rights reserved.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Licensed under the Apache License, Version 2.0 (the License); you may
7  * not use this file except in compliance with the License.
8  * You may obtain a copy of the License at
9  *
10  * www.apache.org/licenses/LICENSE-2.0
11  *
12  * Unless required by applicable law or agreed to in writing, software
13  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15  * See the License for the specific language governing permissions and
16  * limitations under the License.
17  */
18 
19 /*
20  * This file is derivative of CMSIS V5.6.0 startup_ARMv81MML.c
21  * Git SHA: b5f0603d6a584d1724d952fd8b0737458b90d62b
22  */
23 
24 #include "tfm_hal_device_header.h"
25 
26 /*----------------------------------------------------------------------------
27   External References
28  *----------------------------------------------------------------------------*/
29 extern uint32_t __INITIAL_SP;
30 extern uint32_t __STACK_LIMIT;
31 
32 extern __NO_RETURN void __PROGRAM_START(void);
33 
34 /*----------------------------------------------------------------------------
35   Internal References
36  *----------------------------------------------------------------------------*/
37 __NO_RETURN void Reset_Handler (void);
38 
39 /*----------------------------------------------------------------------------
40   Exception / Interrupt Handler
41  *----------------------------------------------------------------------------*/
42 #define DEFAULT_IRQ_HANDLER(handler_name)  \
43 __NO_RETURN void __WEAK handler_name(void); \
44 void handler_name(void) { \
45     while(1); \
46 }
47 
48 /* Exceptions */
49 DEFAULT_IRQ_HANDLER(NMI_Handler)
50 DEFAULT_IRQ_HANDLER(HardFault_Handler)
51 DEFAULT_IRQ_HANDLER(MemManage_Handler)
52 DEFAULT_IRQ_HANDLER(BusFault_Handler)
53 DEFAULT_IRQ_HANDLER(UsageFault_Handler)
54 DEFAULT_IRQ_HANDLER(SecureFault_Handler)
55 DEFAULT_IRQ_HANDLER(SVC_Handler)
56 DEFAULT_IRQ_HANDLER(DebugMon_Handler)
57 DEFAULT_IRQ_HANDLER(PendSV_Handler)
58 DEFAULT_IRQ_HANDLER(SysTick_Handler)
59 
60 DEFAULT_IRQ_HANDLER(WWDG_IRQHandler)
61 DEFAULT_IRQ_HANDLER(PVD_PVM_IRQHandler)
62 DEFAULT_IRQ_HANDLER(RTC_IRQHandler)
63 DEFAULT_IRQ_HANDLER(RTC_IRQHandler_S)
64 DEFAULT_IRQ_HANDLER(TAMP_IRQHandler)
65 DEFAULT_IRQ_HANDLER(TAMP_IRQHandler_S)
66 DEFAULT_IRQ_HANDLER(FLASH_IRQHandler)
67 DEFAULT_IRQ_HANDLER(FLASH_IRQHandler_S)
68 DEFAULT_IRQ_HANDLER(SERR_IRQHandler)
69 DEFAULT_IRQ_HANDLER(RCC_IRQHandler)
70 DEFAULT_IRQ_HANDLER(RCC_IRQHandler_S)
71 DEFAULT_IRQ_HANDLER(EXTI0_IRQHandler)
72 DEFAULT_IRQ_HANDLER(EXTI1_IRQHandler)
73 DEFAULT_IRQ_HANDLER(EXTI2_IRQHandler)
74 DEFAULT_IRQ_HANDLER(EXTI3_IRQHandler)
75 DEFAULT_IRQ_HANDLER(EXTI4_IRQHandler)
76 DEFAULT_IRQ_HANDLER(EXTI5_IRQHandler)
77 DEFAULT_IRQ_HANDLER(EXTI6_IRQHandler)
78 DEFAULT_IRQ_HANDLER(EXTI7_IRQHandler)
79 DEFAULT_IRQ_HANDLER(EXTI8_IRQHandler)
80 DEFAULT_IRQ_HANDLER(EXTI9_IRQHandler)
81 DEFAULT_IRQ_HANDLER(EXTI10_IRQHandler)
82 DEFAULT_IRQ_HANDLER(EXTI11_IRQHandler)
83 DEFAULT_IRQ_HANDLER(EXTI12_IRQHandler)
84 DEFAULT_IRQ_HANDLER(EXTI13_IRQHandler)
85 DEFAULT_IRQ_HANDLER(EXTI14_IRQHandler)
86 DEFAULT_IRQ_HANDLER(EXTI15_IRQHandler)
87 DEFAULT_IRQ_HANDLER(DMAMUX1_IRQHandler)
88 DEFAULT_IRQ_HANDLER(DMAMUX1_IRQHandler_S)
89 DEFAULT_IRQ_HANDLER(DMA1_Channel1_IRQHandler)
90 DEFAULT_IRQ_HANDLER(DMA1_Channel2_IRQHandler)
91 DEFAULT_IRQ_HANDLER(DMA1_Channel3_IRQHandler)
92 DEFAULT_IRQ_HANDLER(DMA1_Channel4_IRQHandler)
93 DEFAULT_IRQ_HANDLER(DMA1_Channel5_IRQHandler)
94 DEFAULT_IRQ_HANDLER(DMA1_Channel6_IRQHandler)
95 DEFAULT_IRQ_HANDLER(DMA1_Channel7_IRQHandler)
96 DEFAULT_IRQ_HANDLER(DMA1_Channel8_IRQHandler)
97 DEFAULT_IRQ_HANDLER(ADC1_2_IRQHandler)
98 DEFAULT_IRQ_HANDLER(DAC_IRQHandler)
99 DEFAULT_IRQ_HANDLER(FDCAN1_IT0_IRQHandler)
100 DEFAULT_IRQ_HANDLER(FDCAN1_IT1_IRQHandler)
101 DEFAULT_IRQ_HANDLER(TIM1_BRK_IRQHandler)
102 DEFAULT_IRQ_HANDLER(TIM1_UP_IRQHandler)
103 DEFAULT_IRQ_HANDLER(TIM1_TRG_COM_IRQHandler)
104 DEFAULT_IRQ_HANDLER(TIM1_CC_IRQHandler)
105 DEFAULT_IRQ_HANDLER(TIM2_IRQHandler)
106 DEFAULT_IRQ_HANDLER(TIM3_IRQHandler)
107 DEFAULT_IRQ_HANDLER(TIM4_IRQHandler)
108 DEFAULT_IRQ_HANDLER(TIM5_IRQHandler)
109 DEFAULT_IRQ_HANDLER(TIM6_IRQHandler)
110 DEFAULT_IRQ_HANDLER(TIM7_IRQHandler)
111 DEFAULT_IRQ_HANDLER(TIM8_BRK_IRQHandler)
112 DEFAULT_IRQ_HANDLER(TIM8_UP_IRQHandler)
113 DEFAULT_IRQ_HANDLER(TIM8_TRG_COM_IRQHandler)
114 DEFAULT_IRQ_HANDLER(TIM8_CC_IRQHandler)
115 DEFAULT_IRQ_HANDLER(I2C1_EV_IRQHandler)
116 DEFAULT_IRQ_HANDLER(I2C1_ER_IRQHandler)
117 DEFAULT_IRQ_HANDLER(I2C2_EV_IRQHandler)
118 DEFAULT_IRQ_HANDLER(I2C2_ER_IRQHandler)
119 DEFAULT_IRQ_HANDLER(SPI1_IRQHandler)
120 DEFAULT_IRQ_HANDLER(SPI2_IRQHandler)
121 DEFAULT_IRQ_HANDLER(USART1_IRQHandler)
122 DEFAULT_IRQ_HANDLER(USART2_IRQHandler)
123 DEFAULT_IRQ_HANDLER(USART3_IRQHandler)
124 DEFAULT_IRQ_HANDLER(UART4_IRQHandler)
125 DEFAULT_IRQ_HANDLER(UART5_IRQHandler)
126 DEFAULT_IRQ_HANDLER(LPUART1_IRQHandler)
127 DEFAULT_IRQ_HANDLER(LPTIM1_IRQHandler)
128 DEFAULT_IRQ_HANDLER(LPTIM2_IRQHandler)
129 DEFAULT_IRQ_HANDLER(TIM15_IRQHandler)
130 DEFAULT_IRQ_HANDLER(TIM16_IRQHandler)
131 DEFAULT_IRQ_HANDLER(TIM17_IRQHandler)
132 DEFAULT_IRQ_HANDLER(COMP_IRQHandler)
133 DEFAULT_IRQ_HANDLER(USB_FS_IRQHandler)
134 DEFAULT_IRQ_HANDLER(CRS_IRQHandler)
135 DEFAULT_IRQ_HANDLER(FMC_IRQHandler)
136 DEFAULT_IRQ_HANDLER(OCTOSPI1_IRQHandler)
137 DEFAULT_IRQ_HANDLER(SDMMC1_IRQHandler)
138 DEFAULT_IRQ_HANDLER(DMA2_Channel1_IRQHandler)
139 DEFAULT_IRQ_HANDLER(DMA2_Channel2_IRQHandler)
140 DEFAULT_IRQ_HANDLER(DMA2_Channel3_IRQHandler)
141 DEFAULT_IRQ_HANDLER(DMA2_Channel4_IRQHandler)
142 DEFAULT_IRQ_HANDLER(DMA2_Channel5_IRQHandler)
143 DEFAULT_IRQ_HANDLER(DMA2_Channel6_IRQHandler)
144 DEFAULT_IRQ_HANDLER(DMA2_Channel7_IRQHandler)
145 DEFAULT_IRQ_HANDLER(DMA2_Channel8_IRQHandler)
146 DEFAULT_IRQ_HANDLER(I2C3_EV_IRQHandler)
147 DEFAULT_IRQ_HANDLER(I2C3_ER_IRQHandler)
148 DEFAULT_IRQ_HANDLER(SAI1_IRQHandler)
149 DEFAULT_IRQ_HANDLER(SAI2_IRQHandler)
150 DEFAULT_IRQ_HANDLER(TSC_IRQHandler)
151 #ifdef STM32L562xx
152 DEFAULT_IRQ_HANDLER(AES_IRQHandler)
153 #endif
154 DEFAULT_IRQ_HANDLER(RNG_IRQHandler)
155 DEFAULT_IRQ_HANDLER(FPU_IRQHandler)
156 DEFAULT_IRQ_HANDLER(HASH_IRQHandler)
157 #ifdef STM32L562xx
158 DEFAULT_IRQ_HANDLER(PKA_IRQHandler)
159 #endif
160 DEFAULT_IRQ_HANDLER(LPTIM3_IRQHandler)
161 DEFAULT_IRQ_HANDLER(SPI3_IRQHandler)
162 DEFAULT_IRQ_HANDLER(I2C4_ER_IRQHandler)
163 DEFAULT_IRQ_HANDLER(I2C4_EV_IRQHandler)
164 DEFAULT_IRQ_HANDLER(DFSDM1_FLT0_IRQHandler)
165 DEFAULT_IRQ_HANDLER(DFSDM1_FLT1_IRQHandler)
166 DEFAULT_IRQ_HANDLER(DFSDM1_FLT2_IRQHandler)
167 DEFAULT_IRQ_HANDLER(DFSDM1_FLT3_IRQHandler)
168 DEFAULT_IRQ_HANDLER(UCPD1_IRQHandler)
169 DEFAULT_IRQ_HANDLER(ICACHE_IRQHandler)
170 DEFAULT_IRQ_HANDLER(OTFDEC1_IRQHandler)
171 
172 /*----------------------------------------------------------------------------
173   Exception / Interrupt Vector table
174  *----------------------------------------------------------------------------*/
175 
176 #if defined ( __GNUC__ )
177 #pragma GCC diagnostic push
178 #pragma GCC diagnostic ignored "-Wpedantic"
179 #endif
180 
181 extern const VECTOR_TABLE_Type __VECTOR_TABLE[];
182        const VECTOR_TABLE_Type __VECTOR_TABLE[] __VECTOR_TABLE_ATTRIBUTE = {
183   (VECTOR_TABLE_Type)(&__INITIAL_SP),/*      Initial Stack Pointer */
184   Reset_Handler,                    /*      Reset Handler */
185   NMI_Handler,                      /* -14: NMI Handler */
186   HardFault_Handler,                /* -13: Hard Fault Handler */
187   MemManage_Handler,                /* -12: MPU Fault Handler */
188   BusFault_Handler,                 /* -11: Bus Fault Handler */
189   UsageFault_Handler,               /* -10: Usage Fault Handler */
190   SecureFault_Handler,              /*  -9: Secure Fault Handler */
191   0,                                /*      Reserved */
192   0,                                /*      Reserved */
193   0,                                /*      Reserved */
194   SVC_Handler,                      /*  -5: SVCall Handler */
195   DebugMon_Handler,                 /*  -4: Debug Monitor Handler */
196   0,                                /*      Reserved */
197   PendSV_Handler,                   /*  -2: PendSV Handler */
198   SysTick_Handler,                  /*  -1: SysTick Handler */
199   WWDG_IRQHandler,                  /*   0: Window WatchDog */
200   PVD_PVM_IRQHandler,               /*   1: PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection */
201   RTC_IRQHandler,                   /*   2: RTC non-secure interrupts through the EXTI line */
202   RTC_IRQHandler_S,                 /*   3: RRTC secure interrupts through the EXTI line */
203   TAMP_IRQHandler,                  /*   4: RTamper non-secure interrupts through the EXTI line */
204   TAMP_IRQHandler_S,                /*   5: RTamper secure interrupts through the EXTI line */
205   FLASH_IRQHandler,                 /*   6: RFLASH non-secure interrupts */
206   FLASH_IRQHandler_S,               /*   7: RFLASH secure global interrupts */
207   SERR_IRQHandler,                  /*   8: RSecure Error interrupts */
208   RCC_IRQHandler,                   /*   9: RRCC non-secure global interrupts */
209   RCC_IRQHandler_S,                 /*  10: RRCC secure global interrupts */
210   EXTI0_IRQHandler,                 /*  11: REXTI Line0 */
211   EXTI1_IRQHandler,                 /*  12: REXTI Line1 */
212   EXTI2_IRQHandler,                 /*  13: REXTI Line2 */
213   EXTI3_IRQHandler,                 /*  14: REXTI Line3 */
214   EXTI4_IRQHandler,                 /*  15: REXTI Line4 */
215   EXTI5_IRQHandler,                 /*  16: REXTI Line5 */
216   EXTI6_IRQHandler,                 /*  17: REXTI Line6 */
217   EXTI7_IRQHandler,                 /*  18: REXTI Line7 */
218   EXTI8_IRQHandler,                 /*  19: REXTI Line8 */
219   EXTI9_IRQHandler,                 /*  20: REXTI Line9 */
220   EXTI10_IRQHandler,                /*  21: EXTI Line10 */
221   EXTI11_IRQHandler,                /*  22: EXTI Line11 */
222   EXTI12_IRQHandler,                /*  23: EXTI Line12 */
223   EXTI13_IRQHandler,                /*  24: EXTI Line13 */
224   EXTI14_IRQHandler,                /*  25: EXTI Line14 */
225   EXTI15_IRQHandler,                /*  26: EXTI Line15 */
226   DMAMUX1_IRQHandler,               /*  27: DMAMUX1 non-secure */
227   DMAMUX1_IRQHandler_S,             /*  28: DMAMUX1 secure */
228   DMA1_Channel1_IRQHandler,         /*  29: DMA1 Channel 1 */
229   DMA1_Channel2_IRQHandler,         /*  30: DMA1 Channel 2 */
230   DMA1_Channel3_IRQHandler,         /*  31: DMA1 Channel 3 */
231   DMA1_Channel4_IRQHandler,         /*  32: DMA1 Channel 4 */
232   DMA1_Channel5_IRQHandler,         /*  33: DMA1 Channel 5 */
233   DMA1_Channel6_IRQHandler,         /*  34: DMA1 Channel 6 */
234   DMA1_Channel7_IRQHandler,         /*  35: DMA1 Channel 7 */
235   DMA1_Channel8_IRQHandler,         /*  36: DMA1 Channel 8 */
236   ADC1_2_IRQHandler,                /*  37: ADC1 & ADC2 */
237   DAC_IRQHandler,                   /*  38: DAC1&2 underrun errors */
238   FDCAN1_IT0_IRQHandler,            /*  39: FDCAN1 Interrupt 0 */
239   FDCAN1_IT1_IRQHandler,            /*  40: FDCAN1 Interrupt 1 */
240   TIM1_BRK_IRQHandler,              /*  41: TIM1 Break */
241   TIM1_UP_IRQHandler,               /*  42: TIM1 Update */
242   TIM1_TRG_COM_IRQHandler,          /*  43: TIM1 Trigger and Commutation */
243   TIM1_CC_IRQHandler,               /*  44: TIM1 Capture Compare */
244   TIM2_IRQHandler,                  /*  45: TIM2 */
245   TIM3_IRQHandler,                  /*  46: TIM3 */
246   TIM4_IRQHandler,                  /*  47: TIM4 */
247   TIM5_IRQHandler,                  /*  48: TIM5 */
248   TIM6_IRQHandler,                  /*  49: TIM6 */
249   TIM7_IRQHandler,                  /*  50: TIM7 */
250   TIM8_BRK_IRQHandler,              /*  51: TIM8 Break */
251   TIM8_UP_IRQHandler,               /*  52: TIM8 Update */
252   TIM8_TRG_COM_IRQHandler,          /*  53: TIM8 Trigger and Commutation */
253   TIM8_CC_IRQHandler,               /*  54: TIM8 Capture Compare */
254   I2C1_EV_IRQHandler,               /*  55: I2C1 Event */
255   I2C1_ER_IRQHandler,               /*  56: I2C1 Error */
256   I2C2_EV_IRQHandler,               /*  57: I2C2 Event */
257   I2C2_ER_IRQHandler,               /*  58: I2C2 Error */
258   SPI1_IRQHandler,                  /*  59: SPI1 */
259   SPI2_IRQHandler,                  /*  60: SPI2 */
260   USART1_IRQHandler,                /*  61: USART1 */
261   USART2_IRQHandler,                /*  62: USART2 */
262   USART3_IRQHandler,                /*  63: USART3 */
263   UART4_IRQHandler,                 /*  64: UART4 */
264   UART5_IRQHandler,                 /*  65: UART5 */
265   LPUART1_IRQHandler,               /*  66: LP UART1 */
266   LPTIM1_IRQHandler,                /*  67: LP TIM1 */
267   LPTIM2_IRQHandler,                /*  68: LP TIM2 */
268   TIM15_IRQHandler,                 /*  69: TIM15 */
269   TIM16_IRQHandler,                 /*  70: TIM16 */
270   TIM17_IRQHandler,                 /*  71: TIM17 */
271   COMP_IRQHandler,                  /*  72: COMP1&2 */
272   USB_FS_IRQHandler,                /*  73: USB FS */
273   CRS_IRQHandler,                   /*  74: CRS */
274   FMC_IRQHandler,                   /*  75: FMC */
275   OCTOSPI1_IRQHandler,              /*  76: OctoSPI1 global interrupt */
276   0,                                /*  77: Reserved */
277   SDMMC1_IRQHandler,                /*  78: SDMMC1 */
278   0,                                /*  79: Reserved */
279   DMA2_Channel1_IRQHandler,         /*  80: DMA2 Channel 1 */
280   DMA2_Channel2_IRQHandler,         /*  81: DMA2 Channel 2 */
281   DMA2_Channel3_IRQHandler,         /*  82: DMA2 Channel 3 */
282   DMA2_Channel4_IRQHandler,         /*  83: DMA2 Channel 4 */
283   DMA2_Channel5_IRQHandler,         /*  84: DMA2 Channel 5 */
284   DMA2_Channel6_IRQHandler,         /*  85: DMA2 Channel 6 */
285   DMA2_Channel7_IRQHandler,         /*  86: DMA2 Channel 7 */
286   DMA2_Channel8_IRQHandler,         /*  87: DMA2 Channel 8 */
287   I2C3_EV_IRQHandler,               /*  88: I2C3 event */
288   I2C3_ER_IRQHandler,               /*  89: I2C3 error */
289   SAI1_IRQHandler,                  /*  90: Serial Audio Interface 1 global interrupt */
290   SAI2_IRQHandler,                  /*  91: Serial Audio Interface 2 global interrupt */
291   TSC_IRQHandler,                   /*  92: Touch Sense Controller global interrupt */
292 #ifdef STM32L562xx
293   AES_IRQHandler,                   /*  93: AES global interrupt */
294 #else
295   0,                                /*  93: Reserved */
296 #endif
297   RNG_IRQHandler,                   /*  94: RNG global interrupt */
298   FPU_IRQHandler,                   /*  95: FPU */
299   HASH_IRQHandler,                  /*  96: HASH global interrupt */
300 #ifdef STM32L562xx
301   PKA_IRQHandler,                   /*  97: PKA global interrupt */
302 #else
303   0,                                /*  97: Reserved */
304 #endif
305   LPTIM3_IRQHandler,                /*  98: LP TIM3 */
306   SPI3_IRQHandler,                  /*  99: SPI3 */
307   I2C4_ER_IRQHandler,               /* 100: I2C4 error */
308   I2C4_EV_IRQHandler,               /* 101: I2C4 event */
309   DFSDM1_FLT0_IRQHandler,           /* 102: DFSDM1 Filter 0 global Interrupt */
310   DFSDM1_FLT1_IRQHandler,           /* 103: DFSDM1 Filter 1 global Interrupt */
311   DFSDM1_FLT2_IRQHandler,           /* 104: DFSDM1 Filter 2 global Interrupt */
312   DFSDM1_FLT3_IRQHandler,           /* 105: DFSDM1 Filter 3 global Interrupt */
313   UCPD1_IRQHandler,                 /* 106: UCPD1 */
314   ICACHE_IRQHandler,                /* 107: ICACHE */
315   OTFDEC1_IRQHandler                /* 108: OTFDEC1 */
316 };
317 
318 #if defined ( __GNUC__ )
319 #pragma GCC diagnostic pop
320 #endif
321 
322 /*----------------------------------------------------------------------------
323   Reset Handler called on controller reset
324  *----------------------------------------------------------------------------*/
Reset_Handler(void)325 void Reset_Handler(void)
326 {
327     __set_PSP((uint32_t)(&__INITIAL_SP));
328 
329     __set_MSPLIM((uint32_t)(&__STACK_LIMIT));
330     __set_PSPLIM((uint32_t)(&__STACK_LIMIT));
331 
332     SystemInit();                             /* CMSIS System Initialization */
333     __PROGRAM_START();                        /* Enter PreMain (C library entry point) */
334 }
335