1/**************************************************************************************************/
2/**
3\defgroup   version_control_gr    Version Control
4\brief      Version \#define symbols for CMSIS release specific C/C++ source code
5\details
6
7\ref cmsis_processor_files contain macros \ref __CORTEX_M , \ref __CORTEX_SC or \ref __STAR_MC that identify the processor core variant described in the file.
8
9Additionally each processor header file includes the <b>cmsis_version.h</b> file with \ref __CM_CMSIS_VERSION define that identifies the CMSIS version used.
10
11This allows application code and middleware components to verify the target processor and the CMSIS version that CMSIS-Core component implies.
12
13@{
14*/
15
16/**
17\brief Contains the CMSIS version
18\details The CMSIS version is a combination of the \ref __CM_CMSIS_VERSION_MAIN (bits 31..16) and \ref __CM_CMSIS_VERSION_SUB (bits 15..0).
19
20<b>Code Example:</b>
21\code
22#if defined(__CM_CMSIS_VERSION) && \
23    (__CM_CMSIS_VERSION >= 0x00060000)
24#error Yes, we have CMSIS 6.0 or later
25#else
26#error We need CMSIS 6.0 or later!
27#endif
28\endcode
29*/
30#define __CM_CMSIS_VERSION
31
32/**
33\brief Contains the CMSIS major version
34\details The CMSIS major version can be used to differentiate between CMSIS major releases.
35*/
36#define __CM_CMSIS_VERSION_MAIN
37
38/**
39\brief Contains the CMSIS minor version
40\details The CMSIS minor version can be used to query a CMSIS release update level.
41*/
42#define __CM_CMSIS_VERSION_SUB
43
44/**
45\brief Contains the core version for a Cortex-M class controller.
46\details This define can be used to differentiate between the various available Cortex-M controllers.
47Possible values are:
48 - 0 for a Cortex-M0 or Cortex-M0+
49 - 1 for a Cortex-M1
50 - 3 for a Cortex-M3
51 - 4 for a Cortex-M4
52 - 7 for a Cortex-M7
53\if ARMv8M
54 - 23 for a Cortex-M23
55 - 33 for a Cortex-M33
56 - 35 for a Cortex-M35P
57 - 55 for a Cortex-M55
58 - 85 for a Cortex-M85
59 - 2  for a Armv8-M Base Line device
60 - 80 for a Armv8-M Main Line device
61 - 81 for a Armv8.1-M Main Line device
62\endif
63
64This define is only available for Cortex-M class controllers.
65<b>Code Example:</b>
66\code
67#if defined(__CORTEX_M) && (__CORTEX_M == 4)
68#error Yes, we have an Cortex-M4 controller.
69#else
70#error We need a Cortex-M4 controller!
71#endif
72\endcode
73*/
74#define __CORTEX_M
75
76
77/**
78\cond (ARMSC)
79*/
80
81/**
82\brief Contains the core version for a Cortex Secure Core controller.
83\details This define can be used to differentiate between the various available Cortex Secure Core controllers.
84Possible values are:
85 - 000 for a Cortex-SC000
86 - 300 for a Cortex-SC300
87
88This define is only available for Cortex Secure Core controllers.
89<b>Code Example:</b>
90\code
91#if defined(__CORTEX_SC) && (__CORTEX_SC == 300U)
92#error Yes, we have an Cortex SC300 controller.
93#else
94#error We need a Cortex SC300 controller!
95#endif
96\endcode
97*/
98#define __CORTEX_SC
99/**
100\endcond
101*/
102
103/**
104\cond (STAR)
105*/
106/**
107\brief Contains the core version for a STAR-MC controller.
108\details This define can be used to differentiate between the various available STAR-MC controllers.
109Possible values are:
110 - 1 for a STAR-MC1
111
112This define is only available for STAR-MC controllers.
113<b>Code Example:</b>
114\code
115#if defined(__STAR_MC) && (__STAR_MC == 1U)
116#error Yes, we have a STAR-MC1 controller.
117#else
118#error We need a STAR-MC1 controller!
119#endif
120\endcode
121*/
122#define __STAR_MC
123/**
124\endcond
125*/
126
127/**
128@}
129*/
130